1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * MediaTek Pinctrl Paris Driver, which implement the vendor per-pin
4  * bindings for MediaTek SoC.
5  *
6  * Copyright (C) 2018 MediaTek Inc.
7  * Author: Sean Wang <sean.wang@mediatek.com>
8  *	   Zhiyong Tao <zhiyong.tao@mediatek.com>
9  *	   Hongzhou.Yang <hongzhou.yang@mediatek.com>
10  */
11 
12 #include <linux/gpio/driver.h>
13 #include <linux/module.h>
14 #include <dt-bindings/pinctrl/mt65xx.h>
15 #include "pinctrl-paris.h"
16 
17 #define PINCTRL_PINCTRL_DEV	KBUILD_MODNAME
18 
19 /* Custom pinconf parameters */
20 #define MTK_PIN_CONFIG_TDSEL	(PIN_CONFIG_END + 1)
21 #define MTK_PIN_CONFIG_RDSEL	(PIN_CONFIG_END + 2)
22 #define MTK_PIN_CONFIG_PU_ADV	(PIN_CONFIG_END + 3)
23 #define MTK_PIN_CONFIG_PD_ADV	(PIN_CONFIG_END + 4)
24 #define MTK_PIN_CONFIG_DRV_ADV	(PIN_CONFIG_END + 5)
25 
26 static const struct pinconf_generic_params mtk_custom_bindings[] = {
27 	{"mediatek,tdsel",	MTK_PIN_CONFIG_TDSEL,		0},
28 	{"mediatek,rdsel",	MTK_PIN_CONFIG_RDSEL,		0},
29 	{"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV,		1},
30 	{"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV,	1},
31 	{"mediatek,drive-strength-adv", MTK_PIN_CONFIG_DRV_ADV,	2},
32 };
33 
34 #ifdef CONFIG_DEBUG_FS
35 static const struct pin_config_item mtk_conf_items[] = {
36 	PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true),
37 	PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true),
38 	PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true),
39 	PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true),
40 	PCONFDUMP(MTK_PIN_CONFIG_DRV_ADV, "drive-strength-adv", NULL, true),
41 };
42 #endif
43 
44 static const char * const mtk_gpio_functions[] = {
45 	"func0", "func1", "func2", "func3",
46 	"func4", "func5", "func6", "func7",
47 	"func8", "func9", "func10", "func11",
48 	"func12", "func13", "func14", "func15",
49 };
50 
51 static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
52 					  struct pinctrl_gpio_range *range,
53 					  unsigned int pin)
54 {
55 	struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
56 	const struct mtk_pin_desc *desc;
57 
58 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
59 
60 	return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
61 				hw->soc->gpio_m);
62 }
63 
64 static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
65 					 struct pinctrl_gpio_range *range,
66 					 unsigned int pin, bool input)
67 {
68 	struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
69 	const struct mtk_pin_desc *desc;
70 
71 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
72 
73 	/* hardware would take 0 as input direction */
74 	return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input);
75 }
76 
77 static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
78 			   unsigned int pin, unsigned long *config)
79 {
80 	struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
81 	u32 param = pinconf_to_config_param(*config);
82 	int pullup, err, reg, ret = 1;
83 	const struct mtk_pin_desc *desc;
84 
85 	if (pin >= hw->soc->npins) {
86 		err = -EINVAL;
87 		goto out;
88 	}
89 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
90 
91 	switch (param) {
92 	case PIN_CONFIG_BIAS_DISABLE:
93 	case PIN_CONFIG_BIAS_PULL_UP:
94 	case PIN_CONFIG_BIAS_PULL_DOWN:
95 		if (hw->soc->bias_get_combo) {
96 			err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
97 			if (err)
98 				goto out;
99 			if (param == PIN_CONFIG_BIAS_DISABLE) {
100 				if (ret == MTK_PUPD_SET_R1R0_00)
101 					ret = MTK_DISABLE;
102 			} else if (param == PIN_CONFIG_BIAS_PULL_UP) {
103 				/* When desire to get pull-up value, return
104 				 *  error if current setting is pull-down
105 				 */
106 				if (!pullup)
107 					err = -EINVAL;
108 			} else if (param == PIN_CONFIG_BIAS_PULL_DOWN) {
109 				/* When desire to get pull-down value, return
110 				 *  error if current setting is pull-up
111 				 */
112 				if (pullup)
113 					err = -EINVAL;
114 			}
115 		} else {
116 			err = -ENOTSUPP;
117 		}
118 		break;
119 	case PIN_CONFIG_SLEW_RATE:
120 		err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &ret);
121 		break;
122 	case PIN_CONFIG_INPUT_ENABLE:
123 	case PIN_CONFIG_OUTPUT_ENABLE:
124 		err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret);
125 		if (err)
126 			goto out;
127 		/*     CONFIG     Current direction return value
128 		 * -------------  ----------------- ----------------------
129 		 * OUTPUT_ENABLE       output       1 (= HW value)
130 		 *                     input        0 (= HW value)
131 		 * INPUT_ENABLE        output       0 (= reverse HW value)
132 		 *                     input        1 (= reverse HW value)
133 		 */
134 		if (param == PIN_CONFIG_INPUT_ENABLE)
135 			ret = !ret;
136 
137 		break;
138 	case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
139 		err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret);
140 		if (err)
141 			goto out;
142 		/* return error when in output mode
143 		 * because schmitt trigger only work in input mode
144 		 */
145 		if (ret) {
146 			err = -EINVAL;
147 			goto out;
148 		}
149 
150 		err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &ret);
151 
152 		break;
153 	case PIN_CONFIG_DRIVE_STRENGTH:
154 		if (hw->soc->drive_get)
155 			err = hw->soc->drive_get(hw, desc, &ret);
156 		else
157 			err = -ENOTSUPP;
158 		break;
159 	case MTK_PIN_CONFIG_TDSEL:
160 	case MTK_PIN_CONFIG_RDSEL:
161 		reg = (param == MTK_PIN_CONFIG_TDSEL) ?
162 		       PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
163 		err = mtk_hw_get_value(hw, desc, reg, &ret);
164 		break;
165 	case MTK_PIN_CONFIG_PU_ADV:
166 	case MTK_PIN_CONFIG_PD_ADV:
167 		if (hw->soc->adv_pull_get) {
168 			pullup = param == MTK_PIN_CONFIG_PU_ADV;
169 			err = hw->soc->adv_pull_get(hw, desc, pullup, &ret);
170 		} else
171 			err = -ENOTSUPP;
172 		break;
173 	case MTK_PIN_CONFIG_DRV_ADV:
174 		if (hw->soc->adv_drive_get)
175 			err = hw->soc->adv_drive_get(hw, desc, &ret);
176 		else
177 			err = -ENOTSUPP;
178 		break;
179 	default:
180 		err = -ENOTSUPP;
181 	}
182 
183 out:
184 	if (!err)
185 		*config = pinconf_to_config_packed(param, ret);
186 
187 	return err;
188 }
189 
190 static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
191 			   enum pin_config_param param,
192 			   enum pin_config_param arg)
193 {
194 	struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
195 	const struct mtk_pin_desc *desc;
196 	int err = 0;
197 	u32 reg;
198 
199 	if (pin >= hw->soc->npins) {
200 		err = -EINVAL;
201 		goto err;
202 	}
203 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
204 
205 	switch ((u32)param) {
206 	case PIN_CONFIG_BIAS_DISABLE:
207 		if (hw->soc->bias_set_combo)
208 			err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE);
209 		else
210 			err = -ENOTSUPP;
211 		break;
212 	case PIN_CONFIG_BIAS_PULL_UP:
213 		if (hw->soc->bias_set_combo)
214 			err = hw->soc->bias_set_combo(hw, desc, 1, arg);
215 		else
216 			err = -ENOTSUPP;
217 		break;
218 	case PIN_CONFIG_BIAS_PULL_DOWN:
219 		if (hw->soc->bias_set_combo)
220 			err = hw->soc->bias_set_combo(hw, desc, 0, arg);
221 		else
222 			err = -ENOTSUPP;
223 		break;
224 	case PIN_CONFIG_OUTPUT_ENABLE:
225 		err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
226 				       MTK_DISABLE);
227 		/* Keep set direction to consider the case that a GPIO pin
228 		 *  does not have SMT control
229 		 */
230 		if (err != -ENOTSUPP)
231 			goto err;
232 
233 		err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
234 				       MTK_OUTPUT);
235 		break;
236 	case PIN_CONFIG_INPUT_ENABLE:
237 		/* regard all non-zero value as enable */
238 		err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, !!arg);
239 		if (err)
240 			goto err;
241 
242 		err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
243 				       MTK_INPUT);
244 		break;
245 	case PIN_CONFIG_SLEW_RATE:
246 		/* regard all non-zero value as enable */
247 		err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR, !!arg);
248 		break;
249 	case PIN_CONFIG_OUTPUT:
250 		err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO,
251 				       arg);
252 		if (err)
253 			goto err;
254 
255 		err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
256 				       MTK_OUTPUT);
257 		break;
258 	case PIN_CONFIG_INPUT_SCHMITT:
259 	case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
260 		/* arg = 1: Input mode & SMT enable ;
261 		 * arg = 0: Output mode & SMT disable
262 		 */
263 		err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !arg);
264 		if (err)
265 			goto err;
266 
267 		err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, !!arg);
268 		break;
269 	case PIN_CONFIG_DRIVE_STRENGTH:
270 		if (hw->soc->drive_set)
271 			err = hw->soc->drive_set(hw, desc, arg);
272 		else
273 			err = -ENOTSUPP;
274 		break;
275 	case MTK_PIN_CONFIG_TDSEL:
276 	case MTK_PIN_CONFIG_RDSEL:
277 		reg = (param == MTK_PIN_CONFIG_TDSEL) ?
278 		       PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
279 		err = mtk_hw_set_value(hw, desc, reg, arg);
280 		break;
281 	case MTK_PIN_CONFIG_PU_ADV:
282 	case MTK_PIN_CONFIG_PD_ADV:
283 		if (hw->soc->adv_pull_set) {
284 			bool pullup;
285 
286 			pullup = param == MTK_PIN_CONFIG_PU_ADV;
287 			err = hw->soc->adv_pull_set(hw, desc, pullup,
288 						    arg);
289 		} else
290 			err = -ENOTSUPP;
291 		break;
292 	case MTK_PIN_CONFIG_DRV_ADV:
293 		if (hw->soc->adv_drive_set)
294 			err = hw->soc->adv_drive_set(hw, desc, arg);
295 		else
296 			err = -ENOTSUPP;
297 		break;
298 	default:
299 		err = -ENOTSUPP;
300 	}
301 
302 err:
303 	return err;
304 }
305 
306 static struct mtk_pinctrl_group *
307 mtk_pctrl_find_group_by_pin(struct mtk_pinctrl *hw, u32 pin)
308 {
309 	int i;
310 
311 	for (i = 0; i < hw->soc->ngrps; i++) {
312 		struct mtk_pinctrl_group *grp = hw->groups + i;
313 
314 		if (grp->pin == pin)
315 			return grp;
316 	}
317 
318 	return NULL;
319 }
320 
321 static const struct mtk_func_desc *
322 mtk_pctrl_find_function_by_pin(struct mtk_pinctrl *hw, u32 pin_num, u32 fnum)
323 {
324 	const struct mtk_pin_desc *pin = hw->soc->pins + pin_num;
325 	const struct mtk_func_desc *func = pin->funcs;
326 
327 	while (func && func->name) {
328 		if (func->muxval == fnum)
329 			return func;
330 		func++;
331 	}
332 
333 	return NULL;
334 }
335 
336 static bool mtk_pctrl_is_function_valid(struct mtk_pinctrl *hw, u32 pin_num,
337 					u32 fnum)
338 {
339 	int i;
340 
341 	for (i = 0; i < hw->soc->npins; i++) {
342 		const struct mtk_pin_desc *pin = hw->soc->pins + i;
343 
344 		if (pin->number == pin_num) {
345 			const struct mtk_func_desc *func = pin->funcs;
346 
347 			while (func && func->name) {
348 				if (func->muxval == fnum)
349 					return true;
350 				func++;
351 			}
352 
353 			break;
354 		}
355 	}
356 
357 	return false;
358 }
359 
360 static int mtk_pctrl_dt_node_to_map_func(struct mtk_pinctrl *pctl,
361 					 u32 pin, u32 fnum,
362 					 struct mtk_pinctrl_group *grp,
363 					 struct pinctrl_map **map,
364 					 unsigned *reserved_maps,
365 					 unsigned *num_maps)
366 {
367 	bool ret;
368 
369 	if (*num_maps == *reserved_maps)
370 		return -ENOSPC;
371 
372 	(*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
373 	(*map)[*num_maps].data.mux.group = grp->name;
374 
375 	ret = mtk_pctrl_is_function_valid(pctl, pin, fnum);
376 	if (!ret) {
377 		dev_err(pctl->dev, "invalid function %d on pin %d .\n",
378 			fnum, pin);
379 		return -EINVAL;
380 	}
381 
382 	(*map)[*num_maps].data.mux.function = mtk_gpio_functions[fnum];
383 	(*num_maps)++;
384 
385 	return 0;
386 }
387 
388 static int mtk_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
389 				       struct device_node *node,
390 				       struct pinctrl_map **map,
391 				       unsigned *reserved_maps,
392 				       unsigned *num_maps)
393 {
394 	struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
395 	int num_pins, num_funcs, maps_per_pin, i, err;
396 	struct mtk_pinctrl_group *grp;
397 	unsigned int num_configs;
398 	bool has_config = false;
399 	unsigned long *configs;
400 	u32 pinfunc, pin, func;
401 	struct property *pins;
402 	unsigned reserve = 0;
403 
404 	pins = of_find_property(node, "pinmux", NULL);
405 	if (!pins) {
406 		dev_err(hw->dev, "missing pins property in node %pOFn .\n",
407 			node);
408 		return -EINVAL;
409 	}
410 
411 	err = pinconf_generic_parse_dt_config(node, pctldev, &configs,
412 					      &num_configs);
413 	if (err)
414 		return err;
415 
416 	if (num_configs)
417 		has_config = true;
418 
419 	num_pins = pins->length / sizeof(u32);
420 	num_funcs = num_pins;
421 	maps_per_pin = 0;
422 	if (num_funcs)
423 		maps_per_pin++;
424 	if (has_config && num_pins >= 1)
425 		maps_per_pin++;
426 
427 	if (!num_pins || !maps_per_pin) {
428 		err = -EINVAL;
429 		goto exit;
430 	}
431 
432 	reserve = num_pins * maps_per_pin;
433 
434 	err = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, num_maps,
435 					reserve);
436 	if (err < 0)
437 		goto exit;
438 
439 	for (i = 0; i < num_pins; i++) {
440 		err = of_property_read_u32_index(node, "pinmux", i, &pinfunc);
441 		if (err)
442 			goto exit;
443 
444 		pin = MTK_GET_PIN_NO(pinfunc);
445 		func = MTK_GET_PIN_FUNC(pinfunc);
446 
447 		if (pin >= hw->soc->npins ||
448 		    func >= ARRAY_SIZE(mtk_gpio_functions)) {
449 			dev_err(hw->dev, "invalid pins value.\n");
450 			err = -EINVAL;
451 			goto exit;
452 		}
453 
454 		grp = mtk_pctrl_find_group_by_pin(hw, pin);
455 		if (!grp) {
456 			dev_err(hw->dev, "unable to match pin %d to group\n",
457 				pin);
458 			err = -EINVAL;
459 			goto exit;
460 		}
461 
462 		err = mtk_pctrl_dt_node_to_map_func(hw, pin, func, grp, map,
463 						    reserved_maps, num_maps);
464 		if (err < 0)
465 			goto exit;
466 
467 		if (has_config) {
468 			err = pinctrl_utils_add_map_configs(pctldev, map,
469 							    reserved_maps,
470 							    num_maps,
471 							    grp->name,
472 							    configs,
473 							    num_configs,
474 							    PIN_MAP_TYPE_CONFIGS_GROUP);
475 			if (err < 0)
476 				goto exit;
477 		}
478 	}
479 
480 	err = 0;
481 
482 exit:
483 	kfree(configs);
484 	return err;
485 }
486 
487 static int mtk_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
488 				    struct device_node *np_config,
489 				    struct pinctrl_map **map,
490 				    unsigned *num_maps)
491 {
492 	struct device_node *np;
493 	unsigned reserved_maps;
494 	int ret;
495 
496 	*map = NULL;
497 	*num_maps = 0;
498 	reserved_maps = 0;
499 
500 	for_each_child_of_node(np_config, np) {
501 		ret = mtk_pctrl_dt_subnode_to_map(pctldev, np, map,
502 						  &reserved_maps,
503 						  num_maps);
504 		if (ret < 0) {
505 			pinctrl_utils_free_map(pctldev, *map, *num_maps);
506 			of_node_put(np);
507 			return ret;
508 		}
509 	}
510 
511 	return 0;
512 }
513 
514 static int mtk_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
515 {
516 	struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
517 
518 	return hw->soc->ngrps;
519 }
520 
521 static const char *mtk_pctrl_get_group_name(struct pinctrl_dev *pctldev,
522 					    unsigned group)
523 {
524 	struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
525 
526 	return hw->groups[group].name;
527 }
528 
529 static int mtk_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
530 				    unsigned group, const unsigned **pins,
531 				    unsigned *num_pins)
532 {
533 	struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
534 
535 	*pins = (unsigned *)&hw->groups[group].pin;
536 	*num_pins = 1;
537 
538 	return 0;
539 }
540 
541 static int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int field)
542 {
543 	const struct mtk_pin_desc *desc;
544 	int value, err;
545 
546 	if (gpio >= hw->soc->npins)
547 		return -EINVAL;
548 
549 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
550 
551 	err = mtk_hw_get_value(hw, desc, field, &value);
552 	if (err)
553 		return err;
554 
555 	return value;
556 }
557 
558 #define mtk_pctrl_get_pinmux(hw, gpio)			\
559 	mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_MODE)
560 
561 #define mtk_pctrl_get_direction(hw, gpio)		\
562 	mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DIR)
563 
564 #define mtk_pctrl_get_out(hw, gpio)			\
565 	mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DO)
566 
567 #define mtk_pctrl_get_in(hw, gpio)			\
568 	mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DI)
569 
570 #define mtk_pctrl_get_smt(hw, gpio)			\
571 	mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_SMT)
572 
573 #define mtk_pctrl_get_ies(hw, gpio)			\
574 	mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_IES)
575 
576 #define mtk_pctrl_get_driving(hw, gpio)			\
577 	mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV)
578 
579 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
580 	unsigned int gpio, char *buf, unsigned int bufLen)
581 {
582 	int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1;
583 	const struct mtk_pin_desc *desc;
584 
585 	if (gpio >= hw->soc->npins)
586 		return -EINVAL;
587 
588 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
589 	pinmux = mtk_pctrl_get_pinmux(hw, gpio);
590 	if (pinmux >= hw->soc->nfuncs)
591 		pinmux -= hw->soc->nfuncs;
592 
593 	mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen);
594 	if (pullen == MTK_PUPD_SET_R1R0_00) {
595 		pullen = 0;
596 		r1 = 0;
597 		r0 = 0;
598 	} else if (pullen == MTK_PUPD_SET_R1R0_01) {
599 		pullen = 1;
600 		r1 = 0;
601 		r0 = 1;
602 	} else if (pullen == MTK_PUPD_SET_R1R0_10) {
603 		pullen = 1;
604 		r1 = 1;
605 		r0 = 0;
606 	} else if (pullen == MTK_PUPD_SET_R1R0_11) {
607 		pullen = 1;
608 		r1 = 1;
609 		r0 = 1;
610 	} else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) {
611 		pullen = 0;
612 	}
613 	len += scnprintf(buf + len, bufLen - len,
614 			"%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
615 			gpio,
616 			pinmux,
617 			mtk_pctrl_get_direction(hw, gpio),
618 			mtk_pctrl_get_out(hw, gpio),
619 			mtk_pctrl_get_in(hw, gpio),
620 			mtk_pctrl_get_driving(hw, gpio),
621 			mtk_pctrl_get_smt(hw, gpio),
622 			mtk_pctrl_get_ies(hw, gpio),
623 			pullen,
624 			pullup);
625 
626 	if (r1 != -1) {
627 		len += scnprintf(buf + len, bufLen - len, " (%1d %1d)\n",
628 			r1, r0);
629 	} else {
630 		len += scnprintf(buf + len, bufLen - len, "\n");
631 	}
632 
633 	return len;
634 }
635 EXPORT_SYMBOL_GPL(mtk_pctrl_show_one_pin);
636 
637 #define PIN_DBG_BUF_SZ 96
638 static void mtk_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
639 			  unsigned int gpio)
640 {
641 	struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
642 	char buf[PIN_DBG_BUF_SZ];
643 
644 	(void)mtk_pctrl_show_one_pin(hw, gpio, buf, PIN_DBG_BUF_SZ);
645 
646 	seq_printf(s, "%s", buf);
647 }
648 
649 static const struct pinctrl_ops mtk_pctlops = {
650 	.dt_node_to_map		= mtk_pctrl_dt_node_to_map,
651 	.dt_free_map		= pinctrl_utils_free_map,
652 	.get_groups_count	= mtk_pctrl_get_groups_count,
653 	.get_group_name		= mtk_pctrl_get_group_name,
654 	.get_group_pins		= mtk_pctrl_get_group_pins,
655 	.pin_dbg_show           = mtk_pctrl_dbg_show,
656 };
657 
658 static int mtk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
659 {
660 	return ARRAY_SIZE(mtk_gpio_functions);
661 }
662 
663 static const char *mtk_pmx_get_func_name(struct pinctrl_dev *pctldev,
664 					 unsigned selector)
665 {
666 	return mtk_gpio_functions[selector];
667 }
668 
669 static int mtk_pmx_get_func_groups(struct pinctrl_dev *pctldev,
670 				   unsigned function,
671 				   const char * const **groups,
672 				   unsigned * const num_groups)
673 {
674 	struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
675 
676 	*groups = hw->grp_names;
677 	*num_groups = hw->soc->ngrps;
678 
679 	return 0;
680 }
681 
682 static int mtk_pmx_set_mux(struct pinctrl_dev *pctldev,
683 			   unsigned function,
684 			   unsigned group)
685 {
686 	struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
687 	struct mtk_pinctrl_group *grp = hw->groups + group;
688 	const struct mtk_func_desc *desc_func;
689 	const struct mtk_pin_desc *desc;
690 	bool ret;
691 
692 	ret = mtk_pctrl_is_function_valid(hw, grp->pin, function);
693 	if (!ret) {
694 		dev_err(hw->dev, "invalid function %d on group %d .\n",
695 			function, group);
696 		return -EINVAL;
697 	}
698 
699 	desc_func = mtk_pctrl_find_function_by_pin(hw, grp->pin, function);
700 	if (!desc_func)
701 		return -EINVAL;
702 
703 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[grp->pin];
704 	mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, desc_func->muxval);
705 
706 	return 0;
707 }
708 
709 static const struct pinmux_ops mtk_pmxops = {
710 	.get_functions_count	= mtk_pmx_get_funcs_cnt,
711 	.get_function_name	= mtk_pmx_get_func_name,
712 	.get_function_groups	= mtk_pmx_get_func_groups,
713 	.set_mux		= mtk_pmx_set_mux,
714 	.gpio_set_direction	= mtk_pinmux_gpio_set_direction,
715 	.gpio_request_enable	= mtk_pinmux_gpio_request_enable,
716 };
717 
718 static int mtk_pconf_group_get(struct pinctrl_dev *pctldev, unsigned group,
719 			       unsigned long *config)
720 {
721 	struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
722 
723 	*config = hw->groups[group].config;
724 
725 	return 0;
726 }
727 
728 static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
729 			       unsigned long *configs, unsigned num_configs)
730 {
731 	struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
732 	struct mtk_pinctrl_group *grp = &hw->groups[group];
733 	int i, ret;
734 
735 	for (i = 0; i < num_configs; i++) {
736 		ret = mtk_pinconf_set(pctldev, grp->pin,
737 				      pinconf_to_config_param(configs[i]),
738 				      pinconf_to_config_argument(configs[i]));
739 		if (ret < 0)
740 			return ret;
741 
742 		grp->config = configs[i];
743 	}
744 
745 	return 0;
746 }
747 
748 static const struct pinconf_ops mtk_confops = {
749 	.pin_config_get = mtk_pinconf_get,
750 	.pin_config_group_get	= mtk_pconf_group_get,
751 	.pin_config_group_set	= mtk_pconf_group_set,
752 	.is_generic = true,
753 };
754 
755 static struct pinctrl_desc mtk_desc = {
756 	.name = PINCTRL_PINCTRL_DEV,
757 	.pctlops = &mtk_pctlops,
758 	.pmxops = &mtk_pmxops,
759 	.confops = &mtk_confops,
760 	.owner = THIS_MODULE,
761 };
762 
763 static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int gpio)
764 {
765 	struct mtk_pinctrl *hw = gpiochip_get_data(chip);
766 	const struct mtk_pin_desc *desc;
767 	int value, err;
768 
769 	if (gpio >= hw->soc->npins)
770 		return -EINVAL;
771 
772 	/*
773 	 * "Virtual" GPIOs are always and only used for interrupts
774 	 * Since they are only used for interrupts, they are always inputs
775 	 */
776 	if (mtk_is_virt_gpio(hw, gpio))
777 		return 1;
778 
779 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
780 
781 	err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &value);
782 	if (err)
783 		return err;
784 
785 	if (value)
786 		return GPIO_LINE_DIRECTION_OUT;
787 
788 	return GPIO_LINE_DIRECTION_IN;
789 }
790 
791 static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
792 {
793 	struct mtk_pinctrl *hw = gpiochip_get_data(chip);
794 	const struct mtk_pin_desc *desc;
795 	int value, err;
796 
797 	if (gpio >= hw->soc->npins)
798 		return -EINVAL;
799 
800 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
801 
802 	err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value);
803 	if (err)
804 		return err;
805 
806 	return !!value;
807 }
808 
809 static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
810 {
811 	struct mtk_pinctrl *hw = gpiochip_get_data(chip);
812 	const struct mtk_pin_desc *desc;
813 
814 	if (gpio >= hw->soc->npins)
815 		return;
816 
817 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
818 
819 	mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value);
820 }
821 
822 static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio)
823 {
824 	struct mtk_pinctrl *hw = gpiochip_get_data(chip);
825 
826 	if (gpio >= hw->soc->npins)
827 		return -EINVAL;
828 
829 	return pinctrl_gpio_direction_input(chip->base + gpio);
830 }
831 
832 static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio,
833 				     int value)
834 {
835 	struct mtk_pinctrl *hw = gpiochip_get_data(chip);
836 
837 	if (gpio >= hw->soc->npins)
838 		return -EINVAL;
839 
840 	mtk_gpio_set(chip, gpio, value);
841 
842 	return pinctrl_gpio_direction_output(chip->base + gpio);
843 }
844 
845 static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
846 {
847 	struct mtk_pinctrl *hw = gpiochip_get_data(chip);
848 	const struct mtk_pin_desc *desc;
849 
850 	if (!hw->eint)
851 		return -ENOTSUPP;
852 
853 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
854 
855 	if (desc->eint.eint_n == EINT_NA)
856 		return -ENOTSUPP;
857 
858 	return mtk_eint_find_irq(hw->eint, desc->eint.eint_n);
859 }
860 
861 static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
862 			       unsigned long config)
863 {
864 	struct mtk_pinctrl *hw = gpiochip_get_data(chip);
865 	const struct mtk_pin_desc *desc;
866 	u32 debounce;
867 
868 	desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
869 
870 	if (!hw->eint ||
871 	    pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE ||
872 	    desc->eint.eint_n == EINT_NA)
873 		return -ENOTSUPP;
874 
875 	debounce = pinconf_to_config_argument(config);
876 
877 	return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce);
878 }
879 
880 static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np)
881 {
882 	struct gpio_chip *chip = &hw->chip;
883 	int ret;
884 
885 	chip->label		= PINCTRL_PINCTRL_DEV;
886 	chip->parent		= hw->dev;
887 	chip->request		= gpiochip_generic_request;
888 	chip->free		= gpiochip_generic_free;
889 	chip->get_direction	= mtk_gpio_get_direction;
890 	chip->direction_input	= mtk_gpio_direction_input;
891 	chip->direction_output	= mtk_gpio_direction_output;
892 	chip->get		= mtk_gpio_get;
893 	chip->set		= mtk_gpio_set;
894 	chip->to_irq		= mtk_gpio_to_irq;
895 	chip->set_config	= mtk_gpio_set_config;
896 	chip->base		= -1;
897 	chip->ngpio		= hw->soc->npins;
898 	chip->of_node		= np;
899 	chip->of_gpio_n_cells	= 2;
900 
901 	ret = gpiochip_add_data(chip, hw);
902 	if (ret < 0)
903 		return ret;
904 
905 	return 0;
906 }
907 
908 static int mtk_pctrl_build_state(struct platform_device *pdev)
909 {
910 	struct mtk_pinctrl *hw = platform_get_drvdata(pdev);
911 	int i;
912 
913 	/* Allocate groups */
914 	hw->groups = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps,
915 					sizeof(*hw->groups), GFP_KERNEL);
916 	if (!hw->groups)
917 		return -ENOMEM;
918 
919 	/* We assume that one pin is one group, use pin name as group name. */
920 	hw->grp_names = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps,
921 					   sizeof(*hw->grp_names), GFP_KERNEL);
922 	if (!hw->grp_names)
923 		return -ENOMEM;
924 
925 	for (i = 0; i < hw->soc->npins; i++) {
926 		const struct mtk_pin_desc *pin = hw->soc->pins + i;
927 		struct mtk_pinctrl_group *group = hw->groups + i;
928 
929 		group->name = pin->name;
930 		group->pin = pin->number;
931 
932 		hw->grp_names[i] = pin->name;
933 	}
934 
935 	return 0;
936 }
937 
938 int mtk_paris_pinctrl_probe(struct platform_device *pdev,
939 			    const struct mtk_pin_soc *soc)
940 {
941 	struct pinctrl_pin_desc *pins;
942 	struct mtk_pinctrl *hw;
943 	int err, i;
944 
945 	hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
946 	if (!hw)
947 		return -ENOMEM;
948 
949 	platform_set_drvdata(pdev, hw);
950 	hw->soc = soc;
951 	hw->dev = &pdev->dev;
952 
953 	if (!hw->soc->nbase_names) {
954 		dev_err(&pdev->dev,
955 			"SoC should be assigned at least one register base\n");
956 		return -EINVAL;
957 	}
958 
959 	hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names,
960 				      sizeof(*hw->base), GFP_KERNEL);
961 	if (!hw->base)
962 		return -ENOMEM;
963 
964 	for (i = 0; i < hw->soc->nbase_names; i++) {
965 		hw->base[i] = devm_platform_ioremap_resource_byname(pdev,
966 					hw->soc->base_names[i]);
967 		if (IS_ERR(hw->base[i]))
968 			return PTR_ERR(hw->base[i]);
969 	}
970 
971 	hw->nbase = hw->soc->nbase_names;
972 
973 	spin_lock_init(&hw->lock);
974 
975 	err = mtk_pctrl_build_state(pdev);
976 	if (err) {
977 		dev_err(&pdev->dev, "build state failed: %d\n", err);
978 		return -EINVAL;
979 	}
980 
981 	/* Copy from internal struct mtk_pin_desc to register to the core */
982 	pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins),
983 				  GFP_KERNEL);
984 	if (!pins)
985 		return -ENOMEM;
986 
987 	for (i = 0; i < hw->soc->npins; i++) {
988 		pins[i].number = hw->soc->pins[i].number;
989 		pins[i].name = hw->soc->pins[i].name;
990 	}
991 
992 	/* Setup pins descriptions per SoC types */
993 	mtk_desc.pins = (const struct pinctrl_pin_desc *)pins;
994 	mtk_desc.npins = hw->soc->npins;
995 	mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings);
996 	mtk_desc.custom_params = mtk_custom_bindings;
997 #ifdef CONFIG_DEBUG_FS
998 	mtk_desc.custom_conf_items = mtk_conf_items;
999 #endif
1000 
1001 	err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw,
1002 					     &hw->pctrl);
1003 	if (err)
1004 		return err;
1005 
1006 	err = pinctrl_enable(hw->pctrl);
1007 	if (err)
1008 		return err;
1009 
1010 	err = mtk_build_eint(hw, pdev);
1011 	if (err)
1012 		dev_warn(&pdev->dev,
1013 			 "Failed to add EINT, but pinctrl still can work\n");
1014 
1015 	/* Build gpiochip should be after pinctrl_enable is done */
1016 	err = mtk_build_gpiochip(hw, pdev->dev.of_node);
1017 	if (err) {
1018 		dev_err(&pdev->dev, "Failed to add gpio_chip\n");
1019 		return err;
1020 	}
1021 
1022 	platform_set_drvdata(pdev, hw);
1023 
1024 	return 0;
1025 }
1026 EXPORT_SYMBOL_GPL(mtk_paris_pinctrl_probe);
1027 
1028 static int mtk_paris_pinctrl_suspend(struct device *device)
1029 {
1030 	struct mtk_pinctrl *pctl = dev_get_drvdata(device);
1031 
1032 	return mtk_eint_do_suspend(pctl->eint);
1033 }
1034 
1035 static int mtk_paris_pinctrl_resume(struct device *device)
1036 {
1037 	struct mtk_pinctrl *pctl = dev_get_drvdata(device);
1038 
1039 	return mtk_eint_do_resume(pctl->eint);
1040 }
1041 
1042 const struct dev_pm_ops mtk_paris_pinctrl_pm_ops = {
1043 	.suspend_noirq = mtk_paris_pinctrl_suspend,
1044 	.resume_noirq = mtk_paris_pinctrl_resume,
1045 };
1046 
1047 MODULE_LICENSE("GPL v2");
1048 MODULE_DESCRIPTION("MediaTek Pinctrl Common Driver V2 Paris");
1049