1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * MediaTek Pinctrl Paris Driver, which implement the vendor per-pin 4 * bindings for MediaTek SoC. 5 * 6 * Copyright (C) 2018 MediaTek Inc. 7 * Author: Sean Wang <sean.wang@mediatek.com> 8 * Zhiyong Tao <zhiyong.tao@mediatek.com> 9 * Hongzhou.Yang <hongzhou.yang@mediatek.com> 10 */ 11 12 #include <linux/gpio/driver.h> 13 #include <dt-bindings/pinctrl/mt65xx.h> 14 #include "pinctrl-paris.h" 15 16 #define PINCTRL_PINCTRL_DEV KBUILD_MODNAME 17 18 /* Custom pinconf parameters */ 19 #define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1) 20 #define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2) 21 #define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3) 22 #define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4) 23 #define MTK_PIN_CONFIG_DRV_ADV (PIN_CONFIG_END + 5) 24 25 static const struct pinconf_generic_params mtk_custom_bindings[] = { 26 {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0}, 27 {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0}, 28 {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1}, 29 {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1}, 30 {"mediatek,drive-strength-adv", MTK_PIN_CONFIG_DRV_ADV, 2}, 31 }; 32 33 #ifdef CONFIG_DEBUG_FS 34 static const struct pin_config_item mtk_conf_items[] = { 35 PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true), 36 PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true), 37 PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true), 38 PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true), 39 PCONFDUMP(MTK_PIN_CONFIG_DRV_ADV, "drive-strength-adv", NULL, true), 40 }; 41 #endif 42 43 static const char * const mtk_gpio_functions[] = { 44 "func0", "func1", "func2", "func3", 45 "func4", "func5", "func6", "func7", 46 "func8", "func9", "func10", "func11", 47 "func12", "func13", "func14", "func15", 48 }; 49 50 static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, 51 struct pinctrl_gpio_range *range, 52 unsigned int pin) 53 { 54 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 55 const struct mtk_pin_desc *desc; 56 57 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 58 59 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, 60 hw->soc->gpio_m); 61 } 62 63 static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, 64 struct pinctrl_gpio_range *range, 65 unsigned int pin, bool input) 66 { 67 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 68 const struct mtk_pin_desc *desc; 69 70 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 71 72 /* hardware would take 0 as input direction */ 73 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input); 74 } 75 76 static int mtk_pinconf_get(struct pinctrl_dev *pctldev, 77 unsigned int pin, unsigned long *config) 78 { 79 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 80 u32 param = pinconf_to_config_param(*config); 81 int pullup, err, reg, ret = 1; 82 const struct mtk_pin_desc *desc; 83 84 if (pin >= hw->soc->npins) { 85 err = -EINVAL; 86 goto out; 87 } 88 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 89 90 switch (param) { 91 case PIN_CONFIG_BIAS_DISABLE: 92 case PIN_CONFIG_BIAS_PULL_UP: 93 case PIN_CONFIG_BIAS_PULL_DOWN: 94 if (hw->soc->bias_get_combo) { 95 err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); 96 if (err) 97 goto out; 98 if (param == PIN_CONFIG_BIAS_DISABLE) { 99 if (ret == MTK_PUPD_SET_R1R0_00) 100 ret = MTK_DISABLE; 101 } else if (param == PIN_CONFIG_BIAS_PULL_UP) { 102 /* When desire to get pull-up value, return 103 * error if current setting is pull-down 104 */ 105 if (!pullup) 106 err = -EINVAL; 107 } else if (param == PIN_CONFIG_BIAS_PULL_DOWN) { 108 /* When desire to get pull-down value, return 109 * error if current setting is pull-up 110 */ 111 if (pullup) 112 err = -EINVAL; 113 } 114 } else { 115 err = -ENOTSUPP; 116 } 117 break; 118 case PIN_CONFIG_SLEW_RATE: 119 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &ret); 120 break; 121 case PIN_CONFIG_INPUT_ENABLE: 122 case PIN_CONFIG_OUTPUT_ENABLE: 123 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret); 124 if (err) 125 goto out; 126 /* CONFIG Current direction return value 127 * ------------- ----------------- ---------------------- 128 * OUTPUT_ENABLE output 1 (= HW value) 129 * input 0 (= HW value) 130 * INPUT_ENABLE output 0 (= reverse HW value) 131 * input 1 (= reverse HW value) 132 */ 133 if (param == PIN_CONFIG_INPUT_ENABLE) 134 ret = !ret; 135 136 break; 137 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 138 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret); 139 if (err) 140 goto out; 141 /* return error when in output mode 142 * because schmitt trigger only work in input mode 143 */ 144 if (ret) { 145 err = -EINVAL; 146 goto out; 147 } 148 149 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &ret); 150 151 break; 152 case PIN_CONFIG_DRIVE_STRENGTH: 153 if (hw->soc->drive_get) 154 err = hw->soc->drive_get(hw, desc, &ret); 155 else 156 err = -ENOTSUPP; 157 break; 158 case MTK_PIN_CONFIG_TDSEL: 159 case MTK_PIN_CONFIG_RDSEL: 160 reg = (param == MTK_PIN_CONFIG_TDSEL) ? 161 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; 162 err = mtk_hw_get_value(hw, desc, reg, &ret); 163 break; 164 case MTK_PIN_CONFIG_PU_ADV: 165 case MTK_PIN_CONFIG_PD_ADV: 166 if (hw->soc->adv_pull_get) { 167 bool pullup; 168 169 pullup = param == MTK_PIN_CONFIG_PU_ADV; 170 err = hw->soc->adv_pull_get(hw, desc, pullup, &ret); 171 } else 172 err = -ENOTSUPP; 173 break; 174 case MTK_PIN_CONFIG_DRV_ADV: 175 if (hw->soc->adv_drive_get) 176 err = hw->soc->adv_drive_get(hw, desc, &ret); 177 else 178 err = -ENOTSUPP; 179 break; 180 default: 181 err = -ENOTSUPP; 182 } 183 184 out: 185 if (!err) 186 *config = pinconf_to_config_packed(param, ret); 187 188 return err; 189 } 190 191 static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 192 enum pin_config_param param, 193 enum pin_config_param arg) 194 { 195 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 196 const struct mtk_pin_desc *desc; 197 int err = 0; 198 u32 reg; 199 200 if (pin >= hw->soc->npins) { 201 err = -EINVAL; 202 goto err; 203 } 204 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 205 206 switch ((u32)param) { 207 case PIN_CONFIG_BIAS_DISABLE: 208 if (hw->soc->bias_set_combo) 209 err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE); 210 else 211 err = -ENOTSUPP; 212 break; 213 case PIN_CONFIG_BIAS_PULL_UP: 214 if (hw->soc->bias_set_combo) 215 err = hw->soc->bias_set_combo(hw, desc, 1, arg); 216 else 217 err = -ENOTSUPP; 218 break; 219 case PIN_CONFIG_BIAS_PULL_DOWN: 220 if (hw->soc->bias_set_combo) 221 err = hw->soc->bias_set_combo(hw, desc, 0, arg); 222 else 223 err = -ENOTSUPP; 224 break; 225 case PIN_CONFIG_OUTPUT_ENABLE: 226 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, 227 MTK_DISABLE); 228 /* Keep set direction to consider the case that a GPIO pin 229 * does not have SMT control 230 */ 231 if (err != -ENOTSUPP) 232 goto err; 233 234 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 235 MTK_OUTPUT); 236 break; 237 case PIN_CONFIG_INPUT_ENABLE: 238 /* regard all non-zero value as enable */ 239 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, !!arg); 240 if (err) 241 goto err; 242 243 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 244 MTK_INPUT); 245 break; 246 case PIN_CONFIG_SLEW_RATE: 247 /* regard all non-zero value as enable */ 248 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR, !!arg); 249 break; 250 case PIN_CONFIG_OUTPUT: 251 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 252 MTK_OUTPUT); 253 if (err) 254 goto err; 255 256 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, 257 arg); 258 break; 259 case PIN_CONFIG_INPUT_SCHMITT: 260 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 261 /* arg = 1: Input mode & SMT enable ; 262 * arg = 0: Output mode & SMT disable 263 */ 264 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !arg); 265 if (err) 266 goto err; 267 268 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, !!arg); 269 break; 270 case PIN_CONFIG_DRIVE_STRENGTH: 271 if (hw->soc->drive_set) 272 err = hw->soc->drive_set(hw, desc, arg); 273 else 274 err = -ENOTSUPP; 275 break; 276 case MTK_PIN_CONFIG_TDSEL: 277 case MTK_PIN_CONFIG_RDSEL: 278 reg = (param == MTK_PIN_CONFIG_TDSEL) ? 279 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; 280 err = mtk_hw_set_value(hw, desc, reg, arg); 281 break; 282 case MTK_PIN_CONFIG_PU_ADV: 283 case MTK_PIN_CONFIG_PD_ADV: 284 if (hw->soc->adv_pull_set) { 285 bool pullup; 286 287 pullup = param == MTK_PIN_CONFIG_PU_ADV; 288 err = hw->soc->adv_pull_set(hw, desc, pullup, 289 arg); 290 } else 291 err = -ENOTSUPP; 292 break; 293 case MTK_PIN_CONFIG_DRV_ADV: 294 if (hw->soc->adv_drive_set) 295 err = hw->soc->adv_drive_set(hw, desc, arg); 296 else 297 err = -ENOTSUPP; 298 break; 299 default: 300 err = -ENOTSUPP; 301 } 302 303 err: 304 return err; 305 } 306 307 static struct mtk_pinctrl_group * 308 mtk_pctrl_find_group_by_pin(struct mtk_pinctrl *hw, u32 pin) 309 { 310 int i; 311 312 for (i = 0; i < hw->soc->ngrps; i++) { 313 struct mtk_pinctrl_group *grp = hw->groups + i; 314 315 if (grp->pin == pin) 316 return grp; 317 } 318 319 return NULL; 320 } 321 322 static const struct mtk_func_desc * 323 mtk_pctrl_find_function_by_pin(struct mtk_pinctrl *hw, u32 pin_num, u32 fnum) 324 { 325 const struct mtk_pin_desc *pin = hw->soc->pins + pin_num; 326 const struct mtk_func_desc *func = pin->funcs; 327 328 while (func && func->name) { 329 if (func->muxval == fnum) 330 return func; 331 func++; 332 } 333 334 return NULL; 335 } 336 337 static bool mtk_pctrl_is_function_valid(struct mtk_pinctrl *hw, u32 pin_num, 338 u32 fnum) 339 { 340 int i; 341 342 for (i = 0; i < hw->soc->npins; i++) { 343 const struct mtk_pin_desc *pin = hw->soc->pins + i; 344 345 if (pin->number == pin_num) { 346 const struct mtk_func_desc *func = pin->funcs; 347 348 while (func && func->name) { 349 if (func->muxval == fnum) 350 return true; 351 func++; 352 } 353 354 break; 355 } 356 } 357 358 return false; 359 } 360 361 static int mtk_pctrl_dt_node_to_map_func(struct mtk_pinctrl *pctl, 362 u32 pin, u32 fnum, 363 struct mtk_pinctrl_group *grp, 364 struct pinctrl_map **map, 365 unsigned *reserved_maps, 366 unsigned *num_maps) 367 { 368 bool ret; 369 370 if (*num_maps == *reserved_maps) 371 return -ENOSPC; 372 373 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; 374 (*map)[*num_maps].data.mux.group = grp->name; 375 376 ret = mtk_pctrl_is_function_valid(pctl, pin, fnum); 377 if (!ret) { 378 dev_err(pctl->dev, "invalid function %d on pin %d .\n", 379 fnum, pin); 380 return -EINVAL; 381 } 382 383 (*map)[*num_maps].data.mux.function = mtk_gpio_functions[fnum]; 384 (*num_maps)++; 385 386 return 0; 387 } 388 389 static int mtk_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, 390 struct device_node *node, 391 struct pinctrl_map **map, 392 unsigned *reserved_maps, 393 unsigned *num_maps) 394 { 395 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 396 int num_pins, num_funcs, maps_per_pin, i, err; 397 struct mtk_pinctrl_group *grp; 398 unsigned int num_configs; 399 bool has_config = false; 400 unsigned long *configs; 401 u32 pinfunc, pin, func; 402 struct property *pins; 403 unsigned reserve = 0; 404 405 pins = of_find_property(node, "pinmux", NULL); 406 if (!pins) { 407 dev_err(hw->dev, "missing pins property in node %pOFn .\n", 408 node); 409 return -EINVAL; 410 } 411 412 err = pinconf_generic_parse_dt_config(node, pctldev, &configs, 413 &num_configs); 414 if (err) 415 return err; 416 417 if (num_configs) 418 has_config = true; 419 420 num_pins = pins->length / sizeof(u32); 421 num_funcs = num_pins; 422 maps_per_pin = 0; 423 if (num_funcs) 424 maps_per_pin++; 425 if (has_config && num_pins >= 1) 426 maps_per_pin++; 427 428 if (!num_pins || !maps_per_pin) { 429 err = -EINVAL; 430 goto exit; 431 } 432 433 reserve = num_pins * maps_per_pin; 434 435 err = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, num_maps, 436 reserve); 437 if (err < 0) 438 goto exit; 439 440 for (i = 0; i < num_pins; i++) { 441 err = of_property_read_u32_index(node, "pinmux", i, &pinfunc); 442 if (err) 443 goto exit; 444 445 pin = MTK_GET_PIN_NO(pinfunc); 446 func = MTK_GET_PIN_FUNC(pinfunc); 447 448 if (pin >= hw->soc->npins || 449 func >= ARRAY_SIZE(mtk_gpio_functions)) { 450 dev_err(hw->dev, "invalid pins value.\n"); 451 err = -EINVAL; 452 goto exit; 453 } 454 455 grp = mtk_pctrl_find_group_by_pin(hw, pin); 456 if (!grp) { 457 dev_err(hw->dev, "unable to match pin %d to group\n", 458 pin); 459 err = -EINVAL; 460 goto exit; 461 } 462 463 err = mtk_pctrl_dt_node_to_map_func(hw, pin, func, grp, map, 464 reserved_maps, num_maps); 465 if (err < 0) 466 goto exit; 467 468 if (has_config) { 469 err = pinctrl_utils_add_map_configs(pctldev, map, 470 reserved_maps, 471 num_maps, 472 grp->name, 473 configs, 474 num_configs, 475 PIN_MAP_TYPE_CONFIGS_GROUP); 476 if (err < 0) 477 goto exit; 478 } 479 } 480 481 err = 0; 482 483 exit: 484 kfree(configs); 485 return err; 486 } 487 488 static int mtk_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev, 489 struct device_node *np_config, 490 struct pinctrl_map **map, 491 unsigned *num_maps) 492 { 493 struct device_node *np; 494 unsigned reserved_maps; 495 int ret; 496 497 *map = NULL; 498 *num_maps = 0; 499 reserved_maps = 0; 500 501 for_each_child_of_node(np_config, np) { 502 ret = mtk_pctrl_dt_subnode_to_map(pctldev, np, map, 503 &reserved_maps, 504 num_maps); 505 if (ret < 0) { 506 pinctrl_utils_free_map(pctldev, *map, *num_maps); 507 of_node_put(np); 508 return ret; 509 } 510 } 511 512 return 0; 513 } 514 515 static int mtk_pctrl_get_groups_count(struct pinctrl_dev *pctldev) 516 { 517 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 518 519 return hw->soc->ngrps; 520 } 521 522 static const char *mtk_pctrl_get_group_name(struct pinctrl_dev *pctldev, 523 unsigned group) 524 { 525 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 526 527 return hw->groups[group].name; 528 } 529 530 static int mtk_pctrl_get_group_pins(struct pinctrl_dev *pctldev, 531 unsigned group, const unsigned **pins, 532 unsigned *num_pins) 533 { 534 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 535 536 *pins = (unsigned *)&hw->groups[group].pin; 537 *num_pins = 1; 538 539 return 0; 540 } 541 542 static int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int field) 543 { 544 const struct mtk_pin_desc *desc; 545 int value, err; 546 547 if (gpio >= hw->soc->npins) 548 return -EINVAL; 549 550 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 551 552 err = mtk_hw_get_value(hw, desc, field, &value); 553 if (err) 554 return err; 555 556 return value; 557 } 558 559 #define mtk_pctrl_get_pinmux(hw, gpio) \ 560 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_MODE) 561 562 #define mtk_pctrl_get_direction(hw, gpio) \ 563 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DIR) 564 565 #define mtk_pctrl_get_out(hw, gpio) \ 566 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DO) 567 568 #define mtk_pctrl_get_in(hw, gpio) \ 569 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DI) 570 571 #define mtk_pctrl_get_smt(hw, gpio) \ 572 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_SMT) 573 574 #define mtk_pctrl_get_ies(hw, gpio) \ 575 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_IES) 576 577 #define mtk_pctrl_get_driving(hw, gpio) \ 578 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV) 579 580 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw, 581 unsigned int gpio, char *buf, unsigned int bufLen) 582 { 583 int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1; 584 const struct mtk_pin_desc *desc; 585 586 if (gpio >= hw->soc->npins) 587 return -EINVAL; 588 589 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 590 pinmux = mtk_pctrl_get_pinmux(hw, gpio); 591 if (pinmux >= hw->soc->nfuncs) 592 pinmux -= hw->soc->nfuncs; 593 594 mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen); 595 if (pullen == MTK_PUPD_SET_R1R0_00) { 596 pullen = 0; 597 r1 = 0; 598 r0 = 0; 599 } else if (pullen == MTK_PUPD_SET_R1R0_01) { 600 pullen = 1; 601 r1 = 0; 602 r0 = 1; 603 } else if (pullen == MTK_PUPD_SET_R1R0_10) { 604 pullen = 1; 605 r1 = 1; 606 r0 = 0; 607 } else if (pullen == MTK_PUPD_SET_R1R0_11) { 608 pullen = 1; 609 r1 = 1; 610 r0 = 1; 611 } else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) { 612 pullen = 0; 613 } 614 len += scnprintf(buf + len, bufLen - len, 615 "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d", 616 gpio, 617 pinmux, 618 mtk_pctrl_get_direction(hw, gpio), 619 mtk_pctrl_get_out(hw, gpio), 620 mtk_pctrl_get_in(hw, gpio), 621 mtk_pctrl_get_driving(hw, gpio), 622 mtk_pctrl_get_smt(hw, gpio), 623 mtk_pctrl_get_ies(hw, gpio), 624 pullen, 625 pullup); 626 627 if (r1 != -1) { 628 len += scnprintf(buf + len, bufLen - len, " (%1d %1d)\n", 629 r1, r0); 630 } else { 631 len += scnprintf(buf + len, bufLen - len, "\n"); 632 } 633 634 return len; 635 } 636 637 #define PIN_DBG_BUF_SZ 96 638 static void mtk_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, 639 unsigned int gpio) 640 { 641 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 642 char buf[PIN_DBG_BUF_SZ]; 643 644 (void)mtk_pctrl_show_one_pin(hw, gpio, buf, PIN_DBG_BUF_SZ); 645 646 seq_printf(s, "%s", buf); 647 } 648 649 static const struct pinctrl_ops mtk_pctlops = { 650 .dt_node_to_map = mtk_pctrl_dt_node_to_map, 651 .dt_free_map = pinctrl_utils_free_map, 652 .get_groups_count = mtk_pctrl_get_groups_count, 653 .get_group_name = mtk_pctrl_get_group_name, 654 .get_group_pins = mtk_pctrl_get_group_pins, 655 .pin_dbg_show = mtk_pctrl_dbg_show, 656 }; 657 658 static int mtk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) 659 { 660 return ARRAY_SIZE(mtk_gpio_functions); 661 } 662 663 static const char *mtk_pmx_get_func_name(struct pinctrl_dev *pctldev, 664 unsigned selector) 665 { 666 return mtk_gpio_functions[selector]; 667 } 668 669 static int mtk_pmx_get_func_groups(struct pinctrl_dev *pctldev, 670 unsigned function, 671 const char * const **groups, 672 unsigned * const num_groups) 673 { 674 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 675 676 *groups = hw->grp_names; 677 *num_groups = hw->soc->ngrps; 678 679 return 0; 680 } 681 682 static int mtk_pmx_set_mux(struct pinctrl_dev *pctldev, 683 unsigned function, 684 unsigned group) 685 { 686 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 687 struct mtk_pinctrl_group *grp = hw->groups + group; 688 const struct mtk_func_desc *desc_func; 689 const struct mtk_pin_desc *desc; 690 bool ret; 691 692 ret = mtk_pctrl_is_function_valid(hw, grp->pin, function); 693 if (!ret) { 694 dev_err(hw->dev, "invalid function %d on group %d .\n", 695 function, group); 696 return -EINVAL; 697 } 698 699 desc_func = mtk_pctrl_find_function_by_pin(hw, grp->pin, function); 700 if (!desc_func) 701 return -EINVAL; 702 703 desc = (const struct mtk_pin_desc *)&hw->soc->pins[grp->pin]; 704 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, desc_func->muxval); 705 706 return 0; 707 } 708 709 static const struct pinmux_ops mtk_pmxops = { 710 .get_functions_count = mtk_pmx_get_funcs_cnt, 711 .get_function_name = mtk_pmx_get_func_name, 712 .get_function_groups = mtk_pmx_get_func_groups, 713 .set_mux = mtk_pmx_set_mux, 714 .gpio_set_direction = mtk_pinmux_gpio_set_direction, 715 .gpio_request_enable = mtk_pinmux_gpio_request_enable, 716 }; 717 718 static int mtk_pconf_group_get(struct pinctrl_dev *pctldev, unsigned group, 719 unsigned long *config) 720 { 721 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 722 723 *config = hw->groups[group].config; 724 725 return 0; 726 } 727 728 static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group, 729 unsigned long *configs, unsigned num_configs) 730 { 731 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 732 struct mtk_pinctrl_group *grp = &hw->groups[group]; 733 int i, ret; 734 735 for (i = 0; i < num_configs; i++) { 736 ret = mtk_pinconf_set(pctldev, grp->pin, 737 pinconf_to_config_param(configs[i]), 738 pinconf_to_config_argument(configs[i])); 739 if (ret < 0) 740 return ret; 741 742 grp->config = configs[i]; 743 } 744 745 return 0; 746 } 747 748 static const struct pinconf_ops mtk_confops = { 749 .pin_config_get = mtk_pinconf_get, 750 .pin_config_group_get = mtk_pconf_group_get, 751 .pin_config_group_set = mtk_pconf_group_set, 752 .is_generic = true, 753 }; 754 755 static struct pinctrl_desc mtk_desc = { 756 .name = PINCTRL_PINCTRL_DEV, 757 .pctlops = &mtk_pctlops, 758 .pmxops = &mtk_pmxops, 759 .confops = &mtk_confops, 760 .owner = THIS_MODULE, 761 }; 762 763 static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int gpio) 764 { 765 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 766 const struct mtk_pin_desc *desc; 767 int value, err; 768 769 if (gpio >= hw->soc->npins) 770 return -EINVAL; 771 772 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 773 774 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &value); 775 if (err) 776 return err; 777 778 if (value) 779 return GPIO_LINE_DIRECTION_OUT; 780 781 return GPIO_LINE_DIRECTION_IN; 782 } 783 784 static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) 785 { 786 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 787 const struct mtk_pin_desc *desc; 788 int value, err; 789 790 if (gpio >= hw->soc->npins) 791 return -EINVAL; 792 793 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 794 795 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); 796 if (err) 797 return err; 798 799 return !!value; 800 } 801 802 static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value) 803 { 804 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 805 const struct mtk_pin_desc *desc; 806 807 if (gpio >= hw->soc->npins) 808 return; 809 810 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 811 812 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value); 813 } 814 815 static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio) 816 { 817 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 818 819 if (gpio >= hw->soc->npins) 820 return -EINVAL; 821 822 return pinctrl_gpio_direction_input(chip->base + gpio); 823 } 824 825 static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio, 826 int value) 827 { 828 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 829 830 if (gpio >= hw->soc->npins) 831 return -EINVAL; 832 833 mtk_gpio_set(chip, gpio, value); 834 835 return pinctrl_gpio_direction_output(chip->base + gpio); 836 } 837 838 static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) 839 { 840 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 841 const struct mtk_pin_desc *desc; 842 843 if (!hw->eint) 844 return -ENOTSUPP; 845 846 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; 847 848 if (desc->eint.eint_n == EINT_NA) 849 return -ENOTSUPP; 850 851 return mtk_eint_find_irq(hw->eint, desc->eint.eint_n); 852 } 853 854 static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset, 855 unsigned long config) 856 { 857 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 858 const struct mtk_pin_desc *desc; 859 u32 debounce; 860 861 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; 862 863 if (!hw->eint || 864 pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE || 865 desc->eint.eint_n == EINT_NA) 866 return -ENOTSUPP; 867 868 debounce = pinconf_to_config_argument(config); 869 870 return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce); 871 } 872 873 static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np) 874 { 875 struct gpio_chip *chip = &hw->chip; 876 int ret; 877 878 chip->label = PINCTRL_PINCTRL_DEV; 879 chip->parent = hw->dev; 880 chip->request = gpiochip_generic_request; 881 chip->free = gpiochip_generic_free; 882 chip->get_direction = mtk_gpio_get_direction; 883 chip->direction_input = mtk_gpio_direction_input; 884 chip->direction_output = mtk_gpio_direction_output; 885 chip->get = mtk_gpio_get; 886 chip->set = mtk_gpio_set; 887 chip->to_irq = mtk_gpio_to_irq, 888 chip->set_config = mtk_gpio_set_config, 889 chip->base = -1; 890 chip->ngpio = hw->soc->npins; 891 chip->of_node = np; 892 chip->of_gpio_n_cells = 2; 893 894 ret = gpiochip_add_data(chip, hw); 895 if (ret < 0) 896 return ret; 897 898 return 0; 899 } 900 901 static int mtk_pctrl_build_state(struct platform_device *pdev) 902 { 903 struct mtk_pinctrl *hw = platform_get_drvdata(pdev); 904 int i; 905 906 /* Allocate groups */ 907 hw->groups = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps, 908 sizeof(*hw->groups), GFP_KERNEL); 909 if (!hw->groups) 910 return -ENOMEM; 911 912 /* We assume that one pin is one group, use pin name as group name. */ 913 hw->grp_names = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps, 914 sizeof(*hw->grp_names), GFP_KERNEL); 915 if (!hw->grp_names) 916 return -ENOMEM; 917 918 for (i = 0; i < hw->soc->npins; i++) { 919 const struct mtk_pin_desc *pin = hw->soc->pins + i; 920 struct mtk_pinctrl_group *group = hw->groups + i; 921 922 group->name = pin->name; 923 group->pin = pin->number; 924 925 hw->grp_names[i] = pin->name; 926 } 927 928 return 0; 929 } 930 931 int mtk_paris_pinctrl_probe(struct platform_device *pdev, 932 const struct mtk_pin_soc *soc) 933 { 934 struct pinctrl_pin_desc *pins; 935 struct mtk_pinctrl *hw; 936 struct resource *res; 937 int err, i; 938 939 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL); 940 if (!hw) 941 return -ENOMEM; 942 943 platform_set_drvdata(pdev, hw); 944 hw->soc = soc; 945 hw->dev = &pdev->dev; 946 947 if (!hw->soc->nbase_names) { 948 dev_err(&pdev->dev, 949 "SoC should be assigned at least one register base\n"); 950 return -EINVAL; 951 } 952 953 hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names, 954 sizeof(*hw->base), GFP_KERNEL); 955 if (!hw->base) 956 return -ENOMEM; 957 958 for (i = 0; i < hw->soc->nbase_names; i++) { 959 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 960 hw->soc->base_names[i]); 961 if (!res) { 962 dev_err(&pdev->dev, "missing IO resource\n"); 963 return -ENXIO; 964 } 965 966 hw->base[i] = devm_ioremap_resource(&pdev->dev, res); 967 if (IS_ERR(hw->base[i])) 968 return PTR_ERR(hw->base[i]); 969 } 970 971 hw->nbase = hw->soc->nbase_names; 972 973 err = mtk_pctrl_build_state(pdev); 974 if (err) { 975 dev_err(&pdev->dev, "build state failed: %d\n", err); 976 return -EINVAL; 977 } 978 979 /* Copy from internal struct mtk_pin_desc to register to the core */ 980 pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins), 981 GFP_KERNEL); 982 if (!pins) 983 return -ENOMEM; 984 985 for (i = 0; i < hw->soc->npins; i++) { 986 pins[i].number = hw->soc->pins[i].number; 987 pins[i].name = hw->soc->pins[i].name; 988 } 989 990 /* Setup pins descriptions per SoC types */ 991 mtk_desc.pins = (const struct pinctrl_pin_desc *)pins; 992 mtk_desc.npins = hw->soc->npins; 993 mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings); 994 mtk_desc.custom_params = mtk_custom_bindings; 995 #ifdef CONFIG_DEBUG_FS 996 mtk_desc.custom_conf_items = mtk_conf_items; 997 #endif 998 999 err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw, 1000 &hw->pctrl); 1001 if (err) 1002 return err; 1003 1004 err = pinctrl_enable(hw->pctrl); 1005 if (err) 1006 return err; 1007 1008 err = mtk_build_eint(hw, pdev); 1009 if (err) 1010 dev_warn(&pdev->dev, 1011 "Failed to add EINT, but pinctrl still can work\n"); 1012 1013 /* Build gpiochip should be after pinctrl_enable is done */ 1014 err = mtk_build_gpiochip(hw, pdev->dev.of_node); 1015 if (err) { 1016 dev_err(&pdev->dev, "Failed to add gpio_chip\n"); 1017 return err; 1018 } 1019 1020 platform_set_drvdata(pdev, hw); 1021 1022 return 0; 1023 } 1024 1025 static int mtk_paris_pinctrl_suspend(struct device *device) 1026 { 1027 struct mtk_pinctrl *pctl = dev_get_drvdata(device); 1028 1029 return mtk_eint_do_suspend(pctl->eint); 1030 } 1031 1032 static int mtk_paris_pinctrl_resume(struct device *device) 1033 { 1034 struct mtk_pinctrl *pctl = dev_get_drvdata(device); 1035 1036 return mtk_eint_do_resume(pctl->eint); 1037 } 1038 1039 const struct dev_pm_ops mtk_paris_pinctrl_pm_ops = { 1040 .suspend_noirq = mtk_paris_pinctrl_suspend, 1041 .resume_noirq = mtk_paris_pinctrl_resume, 1042 }; 1043