1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 MediaTek Inc. 4 * 5 * Author: Sean Wang <sean.wang@mediatek.com> 6 * 7 */ 8 9 #include <dt-bindings/pinctrl/mt65xx.h> 10 #include <linux/device.h> 11 #include <linux/err.h> 12 #include <linux/gpio/driver.h> 13 #include <linux/platform_device.h> 14 #include <linux/io.h> 15 #include <linux/module.h> 16 #include <linux/of_irq.h> 17 18 #include "mtk-eint.h" 19 #include "pinctrl-mtk-common-v2.h" 20 21 /** 22 * struct mtk_drive_desc - the structure that holds the information 23 * of the driving current 24 * @min: the minimum current of this group 25 * @max: the maximum current of this group 26 * @step: the step current of this group 27 * @scal: the weight factor 28 * 29 * formula: output = ((input) / step - 1) * scal 30 */ 31 struct mtk_drive_desc { 32 u8 min; 33 u8 max; 34 u8 step; 35 u8 scal; 36 }; 37 38 /* The groups of drive strength */ 39 static const struct mtk_drive_desc mtk_drive[] = { 40 [DRV_GRP0] = { 4, 16, 4, 1 }, 41 [DRV_GRP1] = { 4, 16, 4, 2 }, 42 [DRV_GRP2] = { 2, 8, 2, 1 }, 43 [DRV_GRP3] = { 2, 8, 2, 2 }, 44 [DRV_GRP4] = { 2, 16, 2, 1 }, 45 }; 46 47 static void mtk_w32(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 val) 48 { 49 writel_relaxed(val, pctl->base[i] + reg); 50 } 51 52 static u32 mtk_r32(struct mtk_pinctrl *pctl, u8 i, u32 reg) 53 { 54 return readl_relaxed(pctl->base[i] + reg); 55 } 56 57 void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set) 58 { 59 u32 val; 60 unsigned long flags; 61 62 spin_lock_irqsave(&pctl->lock, flags); 63 64 val = mtk_r32(pctl, i, reg); 65 val &= ~mask; 66 val |= set; 67 mtk_w32(pctl, i, reg, val); 68 69 spin_unlock_irqrestore(&pctl->lock, flags); 70 } 71 72 static int mtk_hw_pin_field_lookup(struct mtk_pinctrl *hw, 73 const struct mtk_pin_desc *desc, 74 int field, struct mtk_pin_field *pfd) 75 { 76 const struct mtk_pin_field_calc *c; 77 const struct mtk_pin_reg_calc *rc; 78 int start = 0, end, check; 79 bool found = false; 80 u32 bits; 81 82 if (hw->soc->reg_cal && hw->soc->reg_cal[field].range) { 83 rc = &hw->soc->reg_cal[field]; 84 } else { 85 dev_dbg(hw->dev, 86 "Not support field %d for this soc\n", field); 87 return -ENOTSUPP; 88 } 89 90 end = rc->nranges - 1; 91 92 while (start <= end) { 93 check = (start + end) >> 1; 94 if (desc->number >= rc->range[check].s_pin 95 && desc->number <= rc->range[check].e_pin) { 96 found = true; 97 break; 98 } else if (start == end) 99 break; 100 else if (desc->number < rc->range[check].s_pin) 101 end = check - 1; 102 else 103 start = check + 1; 104 } 105 106 if (!found) { 107 dev_dbg(hw->dev, "Not support field %d for pin = %d (%s)\n", 108 field, desc->number, desc->name); 109 return -ENOTSUPP; 110 } 111 112 c = rc->range + check; 113 114 if (c->i_base > hw->nbase - 1) { 115 dev_err(hw->dev, 116 "Invalid base for field %d for pin = %d (%s)\n", 117 field, desc->number, desc->name); 118 return -EINVAL; 119 } 120 121 /* Calculated bits as the overall offset the pin is located at, 122 * if c->fixed is held, that determines the all the pins in the 123 * range use the same field with the s_pin. 124 */ 125 bits = c->fixed ? c->s_bit : c->s_bit + 126 (desc->number - c->s_pin) * (c->x_bits); 127 128 /* Fill pfd from bits. For example 32-bit register applied is assumed 129 * when c->sz_reg is equal to 32. 130 */ 131 pfd->index = c->i_base; 132 pfd->offset = c->s_addr + c->x_addrs * (bits / c->sz_reg); 133 pfd->bitpos = bits % c->sz_reg; 134 pfd->mask = (1 << c->x_bits) - 1; 135 136 /* pfd->next is used for indicating that bit wrapping-around happens 137 * which requires the manipulation for bit 0 starting in the next 138 * register to form the complete field read/write. 139 */ 140 pfd->next = pfd->bitpos + c->x_bits > c->sz_reg ? c->x_addrs : 0; 141 142 return 0; 143 } 144 145 static int mtk_hw_pin_field_get(struct mtk_pinctrl *hw, 146 const struct mtk_pin_desc *desc, 147 int field, struct mtk_pin_field *pfd) 148 { 149 if (field < 0 || field >= PINCTRL_PIN_REG_MAX) { 150 dev_err(hw->dev, "Invalid Field %d\n", field); 151 return -EINVAL; 152 } 153 154 return mtk_hw_pin_field_lookup(hw, desc, field, pfd); 155 } 156 157 static void mtk_hw_bits_part(struct mtk_pin_field *pf, int *h, int *l) 158 { 159 *l = 32 - pf->bitpos; 160 *h = get_count_order(pf->mask) - *l; 161 } 162 163 static void mtk_hw_write_cross_field(struct mtk_pinctrl *hw, 164 struct mtk_pin_field *pf, int value) 165 { 166 int nbits_l, nbits_h; 167 168 mtk_hw_bits_part(pf, &nbits_h, &nbits_l); 169 170 mtk_rmw(hw, pf->index, pf->offset, pf->mask << pf->bitpos, 171 (value & pf->mask) << pf->bitpos); 172 173 mtk_rmw(hw, pf->index, pf->offset + pf->next, BIT(nbits_h) - 1, 174 (value & pf->mask) >> nbits_l); 175 } 176 177 static void mtk_hw_read_cross_field(struct mtk_pinctrl *hw, 178 struct mtk_pin_field *pf, int *value) 179 { 180 int nbits_l, nbits_h, h, l; 181 182 mtk_hw_bits_part(pf, &nbits_h, &nbits_l); 183 184 l = (mtk_r32(hw, pf->index, pf->offset) 185 >> pf->bitpos) & (BIT(nbits_l) - 1); 186 h = (mtk_r32(hw, pf->index, pf->offset + pf->next)) 187 & (BIT(nbits_h) - 1); 188 189 *value = (h << nbits_l) | l; 190 } 191 192 int mtk_hw_set_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, 193 int field, int value) 194 { 195 struct mtk_pin_field pf; 196 int err; 197 198 err = mtk_hw_pin_field_get(hw, desc, field, &pf); 199 if (err) 200 return err; 201 202 if (value < 0 || value > pf.mask) 203 return -EINVAL; 204 205 if (!pf.next) 206 mtk_rmw(hw, pf.index, pf.offset, pf.mask << pf.bitpos, 207 (value & pf.mask) << pf.bitpos); 208 else 209 mtk_hw_write_cross_field(hw, &pf, value); 210 211 return 0; 212 } 213 EXPORT_SYMBOL_GPL(mtk_hw_set_value); 214 215 int mtk_hw_get_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, 216 int field, int *value) 217 { 218 struct mtk_pin_field pf; 219 int err; 220 221 err = mtk_hw_pin_field_get(hw, desc, field, &pf); 222 if (err) 223 return err; 224 225 if (!pf.next) 226 *value = (mtk_r32(hw, pf.index, pf.offset) 227 >> pf.bitpos) & pf.mask; 228 else 229 mtk_hw_read_cross_field(hw, &pf, value); 230 231 return 0; 232 } 233 EXPORT_SYMBOL_GPL(mtk_hw_get_value); 234 235 static int mtk_xt_find_eint_num(struct mtk_pinctrl *hw, unsigned long eint_n) 236 { 237 const struct mtk_pin_desc *desc; 238 int i = 0; 239 240 desc = (const struct mtk_pin_desc *)hw->soc->pins; 241 242 while (i < hw->soc->npins) { 243 if (desc[i].eint.eint_n == eint_n) 244 return desc[i].number; 245 i++; 246 } 247 248 return EINT_NA; 249 } 250 251 /* 252 * Virtual GPIO only used inside SOC and not being exported to outside SOC. 253 * Some modules use virtual GPIO as eint (e.g. pmif or usb). 254 * In MTK platform, external interrupt (EINT) and GPIO is 1-1 mapping 255 * and we can set GPIO as eint. 256 * But some modules use specific eint which doesn't have real GPIO pin. 257 * So we use virtual GPIO to map it. 258 */ 259 260 bool mtk_is_virt_gpio(struct mtk_pinctrl *hw, unsigned int gpio_n) 261 { 262 const struct mtk_pin_desc *desc; 263 bool virt_gpio = false; 264 265 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; 266 267 /* if the GPIO is not supported for eint mode */ 268 if (desc->eint.eint_m == NO_EINT_SUPPORT) 269 return virt_gpio; 270 271 if (desc->funcs && !desc->funcs[desc->eint.eint_m].name) 272 virt_gpio = true; 273 274 return virt_gpio; 275 } 276 EXPORT_SYMBOL_GPL(mtk_is_virt_gpio); 277 278 static int mtk_xt_get_gpio_n(void *data, unsigned long eint_n, 279 unsigned int *gpio_n, 280 struct gpio_chip **gpio_chip) 281 { 282 struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; 283 const struct mtk_pin_desc *desc; 284 285 desc = (const struct mtk_pin_desc *)hw->soc->pins; 286 *gpio_chip = &hw->chip; 287 288 /* Be greedy to guess first gpio_n is equal to eint_n */ 289 if (desc[eint_n].eint.eint_n == eint_n) 290 *gpio_n = eint_n; 291 else 292 *gpio_n = mtk_xt_find_eint_num(hw, eint_n); 293 294 return *gpio_n == EINT_NA ? -EINVAL : 0; 295 } 296 297 static int mtk_xt_get_gpio_state(void *data, unsigned long eint_n) 298 { 299 struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; 300 const struct mtk_pin_desc *desc; 301 struct gpio_chip *gpio_chip; 302 unsigned int gpio_n; 303 int value, err; 304 305 err = mtk_xt_get_gpio_n(hw, eint_n, &gpio_n, &gpio_chip); 306 if (err) 307 return err; 308 309 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; 310 311 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); 312 if (err) 313 return err; 314 315 return !!value; 316 } 317 318 static int mtk_xt_set_gpio_as_eint(void *data, unsigned long eint_n) 319 { 320 struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; 321 const struct mtk_pin_desc *desc; 322 struct gpio_chip *gpio_chip; 323 unsigned int gpio_n; 324 int err; 325 326 err = mtk_xt_get_gpio_n(hw, eint_n, &gpio_n, &gpio_chip); 327 if (err) 328 return err; 329 330 if (mtk_is_virt_gpio(hw, gpio_n)) 331 return 0; 332 333 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; 334 335 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, 336 desc->eint.eint_m); 337 if (err) 338 return err; 339 340 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, MTK_INPUT); 341 if (err) 342 return err; 343 344 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, MTK_ENABLE); 345 /* SMT is supposed to be supported by every real GPIO and doesn't 346 * support virtual GPIOs, so the extra condition err != -ENOTSUPP 347 * is just for adding EINT support to these virtual GPIOs. It should 348 * add an extra flag in the pin descriptor when more pins with 349 * distinctive characteristic come out. 350 */ 351 if (err && err != -ENOTSUPP) 352 return err; 353 354 return 0; 355 } 356 357 static const struct mtk_eint_xt mtk_eint_xt = { 358 .get_gpio_n = mtk_xt_get_gpio_n, 359 .get_gpio_state = mtk_xt_get_gpio_state, 360 .set_gpio_as_eint = mtk_xt_set_gpio_as_eint, 361 }; 362 363 int mtk_build_eint(struct mtk_pinctrl *hw, struct platform_device *pdev) 364 { 365 struct device_node *np = pdev->dev.of_node; 366 int ret; 367 368 if (!IS_ENABLED(CONFIG_EINT_MTK)) 369 return 0; 370 371 if (!of_property_read_bool(np, "interrupt-controller")) 372 return -ENODEV; 373 374 hw->eint = devm_kzalloc(hw->dev, sizeof(*hw->eint), GFP_KERNEL); 375 if (!hw->eint) 376 return -ENOMEM; 377 378 hw->eint->base = devm_platform_ioremap_resource_byname(pdev, "eint"); 379 if (IS_ERR(hw->eint->base)) { 380 ret = PTR_ERR(hw->eint->base); 381 goto err_free_eint; 382 } 383 384 hw->eint->irq = irq_of_parse_and_map(np, 0); 385 if (!hw->eint->irq) { 386 ret = -EINVAL; 387 goto err_free_eint; 388 } 389 390 if (!hw->soc->eint_hw) { 391 ret = -ENODEV; 392 goto err_free_eint; 393 } 394 395 hw->eint->dev = &pdev->dev; 396 hw->eint->hw = hw->soc->eint_hw; 397 hw->eint->pctl = hw; 398 hw->eint->gpio_xlate = &mtk_eint_xt; 399 400 return mtk_eint_do_init(hw->eint); 401 402 err_free_eint: 403 devm_kfree(hw->dev, hw->eint); 404 hw->eint = NULL; 405 return ret; 406 } 407 EXPORT_SYMBOL_GPL(mtk_build_eint); 408 409 /* Revision 0 */ 410 int mtk_pinconf_bias_disable_set(struct mtk_pinctrl *hw, 411 const struct mtk_pin_desc *desc) 412 { 413 int err; 414 415 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, 416 MTK_DISABLE); 417 if (err) 418 return err; 419 420 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, 421 MTK_DISABLE); 422 if (err) 423 return err; 424 425 return 0; 426 } 427 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_set); 428 429 int mtk_pinconf_bias_disable_get(struct mtk_pinctrl *hw, 430 const struct mtk_pin_desc *desc, int *res) 431 { 432 int v, v2; 433 int err; 434 435 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &v); 436 if (err) 437 return err; 438 439 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &v2); 440 if (err) 441 return err; 442 443 if (v == MTK_ENABLE || v2 == MTK_ENABLE) 444 return -EINVAL; 445 446 *res = 1; 447 448 return 0; 449 } 450 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_get); 451 452 int mtk_pinconf_bias_set(struct mtk_pinctrl *hw, 453 const struct mtk_pin_desc *desc, bool pullup) 454 { 455 int err, arg; 456 457 arg = pullup ? 1 : 2; 458 459 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, arg & 1); 460 if (err) 461 return err; 462 463 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, 464 !!(arg & 2)); 465 if (err) 466 return err; 467 468 return 0; 469 } 470 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set); 471 472 int mtk_pinconf_bias_get(struct mtk_pinctrl *hw, 473 const struct mtk_pin_desc *desc, bool pullup, int *res) 474 { 475 int reg, err, v; 476 477 reg = pullup ? PINCTRL_PIN_REG_PU : PINCTRL_PIN_REG_PD; 478 479 err = mtk_hw_get_value(hw, desc, reg, &v); 480 if (err) 481 return err; 482 483 if (!v) 484 return -EINVAL; 485 486 *res = 1; 487 488 return 0; 489 } 490 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get); 491 492 /* Revision 1 */ 493 int mtk_pinconf_bias_disable_set_rev1(struct mtk_pinctrl *hw, 494 const struct mtk_pin_desc *desc) 495 { 496 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, 497 MTK_DISABLE); 498 } 499 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_set_rev1); 500 501 int mtk_pinconf_bias_disable_get_rev1(struct mtk_pinctrl *hw, 502 const struct mtk_pin_desc *desc, int *res) 503 { 504 int v, err; 505 506 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, &v); 507 if (err) 508 return err; 509 510 if (v == MTK_ENABLE) 511 return -EINVAL; 512 513 *res = 1; 514 515 return 0; 516 } 517 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_get_rev1); 518 519 int mtk_pinconf_bias_set_rev1(struct mtk_pinctrl *hw, 520 const struct mtk_pin_desc *desc, bool pullup) 521 { 522 int err, arg; 523 524 arg = pullup ? MTK_PULLUP : MTK_PULLDOWN; 525 526 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, 527 MTK_ENABLE); 528 if (err) 529 return err; 530 531 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, arg); 532 if (err) 533 return err; 534 535 return 0; 536 } 537 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_rev1); 538 539 int mtk_pinconf_bias_get_rev1(struct mtk_pinctrl *hw, 540 const struct mtk_pin_desc *desc, bool pullup, 541 int *res) 542 { 543 int err, v; 544 545 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, &v); 546 if (err) 547 return err; 548 549 if (v == MTK_DISABLE) 550 return -EINVAL; 551 552 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, &v); 553 if (err) 554 return err; 555 556 if (pullup ^ (v == MTK_PULLUP)) 557 return -EINVAL; 558 559 *res = 1; 560 561 return 0; 562 } 563 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_rev1); 564 565 /* Combo for the following pull register type: 566 * 1. PU + PD 567 * 2. PULLSEL + PULLEN 568 * 3. PUPD + R0 + R1 569 */ 570 static int mtk_pinconf_bias_set_pu_pd(struct mtk_pinctrl *hw, 571 const struct mtk_pin_desc *desc, 572 u32 pullup, u32 arg) 573 { 574 int err, pu, pd; 575 576 if (arg == MTK_DISABLE) { 577 pu = 0; 578 pd = 0; 579 } else if ((arg == MTK_ENABLE) && pullup) { 580 pu = 1; 581 pd = 0; 582 } else if ((arg == MTK_ENABLE) && !pullup) { 583 pu = 0; 584 pd = 1; 585 } else { 586 err = -EINVAL; 587 goto out; 588 } 589 590 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, pu); 591 if (err) 592 goto out; 593 594 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, pd); 595 596 out: 597 return err; 598 } 599 600 static int mtk_pinconf_bias_set_pullsel_pullen(struct mtk_pinctrl *hw, 601 const struct mtk_pin_desc *desc, 602 u32 pullup, u32 arg) 603 { 604 int err, enable; 605 606 if (arg == MTK_DISABLE) 607 enable = 0; 608 else if (arg == MTK_ENABLE) 609 enable = 1; 610 else { 611 err = -EINVAL; 612 goto out; 613 } 614 615 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, enable); 616 if (err) 617 goto out; 618 619 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, pullup); 620 621 out: 622 return err; 623 } 624 625 static int mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw, 626 const struct mtk_pin_desc *desc, 627 u32 pullup, u32 arg) 628 { 629 int err, r0, r1; 630 631 if ((arg == MTK_DISABLE) || (arg == MTK_PUPD_SET_R1R0_00)) { 632 pullup = 0; 633 r0 = 0; 634 r1 = 0; 635 } else if (arg == MTK_PUPD_SET_R1R0_01) { 636 r0 = 1; 637 r1 = 0; 638 } else if (arg == MTK_PUPD_SET_R1R0_10) { 639 r0 = 0; 640 r1 = 1; 641 } else if (arg == MTK_PUPD_SET_R1R0_11) { 642 r0 = 1; 643 r1 = 1; 644 } else { 645 err = -EINVAL; 646 goto out; 647 } 648 649 /* MTK HW PUPD bit: 1 for pull-down, 0 for pull-up */ 650 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PUPD, !pullup); 651 if (err) 652 goto out; 653 654 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R0, r0); 655 if (err) 656 goto out; 657 658 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R1, r1); 659 660 out: 661 return err; 662 } 663 664 static int mtk_hw_pin_rsel_lookup(struct mtk_pinctrl *hw, 665 const struct mtk_pin_desc *desc, 666 u32 pullup, u32 arg, u32 *rsel_val) 667 { 668 const struct mtk_pin_rsel *rsel; 669 int check; 670 bool found = false; 671 672 rsel = hw->soc->pin_rsel; 673 674 for (check = 0; check <= hw->soc->npin_rsel - 1; check++) { 675 if (desc->number >= rsel[check].s_pin && 676 desc->number <= rsel[check].e_pin) { 677 if (pullup) { 678 if (rsel[check].up_rsel == arg) { 679 found = true; 680 *rsel_val = rsel[check].rsel_index; 681 break; 682 } 683 } else { 684 if (rsel[check].down_rsel == arg) { 685 found = true; 686 *rsel_val = rsel[check].rsel_index; 687 break; 688 } 689 } 690 } 691 } 692 693 if (!found) { 694 dev_err(hw->dev, "Not support rsel value %d Ohm for pin = %d (%s)\n", 695 arg, desc->number, desc->name); 696 return -ENOTSUPP; 697 } 698 699 return 0; 700 } 701 702 static int mtk_pinconf_bias_set_rsel(struct mtk_pinctrl *hw, 703 const struct mtk_pin_desc *desc, 704 u32 pullup, u32 arg) 705 { 706 int err, rsel_val; 707 708 if (hw->rsel_si_unit) { 709 /* find pin rsel_index from pin_rsel array*/ 710 err = mtk_hw_pin_rsel_lookup(hw, desc, pullup, arg, &rsel_val); 711 if (err) 712 goto out; 713 } else { 714 if (arg < MTK_PULL_SET_RSEL_000 || 715 arg > MTK_PULL_SET_RSEL_111) { 716 err = -EINVAL; 717 goto out; 718 } 719 720 rsel_val = arg - MTK_PULL_SET_RSEL_000; 721 } 722 723 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_RSEL, rsel_val); 724 if (err) 725 goto out; 726 727 err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, MTK_ENABLE); 728 729 out: 730 return err; 731 } 732 733 int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw, 734 const struct mtk_pin_desc *desc, 735 u32 pullup, u32 arg) 736 { 737 int err = -ENOTSUPP; 738 u32 try_all_type; 739 740 if (hw->soc->pull_type) 741 try_all_type = hw->soc->pull_type[desc->number]; 742 else 743 try_all_type = MTK_PULL_TYPE_MASK; 744 745 if (try_all_type & MTK_PULL_RSEL_TYPE) { 746 err = mtk_pinconf_bias_set_rsel(hw, desc, pullup, arg); 747 if (!err) 748 return err; 749 } 750 751 if (try_all_type & MTK_PULL_PU_PD_TYPE) { 752 err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg); 753 if (!err) 754 return err; 755 } 756 757 if (try_all_type & MTK_PULL_PULLSEL_TYPE) { 758 err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc, 759 pullup, arg); 760 if (!err) 761 return err; 762 } 763 764 if (try_all_type & MTK_PULL_PUPD_R1R0_TYPE) 765 err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg); 766 767 if (err) 768 dev_err(hw->dev, "Invalid pull argument\n"); 769 770 return err; 771 } 772 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo); 773 774 static int mtk_rsel_get_si_unit(struct mtk_pinctrl *hw, 775 const struct mtk_pin_desc *desc, 776 u32 pullup, u32 rsel_val, u32 *si_unit) 777 { 778 const struct mtk_pin_rsel *rsel; 779 int check; 780 781 rsel = hw->soc->pin_rsel; 782 783 for (check = 0; check <= hw->soc->npin_rsel - 1; check++) { 784 if (desc->number >= rsel[check].s_pin && 785 desc->number <= rsel[check].e_pin) { 786 if (rsel_val == rsel[check].rsel_index) { 787 if (pullup) 788 *si_unit = rsel[check].up_rsel; 789 else 790 *si_unit = rsel[check].down_rsel; 791 break; 792 } 793 } 794 } 795 796 return 0; 797 } 798 799 static int mtk_pinconf_bias_get_rsel(struct mtk_pinctrl *hw, 800 const struct mtk_pin_desc *desc, 801 u32 *pullup, u32 *enable) 802 { 803 int pu, pd, rsel, err; 804 805 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL, &rsel); 806 if (err) 807 goto out; 808 809 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu); 810 if (err) 811 goto out; 812 813 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd); 814 815 if (pu == 0 && pd == 0) { 816 *pullup = 0; 817 *enable = MTK_DISABLE; 818 } else if (pu == 1 && pd == 0) { 819 *pullup = 1; 820 if (hw->rsel_si_unit) 821 mtk_rsel_get_si_unit(hw, desc, *pullup, rsel, enable); 822 else 823 *enable = rsel + MTK_PULL_SET_RSEL_000; 824 } else if (pu == 0 && pd == 1) { 825 *pullup = 0; 826 if (hw->rsel_si_unit) 827 mtk_rsel_get_si_unit(hw, desc, *pullup, rsel, enable); 828 else 829 *enable = rsel + MTK_PULL_SET_RSEL_000; 830 } else { 831 err = -EINVAL; 832 goto out; 833 } 834 835 out: 836 return err; 837 } 838 839 static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw, 840 const struct mtk_pin_desc *desc, 841 u32 *pullup, u32 *enable) 842 { 843 int err, pu, pd; 844 845 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu); 846 if (err) 847 goto out; 848 849 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd); 850 if (err) 851 goto out; 852 853 if (pu == 0 && pd == 0) { 854 *pullup = 0; 855 *enable = MTK_DISABLE; 856 } else if (pu == 1 && pd == 0) { 857 *pullup = 1; 858 *enable = MTK_ENABLE; 859 } else if (pu == 0 && pd == 1) { 860 *pullup = 0; 861 *enable = MTK_ENABLE; 862 } else 863 err = -EINVAL; 864 865 out: 866 return err; 867 } 868 869 static int mtk_pinconf_bias_get_pullsel_pullen(struct mtk_pinctrl *hw, 870 const struct mtk_pin_desc *desc, 871 u32 *pullup, u32 *enable) 872 { 873 int err; 874 875 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, pullup); 876 if (err) 877 goto out; 878 879 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, enable); 880 881 out: 882 return err; 883 } 884 885 static int mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw, 886 const struct mtk_pin_desc *desc, 887 u32 *pullup, u32 *enable) 888 { 889 int err, r0, r1; 890 891 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PUPD, pullup); 892 if (err) 893 goto out; 894 /* MTK HW PUPD bit: 1 for pull-down, 0 for pull-up */ 895 *pullup = !(*pullup); 896 897 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R0, &r0); 898 if (err) 899 goto out; 900 901 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R1, &r1); 902 if (err) 903 goto out; 904 905 if ((r1 == 0) && (r0 == 0)) 906 *enable = MTK_PUPD_SET_R1R0_00; 907 else if ((r1 == 0) && (r0 == 1)) 908 *enable = MTK_PUPD_SET_R1R0_01; 909 else if ((r1 == 1) && (r0 == 0)) 910 *enable = MTK_PUPD_SET_R1R0_10; 911 else if ((r1 == 1) && (r0 == 1)) 912 *enable = MTK_PUPD_SET_R1R0_11; 913 else 914 err = -EINVAL; 915 916 out: 917 return err; 918 } 919 920 int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw, 921 const struct mtk_pin_desc *desc, 922 u32 *pullup, u32 *enable) 923 { 924 int err = -ENOTSUPP; 925 u32 try_all_type; 926 927 if (hw->soc->pull_type) 928 try_all_type = hw->soc->pull_type[desc->number]; 929 else 930 try_all_type = MTK_PULL_TYPE_MASK; 931 932 if (try_all_type & MTK_PULL_RSEL_TYPE) { 933 err = mtk_pinconf_bias_get_rsel(hw, desc, pullup, enable); 934 if (!err) 935 return err; 936 } 937 938 if (try_all_type & MTK_PULL_PU_PD_TYPE) { 939 err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable); 940 if (!err) 941 return err; 942 } 943 944 if (try_all_type & MTK_PULL_PULLSEL_TYPE) { 945 err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc, 946 pullup, enable); 947 if (!err) 948 return err; 949 } 950 951 if (try_all_type & MTK_PULL_PUPD_R1R0_TYPE) 952 err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable); 953 954 return err; 955 } 956 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo); 957 958 /* Revision 0 */ 959 int mtk_pinconf_drive_set(struct mtk_pinctrl *hw, 960 const struct mtk_pin_desc *desc, u32 arg) 961 { 962 const struct mtk_drive_desc *tb; 963 int err = -ENOTSUPP; 964 965 tb = &mtk_drive[desc->drv_n]; 966 /* 4mA when (e8, e4) = (0, 0) 967 * 8mA when (e8, e4) = (0, 1) 968 * 12mA when (e8, e4) = (1, 0) 969 * 16mA when (e8, e4) = (1, 1) 970 */ 971 if ((arg >= tb->min && arg <= tb->max) && !(arg % tb->step)) { 972 arg = (arg / tb->step - 1) * tb->scal; 973 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_E4, 974 arg & 0x1); 975 if (err) 976 return err; 977 978 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_E8, 979 (arg & 0x2) >> 1); 980 if (err) 981 return err; 982 } 983 984 return err; 985 } 986 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_set); 987 988 int mtk_pinconf_drive_get(struct mtk_pinctrl *hw, 989 const struct mtk_pin_desc *desc, int *val) 990 { 991 const struct mtk_drive_desc *tb; 992 int err, val1, val2; 993 994 tb = &mtk_drive[desc->drv_n]; 995 996 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_E4, &val1); 997 if (err) 998 return err; 999 1000 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_E8, &val2); 1001 if (err) 1002 return err; 1003 1004 /* 4mA when (e8, e4) = (0, 0); 8mA when (e8, e4) = (0, 1) 1005 * 12mA when (e8, e4) = (1, 0); 16mA when (e8, e4) = (1, 1) 1006 */ 1007 *val = (((val2 << 1) + val1) / tb->scal + 1) * tb->step; 1008 1009 return 0; 1010 } 1011 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_get); 1012 1013 /* Revision 1 */ 1014 int mtk_pinconf_drive_set_rev1(struct mtk_pinctrl *hw, 1015 const struct mtk_pin_desc *desc, u32 arg) 1016 { 1017 const struct mtk_drive_desc *tb; 1018 int err = -ENOTSUPP; 1019 1020 tb = &mtk_drive[desc->drv_n]; 1021 1022 if ((arg >= tb->min && arg <= tb->max) && !(arg % tb->step)) { 1023 arg = (arg / tb->step - 1) * tb->scal; 1024 1025 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV, 1026 arg); 1027 if (err) 1028 return err; 1029 } 1030 1031 return err; 1032 } 1033 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_set_rev1); 1034 1035 int mtk_pinconf_drive_get_rev1(struct mtk_pinctrl *hw, 1036 const struct mtk_pin_desc *desc, int *val) 1037 { 1038 const struct mtk_drive_desc *tb; 1039 int err, val1; 1040 1041 tb = &mtk_drive[desc->drv_n]; 1042 1043 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV, &val1); 1044 if (err) 1045 return err; 1046 1047 *val = ((val1 & 0x7) / tb->scal + 1) * tb->step; 1048 1049 return 0; 1050 } 1051 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_get_rev1); 1052 1053 int mtk_pinconf_drive_set_raw(struct mtk_pinctrl *hw, 1054 const struct mtk_pin_desc *desc, u32 arg) 1055 { 1056 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV, arg); 1057 } 1058 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_set_raw); 1059 1060 int mtk_pinconf_drive_get_raw(struct mtk_pinctrl *hw, 1061 const struct mtk_pin_desc *desc, int *val) 1062 { 1063 return mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV, val); 1064 } 1065 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_get_raw); 1066 1067 int mtk_pinconf_adv_pull_set(struct mtk_pinctrl *hw, 1068 const struct mtk_pin_desc *desc, bool pullup, 1069 u32 arg) 1070 { 1071 int err; 1072 1073 /* 10K off & 50K (75K) off, when (R0, R1) = (0, 0); 1074 * 10K off & 50K (75K) on, when (R0, R1) = (0, 1); 1075 * 10K on & 50K (75K) off, when (R0, R1) = (1, 0); 1076 * 10K on & 50K (75K) on, when (R0, R1) = (1, 1) 1077 */ 1078 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R0, arg & 1); 1079 if (err) 1080 return 0; 1081 1082 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R1, 1083 !!(arg & 2)); 1084 if (err) 1085 return 0; 1086 1087 arg = pullup ? 0 : 1; 1088 1089 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PUPD, arg); 1090 1091 /* If PUPD register is not supported for that pin, let's fallback to 1092 * general bias control. 1093 */ 1094 if (err == -ENOTSUPP) { 1095 if (hw->soc->bias_set) { 1096 err = hw->soc->bias_set(hw, desc, pullup); 1097 if (err) 1098 return err; 1099 } else { 1100 err = mtk_pinconf_bias_set_rev1(hw, desc, pullup); 1101 if (err) 1102 err = mtk_pinconf_bias_set(hw, desc, pullup); 1103 } 1104 } 1105 1106 return err; 1107 } 1108 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_pull_set); 1109 1110 int mtk_pinconf_adv_pull_get(struct mtk_pinctrl *hw, 1111 const struct mtk_pin_desc *desc, bool pullup, 1112 u32 *val) 1113 { 1114 u32 t, t2; 1115 int err; 1116 1117 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PUPD, &t); 1118 1119 /* If PUPD register is not supported for that pin, let's fallback to 1120 * general bias control. 1121 */ 1122 if (err == -ENOTSUPP) { 1123 if (hw->soc->bias_get) { 1124 err = hw->soc->bias_get(hw, desc, pullup, val); 1125 if (err) 1126 return err; 1127 } else { 1128 return -ENOTSUPP; 1129 } 1130 } else { 1131 /* t == 0 supposes PULLUP for the customized PULL setup */ 1132 if (err) 1133 return err; 1134 1135 if (pullup ^ !t) 1136 return -EINVAL; 1137 } 1138 1139 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R0, &t); 1140 if (err) 1141 return err; 1142 1143 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R1, &t2); 1144 if (err) 1145 return err; 1146 1147 *val = (t | t2 << 1) & 0x7; 1148 1149 return 0; 1150 } 1151 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_pull_get); 1152 1153 int mtk_pinconf_adv_drive_set(struct mtk_pinctrl *hw, 1154 const struct mtk_pin_desc *desc, u32 arg) 1155 { 1156 int err; 1157 int en = arg & 1; 1158 int e0 = !!(arg & 2); 1159 int e1 = !!(arg & 4); 1160 1161 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_EN, en); 1162 if (err) 1163 return err; 1164 1165 if (!en) 1166 return err; 1167 1168 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_E0, e0); 1169 if (err) 1170 return err; 1171 1172 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_E1, e1); 1173 if (err) 1174 return err; 1175 1176 return err; 1177 } 1178 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_drive_set); 1179 1180 int mtk_pinconf_adv_drive_get(struct mtk_pinctrl *hw, 1181 const struct mtk_pin_desc *desc, u32 *val) 1182 { 1183 u32 en, e0, e1; 1184 int err; 1185 1186 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_EN, &en); 1187 if (err) 1188 return err; 1189 1190 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_E0, &e0); 1191 if (err) 1192 return err; 1193 1194 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_E1, &e1); 1195 if (err) 1196 return err; 1197 1198 *val = (en | e0 << 1 | e1 << 2) & 0x7; 1199 1200 return 0; 1201 } 1202 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_drive_get); 1203 1204 int mtk_pinconf_adv_drive_set_raw(struct mtk_pinctrl *hw, 1205 const struct mtk_pin_desc *desc, u32 arg) 1206 { 1207 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_ADV, arg); 1208 } 1209 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_drive_set_raw); 1210 1211 int mtk_pinconf_adv_drive_get_raw(struct mtk_pinctrl *hw, 1212 const struct mtk_pin_desc *desc, u32 *val) 1213 { 1214 return mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_ADV, val); 1215 } 1216 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_drive_get_raw); 1217 1218 MODULE_LICENSE("GPL v2"); 1219 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>"); 1220 MODULE_DESCRIPTION("Pin configuration library module for mediatek SoCs"); 1221