1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 MediaTek Inc. 4 * 5 * Author: Sean Wang <sean.wang@mediatek.com> 6 * 7 */ 8 9 #include <dt-bindings/pinctrl/mt65xx.h> 10 #include <linux/device.h> 11 #include <linux/err.h> 12 #include <linux/gpio/driver.h> 13 #include <linux/platform_device.h> 14 #include <linux/io.h> 15 #include <linux/module.h> 16 #include <linux/of_irq.h> 17 18 #include "mtk-eint.h" 19 #include "pinctrl-mtk-common-v2.h" 20 21 /** 22 * struct mtk_drive_desc - the structure that holds the information 23 * of the driving current 24 * @min: the minimum current of this group 25 * @max: the maximum current of this group 26 * @step: the step current of this group 27 * @scal: the weight factor 28 * 29 * formula: output = ((input) / step - 1) * scal 30 */ 31 struct mtk_drive_desc { 32 u8 min; 33 u8 max; 34 u8 step; 35 u8 scal; 36 }; 37 38 /* The groups of drive strength */ 39 static const struct mtk_drive_desc mtk_drive[] = { 40 [DRV_GRP0] = { 4, 16, 4, 1 }, 41 [DRV_GRP1] = { 4, 16, 4, 2 }, 42 [DRV_GRP2] = { 2, 8, 2, 1 }, 43 [DRV_GRP3] = { 2, 8, 2, 2 }, 44 [DRV_GRP4] = { 2, 16, 2, 1 }, 45 }; 46 47 static void mtk_w32(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 val) 48 { 49 writel_relaxed(val, pctl->base[i] + reg); 50 } 51 52 static u32 mtk_r32(struct mtk_pinctrl *pctl, u8 i, u32 reg) 53 { 54 return readl_relaxed(pctl->base[i] + reg); 55 } 56 57 void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set) 58 { 59 u32 val; 60 61 val = mtk_r32(pctl, i, reg); 62 val &= ~mask; 63 val |= set; 64 mtk_w32(pctl, i, reg, val); 65 } 66 67 static int mtk_hw_pin_field_lookup(struct mtk_pinctrl *hw, 68 const struct mtk_pin_desc *desc, 69 int field, struct mtk_pin_field *pfd) 70 { 71 const struct mtk_pin_field_calc *c; 72 const struct mtk_pin_reg_calc *rc; 73 int start = 0, end, check; 74 bool found = false; 75 u32 bits; 76 77 if (hw->soc->reg_cal && hw->soc->reg_cal[field].range) { 78 rc = &hw->soc->reg_cal[field]; 79 } else { 80 dev_dbg(hw->dev, 81 "Not support field %d for this soc\n", field); 82 return -ENOTSUPP; 83 } 84 85 end = rc->nranges - 1; 86 87 while (start <= end) { 88 check = (start + end) >> 1; 89 if (desc->number >= rc->range[check].s_pin 90 && desc->number <= rc->range[check].e_pin) { 91 found = true; 92 break; 93 } else if (start == end) 94 break; 95 else if (desc->number < rc->range[check].s_pin) 96 end = check - 1; 97 else 98 start = check + 1; 99 } 100 101 if (!found) { 102 dev_dbg(hw->dev, "Not support field %d for pin = %d (%s)\n", 103 field, desc->number, desc->name); 104 return -ENOTSUPP; 105 } 106 107 c = rc->range + check; 108 109 if (c->i_base > hw->nbase - 1) { 110 dev_err(hw->dev, 111 "Invalid base for field %d for pin = %d (%s)\n", 112 field, desc->number, desc->name); 113 return -EINVAL; 114 } 115 116 /* Calculated bits as the overall offset the pin is located at, 117 * if c->fixed is held, that determines the all the pins in the 118 * range use the same field with the s_pin. 119 */ 120 bits = c->fixed ? c->s_bit : c->s_bit + 121 (desc->number - c->s_pin) * (c->x_bits); 122 123 /* Fill pfd from bits. For example 32-bit register applied is assumed 124 * when c->sz_reg is equal to 32. 125 */ 126 pfd->index = c->i_base; 127 pfd->offset = c->s_addr + c->x_addrs * (bits / c->sz_reg); 128 pfd->bitpos = bits % c->sz_reg; 129 pfd->mask = (1 << c->x_bits) - 1; 130 131 /* pfd->next is used for indicating that bit wrapping-around happens 132 * which requires the manipulation for bit 0 starting in the next 133 * register to form the complete field read/write. 134 */ 135 pfd->next = pfd->bitpos + c->x_bits > c->sz_reg ? c->x_addrs : 0; 136 137 return 0; 138 } 139 140 static int mtk_hw_pin_field_get(struct mtk_pinctrl *hw, 141 const struct mtk_pin_desc *desc, 142 int field, struct mtk_pin_field *pfd) 143 { 144 if (field < 0 || field >= PINCTRL_PIN_REG_MAX) { 145 dev_err(hw->dev, "Invalid Field %d\n", field); 146 return -EINVAL; 147 } 148 149 return mtk_hw_pin_field_lookup(hw, desc, field, pfd); 150 } 151 152 static void mtk_hw_bits_part(struct mtk_pin_field *pf, int *h, int *l) 153 { 154 *l = 32 - pf->bitpos; 155 *h = get_count_order(pf->mask) - *l; 156 } 157 158 static void mtk_hw_write_cross_field(struct mtk_pinctrl *hw, 159 struct mtk_pin_field *pf, int value) 160 { 161 int nbits_l, nbits_h; 162 163 mtk_hw_bits_part(pf, &nbits_h, &nbits_l); 164 165 mtk_rmw(hw, pf->index, pf->offset, pf->mask << pf->bitpos, 166 (value & pf->mask) << pf->bitpos); 167 168 mtk_rmw(hw, pf->index, pf->offset + pf->next, BIT(nbits_h) - 1, 169 (value & pf->mask) >> nbits_l); 170 } 171 172 static void mtk_hw_read_cross_field(struct mtk_pinctrl *hw, 173 struct mtk_pin_field *pf, int *value) 174 { 175 int nbits_l, nbits_h, h, l; 176 177 mtk_hw_bits_part(pf, &nbits_h, &nbits_l); 178 179 l = (mtk_r32(hw, pf->index, pf->offset) 180 >> pf->bitpos) & (BIT(nbits_l) - 1); 181 h = (mtk_r32(hw, pf->index, pf->offset + pf->next)) 182 & (BIT(nbits_h) - 1); 183 184 *value = (h << nbits_l) | l; 185 } 186 187 int mtk_hw_set_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, 188 int field, int value) 189 { 190 struct mtk_pin_field pf; 191 int err; 192 193 err = mtk_hw_pin_field_get(hw, desc, field, &pf); 194 if (err) 195 return err; 196 197 if (value < 0 || value > pf.mask) 198 return -EINVAL; 199 200 if (!pf.next) 201 mtk_rmw(hw, pf.index, pf.offset, pf.mask << pf.bitpos, 202 (value & pf.mask) << pf.bitpos); 203 else 204 mtk_hw_write_cross_field(hw, &pf, value); 205 206 return 0; 207 } 208 EXPORT_SYMBOL_GPL(mtk_hw_set_value); 209 210 int mtk_hw_get_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, 211 int field, int *value) 212 { 213 struct mtk_pin_field pf; 214 int err; 215 216 err = mtk_hw_pin_field_get(hw, desc, field, &pf); 217 if (err) 218 return err; 219 220 if (!pf.next) 221 *value = (mtk_r32(hw, pf.index, pf.offset) 222 >> pf.bitpos) & pf.mask; 223 else 224 mtk_hw_read_cross_field(hw, &pf, value); 225 226 return 0; 227 } 228 EXPORT_SYMBOL_GPL(mtk_hw_get_value); 229 230 static int mtk_xt_find_eint_num(struct mtk_pinctrl *hw, unsigned long eint_n) 231 { 232 const struct mtk_pin_desc *desc; 233 int i = 0; 234 235 desc = (const struct mtk_pin_desc *)hw->soc->pins; 236 237 while (i < hw->soc->npins) { 238 if (desc[i].eint.eint_n == eint_n) 239 return desc[i].number; 240 i++; 241 } 242 243 return EINT_NA; 244 } 245 246 /* 247 * Virtual GPIO only used inside SOC and not being exported to outside SOC. 248 * Some modules use virtual GPIO as eint (e.g. pmif or usb). 249 * In MTK platform, external interrupt (EINT) and GPIO is 1-1 mapping 250 * and we can set GPIO as eint. 251 * But some modules use specific eint which doesn't have real GPIO pin. 252 * So we use virtual GPIO to map it. 253 */ 254 255 bool mtk_is_virt_gpio(struct mtk_pinctrl *hw, unsigned int gpio_n) 256 { 257 const struct mtk_pin_desc *desc; 258 bool virt_gpio = false; 259 260 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; 261 262 /* if the GPIO is not supported for eint mode */ 263 if (desc->eint.eint_m == NO_EINT_SUPPORT) 264 return virt_gpio; 265 266 if (desc->funcs && !desc->funcs[desc->eint.eint_m].name) 267 virt_gpio = true; 268 269 return virt_gpio; 270 } 271 EXPORT_SYMBOL_GPL(mtk_is_virt_gpio); 272 273 static int mtk_xt_get_gpio_n(void *data, unsigned long eint_n, 274 unsigned int *gpio_n, 275 struct gpio_chip **gpio_chip) 276 { 277 struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; 278 const struct mtk_pin_desc *desc; 279 280 desc = (const struct mtk_pin_desc *)hw->soc->pins; 281 *gpio_chip = &hw->chip; 282 283 /* Be greedy to guess first gpio_n is equal to eint_n */ 284 if (desc[eint_n].eint.eint_n == eint_n) 285 *gpio_n = eint_n; 286 else 287 *gpio_n = mtk_xt_find_eint_num(hw, eint_n); 288 289 return *gpio_n == EINT_NA ? -EINVAL : 0; 290 } 291 292 static int mtk_xt_get_gpio_state(void *data, unsigned long eint_n) 293 { 294 struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; 295 const struct mtk_pin_desc *desc; 296 struct gpio_chip *gpio_chip; 297 unsigned int gpio_n; 298 int value, err; 299 300 err = mtk_xt_get_gpio_n(hw, eint_n, &gpio_n, &gpio_chip); 301 if (err) 302 return err; 303 304 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; 305 306 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); 307 if (err) 308 return err; 309 310 return !!value; 311 } 312 313 static int mtk_xt_set_gpio_as_eint(void *data, unsigned long eint_n) 314 { 315 struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; 316 const struct mtk_pin_desc *desc; 317 struct gpio_chip *gpio_chip; 318 unsigned int gpio_n; 319 int err; 320 321 err = mtk_xt_get_gpio_n(hw, eint_n, &gpio_n, &gpio_chip); 322 if (err) 323 return err; 324 325 if (mtk_is_virt_gpio(hw, gpio_n)) 326 return 0; 327 328 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; 329 330 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, 331 desc->eint.eint_m); 332 if (err) 333 return err; 334 335 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, MTK_INPUT); 336 if (err) 337 return err; 338 339 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, MTK_ENABLE); 340 /* SMT is supposed to be supported by every real GPIO and doesn't 341 * support virtual GPIOs, so the extra condition err != -ENOTSUPP 342 * is just for adding EINT support to these virtual GPIOs. It should 343 * add an extra flag in the pin descriptor when more pins with 344 * distinctive characteristic come out. 345 */ 346 if (err && err != -ENOTSUPP) 347 return err; 348 349 return 0; 350 } 351 352 static const struct mtk_eint_xt mtk_eint_xt = { 353 .get_gpio_n = mtk_xt_get_gpio_n, 354 .get_gpio_state = mtk_xt_get_gpio_state, 355 .set_gpio_as_eint = mtk_xt_set_gpio_as_eint, 356 }; 357 358 int mtk_build_eint(struct mtk_pinctrl *hw, struct platform_device *pdev) 359 { 360 struct device_node *np = pdev->dev.of_node; 361 int ret; 362 363 if (!IS_ENABLED(CONFIG_EINT_MTK)) 364 return 0; 365 366 if (!of_property_read_bool(np, "interrupt-controller")) 367 return -ENODEV; 368 369 hw->eint = devm_kzalloc(hw->dev, sizeof(*hw->eint), GFP_KERNEL); 370 if (!hw->eint) 371 return -ENOMEM; 372 373 hw->eint->base = devm_platform_ioremap_resource_byname(pdev, "eint"); 374 if (IS_ERR(hw->eint->base)) { 375 ret = PTR_ERR(hw->eint->base); 376 goto err_free_eint; 377 } 378 379 hw->eint->irq = irq_of_parse_and_map(np, 0); 380 if (!hw->eint->irq) { 381 ret = -EINVAL; 382 goto err_free_eint; 383 } 384 385 if (!hw->soc->eint_hw) { 386 ret = -ENODEV; 387 goto err_free_eint; 388 } 389 390 hw->eint->dev = &pdev->dev; 391 hw->eint->hw = hw->soc->eint_hw; 392 hw->eint->pctl = hw; 393 hw->eint->gpio_xlate = &mtk_eint_xt; 394 395 return mtk_eint_do_init(hw->eint); 396 397 err_free_eint: 398 devm_kfree(hw->dev, hw->eint); 399 hw->eint = NULL; 400 return ret; 401 } 402 EXPORT_SYMBOL_GPL(mtk_build_eint); 403 404 /* Revision 0 */ 405 int mtk_pinconf_bias_disable_set(struct mtk_pinctrl *hw, 406 const struct mtk_pin_desc *desc) 407 { 408 int err; 409 410 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, 411 MTK_DISABLE); 412 if (err) 413 return err; 414 415 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, 416 MTK_DISABLE); 417 if (err) 418 return err; 419 420 return 0; 421 } 422 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_set); 423 424 int mtk_pinconf_bias_disable_get(struct mtk_pinctrl *hw, 425 const struct mtk_pin_desc *desc, int *res) 426 { 427 int v, v2; 428 int err; 429 430 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &v); 431 if (err) 432 return err; 433 434 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &v2); 435 if (err) 436 return err; 437 438 if (v == MTK_ENABLE || v2 == MTK_ENABLE) 439 return -EINVAL; 440 441 *res = 1; 442 443 return 0; 444 } 445 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_get); 446 447 int mtk_pinconf_bias_set(struct mtk_pinctrl *hw, 448 const struct mtk_pin_desc *desc, bool pullup) 449 { 450 int err, arg; 451 452 arg = pullup ? 1 : 2; 453 454 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, arg & 1); 455 if (err) 456 return err; 457 458 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, 459 !!(arg & 2)); 460 if (err) 461 return err; 462 463 return 0; 464 } 465 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set); 466 467 int mtk_pinconf_bias_get(struct mtk_pinctrl *hw, 468 const struct mtk_pin_desc *desc, bool pullup, int *res) 469 { 470 int reg, err, v; 471 472 reg = pullup ? PINCTRL_PIN_REG_PU : PINCTRL_PIN_REG_PD; 473 474 err = mtk_hw_get_value(hw, desc, reg, &v); 475 if (err) 476 return err; 477 478 if (!v) 479 return -EINVAL; 480 481 *res = 1; 482 483 return 0; 484 } 485 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get); 486 487 /* Revision 1 */ 488 int mtk_pinconf_bias_disable_set_rev1(struct mtk_pinctrl *hw, 489 const struct mtk_pin_desc *desc) 490 { 491 int err; 492 493 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, 494 MTK_DISABLE); 495 if (err) 496 return err; 497 498 return 0; 499 } 500 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_set_rev1); 501 502 int mtk_pinconf_bias_disable_get_rev1(struct mtk_pinctrl *hw, 503 const struct mtk_pin_desc *desc, int *res) 504 { 505 int v, err; 506 507 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, &v); 508 if (err) 509 return err; 510 511 if (v == MTK_ENABLE) 512 return -EINVAL; 513 514 *res = 1; 515 516 return 0; 517 } 518 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_get_rev1); 519 520 int mtk_pinconf_bias_set_rev1(struct mtk_pinctrl *hw, 521 const struct mtk_pin_desc *desc, bool pullup) 522 { 523 int err, arg; 524 525 arg = pullup ? MTK_PULLUP : MTK_PULLDOWN; 526 527 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, 528 MTK_ENABLE); 529 if (err) 530 return err; 531 532 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, arg); 533 if (err) 534 return err; 535 536 return 0; 537 } 538 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_rev1); 539 540 int mtk_pinconf_bias_get_rev1(struct mtk_pinctrl *hw, 541 const struct mtk_pin_desc *desc, bool pullup, 542 int *res) 543 { 544 int err, v; 545 546 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, &v); 547 if (err) 548 return err; 549 550 if (v == MTK_DISABLE) 551 return -EINVAL; 552 553 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, &v); 554 if (err) 555 return err; 556 557 if (pullup ^ (v == MTK_PULLUP)) 558 return -EINVAL; 559 560 *res = 1; 561 562 return 0; 563 } 564 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_rev1); 565 566 /* Combo for the following pull register type: 567 * 1. PU + PD 568 * 2. PULLSEL + PULLEN 569 * 3. PUPD + R0 + R1 570 */ 571 static int mtk_pinconf_bias_set_pu_pd(struct mtk_pinctrl *hw, 572 const struct mtk_pin_desc *desc, 573 u32 pullup, u32 arg) 574 { 575 int err, pu, pd; 576 577 if (arg == MTK_DISABLE) { 578 pu = 0; 579 pd = 0; 580 } else if ((arg == MTK_ENABLE) && pullup) { 581 pu = 1; 582 pd = 0; 583 } else if ((arg == MTK_ENABLE) && !pullup) { 584 pu = 0; 585 pd = 1; 586 } else { 587 err = -EINVAL; 588 goto out; 589 } 590 591 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, pu); 592 if (err) 593 goto out; 594 595 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, pd); 596 597 out: 598 return err; 599 } 600 601 static int mtk_pinconf_bias_set_pullsel_pullen(struct mtk_pinctrl *hw, 602 const struct mtk_pin_desc *desc, 603 u32 pullup, u32 arg) 604 { 605 int err, enable; 606 607 if (arg == MTK_DISABLE) 608 enable = 0; 609 else if (arg == MTK_ENABLE) 610 enable = 1; 611 else { 612 err = -EINVAL; 613 goto out; 614 } 615 616 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, enable); 617 if (err) 618 goto out; 619 620 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, pullup); 621 622 out: 623 return err; 624 } 625 626 static int mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw, 627 const struct mtk_pin_desc *desc, 628 u32 pullup, u32 arg) 629 { 630 int err, r0, r1; 631 632 if ((arg == MTK_DISABLE) || (arg == MTK_PUPD_SET_R1R0_00)) { 633 pullup = 0; 634 r0 = 0; 635 r1 = 0; 636 } else if (arg == MTK_PUPD_SET_R1R0_01) { 637 r0 = 1; 638 r1 = 0; 639 } else if (arg == MTK_PUPD_SET_R1R0_10) { 640 r0 = 0; 641 r1 = 1; 642 } else if (arg == MTK_PUPD_SET_R1R0_11) { 643 r0 = 1; 644 r1 = 1; 645 } else { 646 err = -EINVAL; 647 goto out; 648 } 649 650 /* MTK HW PUPD bit: 1 for pull-down, 0 for pull-up */ 651 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PUPD, !pullup); 652 if (err) 653 goto out; 654 655 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R0, r0); 656 if (err) 657 goto out; 658 659 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R1, r1); 660 661 out: 662 return err; 663 } 664 665 static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw, 666 const struct mtk_pin_desc *desc, 667 u32 *pullup, u32 *enable) 668 { 669 int err, pu, pd; 670 671 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu); 672 if (err) 673 goto out; 674 675 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd); 676 if (err) 677 goto out; 678 679 if (pu == 0 && pd == 0) { 680 *pullup = 0; 681 *enable = MTK_DISABLE; 682 } else if (pu == 1 && pd == 0) { 683 *pullup = 1; 684 *enable = MTK_ENABLE; 685 } else if (pu == 0 && pd == 1) { 686 *pullup = 0; 687 *enable = MTK_ENABLE; 688 } else 689 err = -EINVAL; 690 691 out: 692 return err; 693 } 694 695 static int mtk_pinconf_bias_get_pullsel_pullen(struct mtk_pinctrl *hw, 696 const struct mtk_pin_desc *desc, 697 u32 *pullup, u32 *enable) 698 { 699 int err; 700 701 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, pullup); 702 if (err) 703 goto out; 704 705 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, enable); 706 707 out: 708 return err; 709 } 710 711 static int mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw, 712 const struct mtk_pin_desc *desc, 713 u32 *pullup, u32 *enable) 714 { 715 int err, r0, r1; 716 717 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PUPD, pullup); 718 if (err) 719 goto out; 720 /* MTK HW PUPD bit: 1 for pull-down, 0 for pull-up */ 721 *pullup = !(*pullup); 722 723 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R0, &r0); 724 if (err) 725 goto out; 726 727 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R1, &r1); 728 if (err) 729 goto out; 730 731 if ((r1 == 0) && (r0 == 0)) 732 *enable = MTK_PUPD_SET_R1R0_00; 733 else if ((r1 == 0) && (r0 == 1)) 734 *enable = MTK_PUPD_SET_R1R0_01; 735 else if ((r1 == 1) && (r0 == 0)) 736 *enable = MTK_PUPD_SET_R1R0_10; 737 else if ((r1 == 1) && (r0 == 1)) 738 *enable = MTK_PUPD_SET_R1R0_11; 739 else 740 err = -EINVAL; 741 742 out: 743 return err; 744 } 745 746 int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw, 747 const struct mtk_pin_desc *desc, 748 u32 pullup, u32 arg) 749 { 750 int err; 751 752 err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg); 753 if (!err) 754 goto out; 755 756 err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc, pullup, arg); 757 if (!err) 758 goto out; 759 760 err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg); 761 762 out: 763 return err; 764 } 765 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo); 766 767 int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw, 768 const struct mtk_pin_desc *desc, 769 u32 *pullup, u32 *enable) 770 { 771 int err; 772 773 err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable); 774 if (!err) 775 goto out; 776 777 err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc, pullup, enable); 778 if (!err) 779 goto out; 780 781 err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable); 782 783 out: 784 return err; 785 } 786 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo); 787 788 /* Revision 0 */ 789 int mtk_pinconf_drive_set(struct mtk_pinctrl *hw, 790 const struct mtk_pin_desc *desc, u32 arg) 791 { 792 const struct mtk_drive_desc *tb; 793 int err = -ENOTSUPP; 794 795 tb = &mtk_drive[desc->drv_n]; 796 /* 4mA when (e8, e4) = (0, 0) 797 * 8mA when (e8, e4) = (0, 1) 798 * 12mA when (e8, e4) = (1, 0) 799 * 16mA when (e8, e4) = (1, 1) 800 */ 801 if ((arg >= tb->min && arg <= tb->max) && !(arg % tb->step)) { 802 arg = (arg / tb->step - 1) * tb->scal; 803 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_E4, 804 arg & 0x1); 805 if (err) 806 return err; 807 808 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_E8, 809 (arg & 0x2) >> 1); 810 if (err) 811 return err; 812 } 813 814 return err; 815 } 816 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_set); 817 818 int mtk_pinconf_drive_get(struct mtk_pinctrl *hw, 819 const struct mtk_pin_desc *desc, int *val) 820 { 821 const struct mtk_drive_desc *tb; 822 int err, val1, val2; 823 824 tb = &mtk_drive[desc->drv_n]; 825 826 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_E4, &val1); 827 if (err) 828 return err; 829 830 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_E8, &val2); 831 if (err) 832 return err; 833 834 /* 4mA when (e8, e4) = (0, 0); 8mA when (e8, e4) = (0, 1) 835 * 12mA when (e8, e4) = (1, 0); 16mA when (e8, e4) = (1, 1) 836 */ 837 *val = (((val2 << 1) + val1) / tb->scal + 1) * tb->step; 838 839 return 0; 840 } 841 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_get); 842 843 /* Revision 1 */ 844 int mtk_pinconf_drive_set_rev1(struct mtk_pinctrl *hw, 845 const struct mtk_pin_desc *desc, u32 arg) 846 { 847 const struct mtk_drive_desc *tb; 848 int err = -ENOTSUPP; 849 850 tb = &mtk_drive[desc->drv_n]; 851 852 if ((arg >= tb->min && arg <= tb->max) && !(arg % tb->step)) { 853 arg = (arg / tb->step - 1) * tb->scal; 854 855 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV, 856 arg); 857 if (err) 858 return err; 859 } 860 861 return err; 862 } 863 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_set_rev1); 864 865 int mtk_pinconf_drive_get_rev1(struct mtk_pinctrl *hw, 866 const struct mtk_pin_desc *desc, int *val) 867 { 868 const struct mtk_drive_desc *tb; 869 int err, val1; 870 871 tb = &mtk_drive[desc->drv_n]; 872 873 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV, &val1); 874 if (err) 875 return err; 876 877 *val = ((val1 & 0x7) / tb->scal + 1) * tb->step; 878 879 return 0; 880 } 881 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_get_rev1); 882 883 int mtk_pinconf_drive_set_raw(struct mtk_pinctrl *hw, 884 const struct mtk_pin_desc *desc, u32 arg) 885 { 886 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV, arg); 887 } 888 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_set_raw); 889 890 int mtk_pinconf_drive_get_raw(struct mtk_pinctrl *hw, 891 const struct mtk_pin_desc *desc, int *val) 892 { 893 return mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV, val); 894 } 895 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_get_raw); 896 897 int mtk_pinconf_adv_pull_set(struct mtk_pinctrl *hw, 898 const struct mtk_pin_desc *desc, bool pullup, 899 u32 arg) 900 { 901 int err; 902 903 /* 10K off & 50K (75K) off, when (R0, R1) = (0, 0); 904 * 10K off & 50K (75K) on, when (R0, R1) = (0, 1); 905 * 10K on & 50K (75K) off, when (R0, R1) = (1, 0); 906 * 10K on & 50K (75K) on, when (R0, R1) = (1, 1) 907 */ 908 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R0, arg & 1); 909 if (err) 910 return 0; 911 912 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R1, 913 !!(arg & 2)); 914 if (err) 915 return 0; 916 917 arg = pullup ? 0 : 1; 918 919 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PUPD, arg); 920 921 /* If PUPD register is not supported for that pin, let's fallback to 922 * general bias control. 923 */ 924 if (err == -ENOTSUPP) { 925 if (hw->soc->bias_set) { 926 err = hw->soc->bias_set(hw, desc, pullup); 927 if (err) 928 return err; 929 } else { 930 return -ENOTSUPP; 931 } 932 } 933 934 return err; 935 } 936 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_pull_set); 937 938 int mtk_pinconf_adv_pull_get(struct mtk_pinctrl *hw, 939 const struct mtk_pin_desc *desc, bool pullup, 940 u32 *val) 941 { 942 u32 t, t2; 943 int err; 944 945 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PUPD, &t); 946 947 /* If PUPD register is not supported for that pin, let's fallback to 948 * general bias control. 949 */ 950 if (err == -ENOTSUPP) { 951 if (hw->soc->bias_get) { 952 err = hw->soc->bias_get(hw, desc, pullup, val); 953 if (err) 954 return err; 955 } else { 956 return -ENOTSUPP; 957 } 958 } else { 959 /* t == 0 supposes PULLUP for the customized PULL setup */ 960 if (err) 961 return err; 962 963 if (pullup ^ !t) 964 return -EINVAL; 965 } 966 967 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R0, &t); 968 if (err) 969 return err; 970 971 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R1, &t2); 972 if (err) 973 return err; 974 975 *val = (t | t2 << 1) & 0x7; 976 977 return 0; 978 } 979 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_pull_get); 980 981 int mtk_pinconf_adv_drive_set(struct mtk_pinctrl *hw, 982 const struct mtk_pin_desc *desc, u32 arg) 983 { 984 int err; 985 int en = arg & 1; 986 int e0 = !!(arg & 2); 987 int e1 = !!(arg & 4); 988 989 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_EN, en); 990 if (err) 991 return err; 992 993 if (!en) 994 return err; 995 996 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_E0, e0); 997 if (err) 998 return err; 999 1000 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_E1, e1); 1001 if (err) 1002 return err; 1003 1004 return err; 1005 } 1006 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_drive_set); 1007 1008 int mtk_pinconf_adv_drive_get(struct mtk_pinctrl *hw, 1009 const struct mtk_pin_desc *desc, u32 *val) 1010 { 1011 u32 en, e0, e1; 1012 int err; 1013 1014 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_EN, &en); 1015 if (err) 1016 return err; 1017 1018 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_E0, &e0); 1019 if (err) 1020 return err; 1021 1022 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_E1, &e1); 1023 if (err) 1024 return err; 1025 1026 *val = (en | e0 << 1 | e1 << 2) & 0x7; 1027 1028 return 0; 1029 } 1030 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_drive_get); 1031 1032 MODULE_LICENSE("GPL v2"); 1033 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>"); 1034 MODULE_DESCRIPTION("Pin configuration library module for mediatek SoCs"); 1035