1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 MediaTek Inc. 4 * 5 * Author: Sean Wang <sean.wang@mediatek.com> 6 * 7 */ 8 9 #include <dt-bindings/pinctrl/mt65xx.h> 10 #include <linux/device.h> 11 #include <linux/err.h> 12 #include <linux/gpio/driver.h> 13 #include <linux/platform_device.h> 14 #include <linux/io.h> 15 #include <linux/module.h> 16 #include <linux/of_irq.h> 17 18 #include "mtk-eint.h" 19 #include "pinctrl-mtk-common-v2.h" 20 21 /** 22 * struct mtk_drive_desc - the structure that holds the information 23 * of the driving current 24 * @min: the minimum current of this group 25 * @max: the maximum current of this group 26 * @step: the step current of this group 27 * @scal: the weight factor 28 * 29 * formula: output = ((input) / step - 1) * scal 30 */ 31 struct mtk_drive_desc { 32 u8 min; 33 u8 max; 34 u8 step; 35 u8 scal; 36 }; 37 38 /* The groups of drive strength */ 39 static const struct mtk_drive_desc mtk_drive[] = { 40 [DRV_GRP0] = { 4, 16, 4, 1 }, 41 [DRV_GRP1] = { 4, 16, 4, 2 }, 42 [DRV_GRP2] = { 2, 8, 2, 1 }, 43 [DRV_GRP3] = { 2, 8, 2, 2 }, 44 [DRV_GRP4] = { 2, 16, 2, 1 }, 45 }; 46 47 static void mtk_w32(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 val) 48 { 49 writel_relaxed(val, pctl->base[i] + reg); 50 } 51 52 static u32 mtk_r32(struct mtk_pinctrl *pctl, u8 i, u32 reg) 53 { 54 return readl_relaxed(pctl->base[i] + reg); 55 } 56 57 void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set) 58 { 59 u32 val; 60 61 val = mtk_r32(pctl, i, reg); 62 val &= ~mask; 63 val |= set; 64 mtk_w32(pctl, i, reg, val); 65 } 66 67 static int mtk_hw_pin_field_lookup(struct mtk_pinctrl *hw, 68 const struct mtk_pin_desc *desc, 69 int field, struct mtk_pin_field *pfd) 70 { 71 const struct mtk_pin_field_calc *c; 72 const struct mtk_pin_reg_calc *rc; 73 int start = 0, end, check; 74 bool found = false; 75 u32 bits; 76 77 if (hw->soc->reg_cal && hw->soc->reg_cal[field].range) { 78 rc = &hw->soc->reg_cal[field]; 79 } else { 80 dev_dbg(hw->dev, 81 "Not support field %d for this soc\n", field); 82 return -ENOTSUPP; 83 } 84 85 end = rc->nranges - 1; 86 87 while (start <= end) { 88 check = (start + end) >> 1; 89 if (desc->number >= rc->range[check].s_pin 90 && desc->number <= rc->range[check].e_pin) { 91 found = true; 92 break; 93 } else if (start == end) 94 break; 95 else if (desc->number < rc->range[check].s_pin) 96 end = check - 1; 97 else 98 start = check + 1; 99 } 100 101 if (!found) { 102 dev_dbg(hw->dev, "Not support field %d for pin = %d (%s)\n", 103 field, desc->number, desc->name); 104 return -ENOTSUPP; 105 } 106 107 c = rc->range + check; 108 109 if (c->i_base > hw->nbase - 1) { 110 dev_err(hw->dev, 111 "Invalid base for field %d for pin = %d (%s)\n", 112 field, desc->number, desc->name); 113 return -EINVAL; 114 } 115 116 /* Calculated bits as the overall offset the pin is located at, 117 * if c->fixed is held, that determines the all the pins in the 118 * range use the same field with the s_pin. 119 */ 120 bits = c->fixed ? c->s_bit : c->s_bit + 121 (desc->number - c->s_pin) * (c->x_bits); 122 123 /* Fill pfd from bits. For example 32-bit register applied is assumed 124 * when c->sz_reg is equal to 32. 125 */ 126 pfd->index = c->i_base; 127 pfd->offset = c->s_addr + c->x_addrs * (bits / c->sz_reg); 128 pfd->bitpos = bits % c->sz_reg; 129 pfd->mask = (1 << c->x_bits) - 1; 130 131 /* pfd->next is used for indicating that bit wrapping-around happens 132 * which requires the manipulation for bit 0 starting in the next 133 * register to form the complete field read/write. 134 */ 135 pfd->next = pfd->bitpos + c->x_bits > c->sz_reg ? c->x_addrs : 0; 136 137 return 0; 138 } 139 140 static int mtk_hw_pin_field_get(struct mtk_pinctrl *hw, 141 const struct mtk_pin_desc *desc, 142 int field, struct mtk_pin_field *pfd) 143 { 144 if (field < 0 || field >= PINCTRL_PIN_REG_MAX) { 145 dev_err(hw->dev, "Invalid Field %d\n", field); 146 return -EINVAL; 147 } 148 149 return mtk_hw_pin_field_lookup(hw, desc, field, pfd); 150 } 151 152 static void mtk_hw_bits_part(struct mtk_pin_field *pf, int *h, int *l) 153 { 154 *l = 32 - pf->bitpos; 155 *h = get_count_order(pf->mask) - *l; 156 } 157 158 static void mtk_hw_write_cross_field(struct mtk_pinctrl *hw, 159 struct mtk_pin_field *pf, int value) 160 { 161 int nbits_l, nbits_h; 162 163 mtk_hw_bits_part(pf, &nbits_h, &nbits_l); 164 165 mtk_rmw(hw, pf->index, pf->offset, pf->mask << pf->bitpos, 166 (value & pf->mask) << pf->bitpos); 167 168 mtk_rmw(hw, pf->index, pf->offset + pf->next, BIT(nbits_h) - 1, 169 (value & pf->mask) >> nbits_l); 170 } 171 172 static void mtk_hw_read_cross_field(struct mtk_pinctrl *hw, 173 struct mtk_pin_field *pf, int *value) 174 { 175 int nbits_l, nbits_h, h, l; 176 177 mtk_hw_bits_part(pf, &nbits_h, &nbits_l); 178 179 l = (mtk_r32(hw, pf->index, pf->offset) 180 >> pf->bitpos) & (BIT(nbits_l) - 1); 181 h = (mtk_r32(hw, pf->index, pf->offset + pf->next)) 182 & (BIT(nbits_h) - 1); 183 184 *value = (h << nbits_l) | l; 185 } 186 187 int mtk_hw_set_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, 188 int field, int value) 189 { 190 struct mtk_pin_field pf; 191 int err; 192 193 err = mtk_hw_pin_field_get(hw, desc, field, &pf); 194 if (err) 195 return err; 196 197 if (value < 0 || value > pf.mask) 198 return -EINVAL; 199 200 if (!pf.next) 201 mtk_rmw(hw, pf.index, pf.offset, pf.mask << pf.bitpos, 202 (value & pf.mask) << pf.bitpos); 203 else 204 mtk_hw_write_cross_field(hw, &pf, value); 205 206 return 0; 207 } 208 EXPORT_SYMBOL_GPL(mtk_hw_set_value); 209 210 int mtk_hw_get_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, 211 int field, int *value) 212 { 213 struct mtk_pin_field pf; 214 int err; 215 216 err = mtk_hw_pin_field_get(hw, desc, field, &pf); 217 if (err) 218 return err; 219 220 if (!pf.next) 221 *value = (mtk_r32(hw, pf.index, pf.offset) 222 >> pf.bitpos) & pf.mask; 223 else 224 mtk_hw_read_cross_field(hw, &pf, value); 225 226 return 0; 227 } 228 EXPORT_SYMBOL_GPL(mtk_hw_get_value); 229 230 static int mtk_xt_find_eint_num(struct mtk_pinctrl *hw, unsigned long eint_n) 231 { 232 const struct mtk_pin_desc *desc; 233 int i = 0; 234 235 desc = (const struct mtk_pin_desc *)hw->soc->pins; 236 237 while (i < hw->soc->npins) { 238 if (desc[i].eint.eint_n == eint_n) 239 return desc[i].number; 240 i++; 241 } 242 243 return EINT_NA; 244 } 245 246 /* 247 * Virtual GPIO only used inside SOC and not being exported to outside SOC. 248 * Some modules use virtual GPIO as eint (e.g. pmif or usb). 249 * In MTK platform, external interrupt (EINT) and GPIO is 1-1 mapping 250 * and we can set GPIO as eint. 251 * But some modules use specific eint which doesn't have real GPIO pin. 252 * So we use virtual GPIO to map it. 253 */ 254 255 bool mtk_is_virt_gpio(struct mtk_pinctrl *hw, unsigned int gpio_n) 256 { 257 const struct mtk_pin_desc *desc; 258 bool virt_gpio = false; 259 260 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; 261 262 if (desc->funcs && !desc->funcs[desc->eint.eint_m].name) 263 virt_gpio = true; 264 265 return virt_gpio; 266 } 267 EXPORT_SYMBOL_GPL(mtk_is_virt_gpio); 268 269 static int mtk_xt_get_gpio_n(void *data, unsigned long eint_n, 270 unsigned int *gpio_n, 271 struct gpio_chip **gpio_chip) 272 { 273 struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; 274 const struct mtk_pin_desc *desc; 275 276 desc = (const struct mtk_pin_desc *)hw->soc->pins; 277 *gpio_chip = &hw->chip; 278 279 /* Be greedy to guess first gpio_n is equal to eint_n */ 280 if (desc[eint_n].eint.eint_n == eint_n) 281 *gpio_n = eint_n; 282 else 283 *gpio_n = mtk_xt_find_eint_num(hw, eint_n); 284 285 return *gpio_n == EINT_NA ? -EINVAL : 0; 286 } 287 288 static int mtk_xt_get_gpio_state(void *data, unsigned long eint_n) 289 { 290 struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; 291 const struct mtk_pin_desc *desc; 292 struct gpio_chip *gpio_chip; 293 unsigned int gpio_n; 294 int value, err; 295 296 err = mtk_xt_get_gpio_n(hw, eint_n, &gpio_n, &gpio_chip); 297 if (err) 298 return err; 299 300 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; 301 302 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); 303 if (err) 304 return err; 305 306 return !!value; 307 } 308 309 static int mtk_xt_set_gpio_as_eint(void *data, unsigned long eint_n) 310 { 311 struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; 312 const struct mtk_pin_desc *desc; 313 struct gpio_chip *gpio_chip; 314 unsigned int gpio_n; 315 int err; 316 317 err = mtk_xt_get_gpio_n(hw, eint_n, &gpio_n, &gpio_chip); 318 if (err) 319 return err; 320 321 if (mtk_is_virt_gpio(hw, gpio_n)) 322 return 0; 323 324 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; 325 326 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, 327 desc->eint.eint_m); 328 if (err) 329 return err; 330 331 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, MTK_INPUT); 332 if (err) 333 return err; 334 335 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, MTK_ENABLE); 336 /* SMT is supposed to be supported by every real GPIO and doesn't 337 * support virtual GPIOs, so the extra condition err != -ENOTSUPP 338 * is just for adding EINT support to these virtual GPIOs. It should 339 * add an extra flag in the pin descriptor when more pins with 340 * distinctive characteristic come out. 341 */ 342 if (err && err != -ENOTSUPP) 343 return err; 344 345 return 0; 346 } 347 348 static const struct mtk_eint_xt mtk_eint_xt = { 349 .get_gpio_n = mtk_xt_get_gpio_n, 350 .get_gpio_state = mtk_xt_get_gpio_state, 351 .set_gpio_as_eint = mtk_xt_set_gpio_as_eint, 352 }; 353 354 int mtk_build_eint(struct mtk_pinctrl *hw, struct platform_device *pdev) 355 { 356 struct device_node *np = pdev->dev.of_node; 357 358 if (!IS_ENABLED(CONFIG_EINT_MTK)) 359 return 0; 360 361 if (!of_property_read_bool(np, "interrupt-controller")) 362 return -ENODEV; 363 364 hw->eint = devm_kzalloc(hw->dev, sizeof(*hw->eint), GFP_KERNEL); 365 if (!hw->eint) 366 return -ENOMEM; 367 368 hw->eint->base = devm_platform_ioremap_resource_byname(pdev, "eint"); 369 if (IS_ERR(hw->eint->base)) 370 return PTR_ERR(hw->eint->base); 371 372 hw->eint->irq = irq_of_parse_and_map(np, 0); 373 if (!hw->eint->irq) 374 return -EINVAL; 375 376 if (!hw->soc->eint_hw) 377 return -ENODEV; 378 379 hw->eint->dev = &pdev->dev; 380 hw->eint->hw = hw->soc->eint_hw; 381 hw->eint->pctl = hw; 382 hw->eint->gpio_xlate = &mtk_eint_xt; 383 384 return mtk_eint_do_init(hw->eint); 385 } 386 EXPORT_SYMBOL_GPL(mtk_build_eint); 387 388 /* Revision 0 */ 389 int mtk_pinconf_bias_disable_set(struct mtk_pinctrl *hw, 390 const struct mtk_pin_desc *desc) 391 { 392 int err; 393 394 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, 395 MTK_DISABLE); 396 if (err) 397 return err; 398 399 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, 400 MTK_DISABLE); 401 if (err) 402 return err; 403 404 return 0; 405 } 406 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_set); 407 408 int mtk_pinconf_bias_disable_get(struct mtk_pinctrl *hw, 409 const struct mtk_pin_desc *desc, int *res) 410 { 411 int v, v2; 412 int err; 413 414 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &v); 415 if (err) 416 return err; 417 418 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &v2); 419 if (err) 420 return err; 421 422 if (v == MTK_ENABLE || v2 == MTK_ENABLE) 423 return -EINVAL; 424 425 *res = 1; 426 427 return 0; 428 } 429 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_get); 430 431 int mtk_pinconf_bias_set(struct mtk_pinctrl *hw, 432 const struct mtk_pin_desc *desc, bool pullup) 433 { 434 int err, arg; 435 436 arg = pullup ? 1 : 2; 437 438 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, arg & 1); 439 if (err) 440 return err; 441 442 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, 443 !!(arg & 2)); 444 if (err) 445 return err; 446 447 return 0; 448 } 449 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set); 450 451 int mtk_pinconf_bias_get(struct mtk_pinctrl *hw, 452 const struct mtk_pin_desc *desc, bool pullup, int *res) 453 { 454 int reg, err, v; 455 456 reg = pullup ? PINCTRL_PIN_REG_PU : PINCTRL_PIN_REG_PD; 457 458 err = mtk_hw_get_value(hw, desc, reg, &v); 459 if (err) 460 return err; 461 462 if (!v) 463 return -EINVAL; 464 465 *res = 1; 466 467 return 0; 468 } 469 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get); 470 471 /* Revision 1 */ 472 int mtk_pinconf_bias_disable_set_rev1(struct mtk_pinctrl *hw, 473 const struct mtk_pin_desc *desc) 474 { 475 int err; 476 477 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, 478 MTK_DISABLE); 479 if (err) 480 return err; 481 482 return 0; 483 } 484 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_set_rev1); 485 486 int mtk_pinconf_bias_disable_get_rev1(struct mtk_pinctrl *hw, 487 const struct mtk_pin_desc *desc, int *res) 488 { 489 int v, err; 490 491 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, &v); 492 if (err) 493 return err; 494 495 if (v == MTK_ENABLE) 496 return -EINVAL; 497 498 *res = 1; 499 500 return 0; 501 } 502 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_get_rev1); 503 504 int mtk_pinconf_bias_set_rev1(struct mtk_pinctrl *hw, 505 const struct mtk_pin_desc *desc, bool pullup) 506 { 507 int err, arg; 508 509 arg = pullup ? MTK_PULLUP : MTK_PULLDOWN; 510 511 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, 512 MTK_ENABLE); 513 if (err) 514 return err; 515 516 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, arg); 517 if (err) 518 return err; 519 520 return 0; 521 } 522 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_rev1); 523 524 int mtk_pinconf_bias_get_rev1(struct mtk_pinctrl *hw, 525 const struct mtk_pin_desc *desc, bool pullup, 526 int *res) 527 { 528 int err, v; 529 530 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, &v); 531 if (err) 532 return err; 533 534 if (v == MTK_DISABLE) 535 return -EINVAL; 536 537 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, &v); 538 if (err) 539 return err; 540 541 if (pullup ^ (v == MTK_PULLUP)) 542 return -EINVAL; 543 544 *res = 1; 545 546 return 0; 547 } 548 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_rev1); 549 550 /* Combo for the following pull register type: 551 * 1. PU + PD 552 * 2. PULLSEL + PULLEN 553 * 3. PUPD + R0 + R1 554 */ 555 static int mtk_pinconf_bias_set_pu_pd(struct mtk_pinctrl *hw, 556 const struct mtk_pin_desc *desc, 557 u32 pullup, u32 arg) 558 { 559 int err, pu, pd; 560 561 if (arg == MTK_DISABLE) { 562 pu = 0; 563 pd = 0; 564 } else if ((arg == MTK_ENABLE) && pullup) { 565 pu = 1; 566 pd = 0; 567 } else if ((arg == MTK_ENABLE) && !pullup) { 568 pu = 0; 569 pd = 1; 570 } else { 571 err = -EINVAL; 572 goto out; 573 } 574 575 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, pu); 576 if (err) 577 goto out; 578 579 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, pd); 580 581 out: 582 return err; 583 } 584 585 static int mtk_pinconf_bias_set_pullsel_pullen(struct mtk_pinctrl *hw, 586 const struct mtk_pin_desc *desc, 587 u32 pullup, u32 arg) 588 { 589 int err, enable; 590 591 if (arg == MTK_DISABLE) 592 enable = 0; 593 else if (arg == MTK_ENABLE) 594 enable = 1; 595 else { 596 err = -EINVAL; 597 goto out; 598 } 599 600 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, enable); 601 if (err) 602 goto out; 603 604 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, pullup); 605 606 out: 607 return err; 608 } 609 610 static int mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw, 611 const struct mtk_pin_desc *desc, 612 u32 pullup, u32 arg) 613 { 614 int err, r0, r1; 615 616 if ((arg == MTK_DISABLE) || (arg == MTK_PUPD_SET_R1R0_00)) { 617 pullup = 0; 618 r0 = 0; 619 r1 = 0; 620 } else if (arg == MTK_PUPD_SET_R1R0_01) { 621 r0 = 1; 622 r1 = 0; 623 } else if (arg == MTK_PUPD_SET_R1R0_10) { 624 r0 = 0; 625 r1 = 1; 626 } else if (arg == MTK_PUPD_SET_R1R0_11) { 627 r0 = 1; 628 r1 = 1; 629 } else { 630 err = -EINVAL; 631 goto out; 632 } 633 634 /* MTK HW PUPD bit: 1 for pull-down, 0 for pull-up */ 635 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PUPD, !pullup); 636 if (err) 637 goto out; 638 639 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R0, r0); 640 if (err) 641 goto out; 642 643 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R1, r1); 644 645 out: 646 return err; 647 } 648 649 static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw, 650 const struct mtk_pin_desc *desc, 651 u32 *pullup, u32 *enable) 652 { 653 int err, pu, pd; 654 655 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu); 656 if (err) 657 goto out; 658 659 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd); 660 if (err) 661 goto out; 662 663 if (pu == 0 && pd == 0) { 664 *pullup = 0; 665 *enable = MTK_DISABLE; 666 } else if (pu == 1 && pd == 0) { 667 *pullup = 1; 668 *enable = MTK_ENABLE; 669 } else if (pu == 0 && pd == 1) { 670 *pullup = 0; 671 *enable = MTK_ENABLE; 672 } else 673 err = -EINVAL; 674 675 out: 676 return err; 677 } 678 679 static int mtk_pinconf_bias_get_pullsel_pullen(struct mtk_pinctrl *hw, 680 const struct mtk_pin_desc *desc, 681 u32 *pullup, u32 *enable) 682 { 683 int err; 684 685 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, pullup); 686 if (err) 687 goto out; 688 689 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, enable); 690 691 out: 692 return err; 693 } 694 695 static int mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw, 696 const struct mtk_pin_desc *desc, 697 u32 *pullup, u32 *enable) 698 { 699 int err, r0, r1; 700 701 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PUPD, pullup); 702 if (err) 703 goto out; 704 /* MTK HW PUPD bit: 1 for pull-down, 0 for pull-up */ 705 *pullup = !(*pullup); 706 707 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R0, &r0); 708 if (err) 709 goto out; 710 711 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R1, &r1); 712 if (err) 713 goto out; 714 715 if ((r1 == 0) && (r0 == 0)) 716 *enable = MTK_PUPD_SET_R1R0_00; 717 else if ((r1 == 0) && (r0 == 1)) 718 *enable = MTK_PUPD_SET_R1R0_01; 719 else if ((r1 == 1) && (r0 == 0)) 720 *enable = MTK_PUPD_SET_R1R0_10; 721 else if ((r1 == 1) && (r0 == 1)) 722 *enable = MTK_PUPD_SET_R1R0_11; 723 else 724 err = -EINVAL; 725 726 out: 727 return err; 728 } 729 730 int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw, 731 const struct mtk_pin_desc *desc, 732 u32 pullup, u32 arg) 733 { 734 int err; 735 736 err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg); 737 if (!err) 738 goto out; 739 740 err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc, pullup, arg); 741 if (!err) 742 goto out; 743 744 err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg); 745 746 out: 747 return err; 748 } 749 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo); 750 751 int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw, 752 const struct mtk_pin_desc *desc, 753 u32 *pullup, u32 *enable) 754 { 755 int err; 756 757 err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable); 758 if (!err) 759 goto out; 760 761 err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc, pullup, enable); 762 if (!err) 763 goto out; 764 765 err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable); 766 767 out: 768 return err; 769 } 770 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo); 771 772 /* Revision 0 */ 773 int mtk_pinconf_drive_set(struct mtk_pinctrl *hw, 774 const struct mtk_pin_desc *desc, u32 arg) 775 { 776 const struct mtk_drive_desc *tb; 777 int err = -ENOTSUPP; 778 779 tb = &mtk_drive[desc->drv_n]; 780 /* 4mA when (e8, e4) = (0, 0) 781 * 8mA when (e8, e4) = (0, 1) 782 * 12mA when (e8, e4) = (1, 0) 783 * 16mA when (e8, e4) = (1, 1) 784 */ 785 if ((arg >= tb->min && arg <= tb->max) && !(arg % tb->step)) { 786 arg = (arg / tb->step - 1) * tb->scal; 787 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_E4, 788 arg & 0x1); 789 if (err) 790 return err; 791 792 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_E8, 793 (arg & 0x2) >> 1); 794 if (err) 795 return err; 796 } 797 798 return err; 799 } 800 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_set); 801 802 int mtk_pinconf_drive_get(struct mtk_pinctrl *hw, 803 const struct mtk_pin_desc *desc, int *val) 804 { 805 const struct mtk_drive_desc *tb; 806 int err, val1, val2; 807 808 tb = &mtk_drive[desc->drv_n]; 809 810 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_E4, &val1); 811 if (err) 812 return err; 813 814 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_E8, &val2); 815 if (err) 816 return err; 817 818 /* 4mA when (e8, e4) = (0, 0); 8mA when (e8, e4) = (0, 1) 819 * 12mA when (e8, e4) = (1, 0); 16mA when (e8, e4) = (1, 1) 820 */ 821 *val = (((val2 << 1) + val1) / tb->scal + 1) * tb->step; 822 823 return 0; 824 } 825 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_get); 826 827 /* Revision 1 */ 828 int mtk_pinconf_drive_set_rev1(struct mtk_pinctrl *hw, 829 const struct mtk_pin_desc *desc, u32 arg) 830 { 831 const struct mtk_drive_desc *tb; 832 int err = -ENOTSUPP; 833 834 tb = &mtk_drive[desc->drv_n]; 835 836 if ((arg >= tb->min && arg <= tb->max) && !(arg % tb->step)) { 837 arg = (arg / tb->step - 1) * tb->scal; 838 839 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV, 840 arg); 841 if (err) 842 return err; 843 } 844 845 return err; 846 } 847 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_set_rev1); 848 849 int mtk_pinconf_drive_get_rev1(struct mtk_pinctrl *hw, 850 const struct mtk_pin_desc *desc, int *val) 851 { 852 const struct mtk_drive_desc *tb; 853 int err, val1; 854 855 tb = &mtk_drive[desc->drv_n]; 856 857 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV, &val1); 858 if (err) 859 return err; 860 861 *val = ((val1 & 0x7) / tb->scal + 1) * tb->step; 862 863 return 0; 864 } 865 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_get_rev1); 866 867 int mtk_pinconf_drive_set_raw(struct mtk_pinctrl *hw, 868 const struct mtk_pin_desc *desc, u32 arg) 869 { 870 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV, arg); 871 } 872 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_set_raw); 873 874 int mtk_pinconf_drive_get_raw(struct mtk_pinctrl *hw, 875 const struct mtk_pin_desc *desc, int *val) 876 { 877 return mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV, val); 878 } 879 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_get_raw); 880 881 int mtk_pinconf_adv_pull_set(struct mtk_pinctrl *hw, 882 const struct mtk_pin_desc *desc, bool pullup, 883 u32 arg) 884 { 885 int err; 886 887 /* 10K off & 50K (75K) off, when (R0, R1) = (0, 0); 888 * 10K off & 50K (75K) on, when (R0, R1) = (0, 1); 889 * 10K on & 50K (75K) off, when (R0, R1) = (1, 0); 890 * 10K on & 50K (75K) on, when (R0, R1) = (1, 1) 891 */ 892 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R0, arg & 1); 893 if (err) 894 return 0; 895 896 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R1, 897 !!(arg & 2)); 898 if (err) 899 return 0; 900 901 arg = pullup ? 0 : 1; 902 903 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PUPD, arg); 904 905 /* If PUPD register is not supported for that pin, let's fallback to 906 * general bias control. 907 */ 908 if (err == -ENOTSUPP) { 909 if (hw->soc->bias_set) { 910 err = hw->soc->bias_set(hw, desc, pullup); 911 if (err) 912 return err; 913 } else { 914 return -ENOTSUPP; 915 } 916 } 917 918 return err; 919 } 920 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_pull_set); 921 922 int mtk_pinconf_adv_pull_get(struct mtk_pinctrl *hw, 923 const struct mtk_pin_desc *desc, bool pullup, 924 u32 *val) 925 { 926 u32 t, t2; 927 int err; 928 929 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PUPD, &t); 930 931 /* If PUPD register is not supported for that pin, let's fallback to 932 * general bias control. 933 */ 934 if (err == -ENOTSUPP) { 935 if (hw->soc->bias_get) { 936 err = hw->soc->bias_get(hw, desc, pullup, val); 937 if (err) 938 return err; 939 } else { 940 return -ENOTSUPP; 941 } 942 } else { 943 /* t == 0 supposes PULLUP for the customized PULL setup */ 944 if (err) 945 return err; 946 947 if (pullup ^ !t) 948 return -EINVAL; 949 } 950 951 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R0, &t); 952 if (err) 953 return err; 954 955 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R1, &t2); 956 if (err) 957 return err; 958 959 *val = (t | t2 << 1) & 0x7; 960 961 return 0; 962 } 963 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_pull_get); 964 965 int mtk_pinconf_adv_drive_set(struct mtk_pinctrl *hw, 966 const struct mtk_pin_desc *desc, u32 arg) 967 { 968 int err; 969 int en = arg & 1; 970 int e0 = !!(arg & 2); 971 int e1 = !!(arg & 4); 972 973 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_EN, en); 974 if (err) 975 return err; 976 977 if (!en) 978 return err; 979 980 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_E0, e0); 981 if (err) 982 return err; 983 984 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_E1, e1); 985 if (err) 986 return err; 987 988 return err; 989 } 990 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_drive_set); 991 992 int mtk_pinconf_adv_drive_get(struct mtk_pinctrl *hw, 993 const struct mtk_pin_desc *desc, u32 *val) 994 { 995 u32 en, e0, e1; 996 int err; 997 998 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_EN, &en); 999 if (err) 1000 return err; 1001 1002 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_E0, &e0); 1003 if (err) 1004 return err; 1005 1006 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_E1, &e1); 1007 if (err) 1008 return err; 1009 1010 *val = (en | e0 << 1 | e1 << 2) & 0x7; 1011 1012 return 0; 1013 } 1014 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_drive_get); 1015 1016 MODULE_LICENSE("GPL v2"); 1017 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>"); 1018 MODULE_DESCRIPTION("Pin configuration library module for mediatek SoCs"); 1019