1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 MediaTek Inc. 4 * 5 * Author: Sean Wang <sean.wang@mediatek.com> 6 * 7 */ 8 9 #include <dt-bindings/pinctrl/mt65xx.h> 10 #include <linux/device.h> 11 #include <linux/err.h> 12 #include <linux/gpio/driver.h> 13 #include <linux/platform_device.h> 14 #include <linux/io.h> 15 #include <linux/module.h> 16 #include <linux/of_irq.h> 17 18 #include "mtk-eint.h" 19 #include "pinctrl-mtk-common-v2.h" 20 21 /** 22 * struct mtk_drive_desc - the structure that holds the information 23 * of the driving current 24 * @min: the minimum current of this group 25 * @max: the maximum current of this group 26 * @step: the step current of this group 27 * @scal: the weight factor 28 * 29 * formula: output = ((input) / step - 1) * scal 30 */ 31 struct mtk_drive_desc { 32 u8 min; 33 u8 max; 34 u8 step; 35 u8 scal; 36 }; 37 38 /* The groups of drive strength */ 39 static const struct mtk_drive_desc mtk_drive[] = { 40 [DRV_GRP0] = { 4, 16, 4, 1 }, 41 [DRV_GRP1] = { 4, 16, 4, 2 }, 42 [DRV_GRP2] = { 2, 8, 2, 1 }, 43 [DRV_GRP3] = { 2, 8, 2, 2 }, 44 [DRV_GRP4] = { 2, 16, 2, 1 }, 45 }; 46 47 static void mtk_w32(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 val) 48 { 49 writel_relaxed(val, pctl->base[i] + reg); 50 } 51 52 static u32 mtk_r32(struct mtk_pinctrl *pctl, u8 i, u32 reg) 53 { 54 return readl_relaxed(pctl->base[i] + reg); 55 } 56 57 void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set) 58 { 59 u32 val; 60 61 val = mtk_r32(pctl, i, reg); 62 val &= ~mask; 63 val |= set; 64 mtk_w32(pctl, i, reg, val); 65 } 66 67 static int mtk_hw_pin_field_lookup(struct mtk_pinctrl *hw, 68 const struct mtk_pin_desc *desc, 69 int field, struct mtk_pin_field *pfd) 70 { 71 const struct mtk_pin_field_calc *c; 72 const struct mtk_pin_reg_calc *rc; 73 int start = 0, end, check; 74 bool found = false; 75 u32 bits; 76 77 if (hw->soc->reg_cal && hw->soc->reg_cal[field].range) { 78 rc = &hw->soc->reg_cal[field]; 79 } else { 80 dev_dbg(hw->dev, 81 "Not support field %d for this soc\n", field); 82 return -ENOTSUPP; 83 } 84 85 end = rc->nranges - 1; 86 87 while (start <= end) { 88 check = (start + end) >> 1; 89 if (desc->number >= rc->range[check].s_pin 90 && desc->number <= rc->range[check].e_pin) { 91 found = true; 92 break; 93 } else if (start == end) 94 break; 95 else if (desc->number < rc->range[check].s_pin) 96 end = check - 1; 97 else 98 start = check + 1; 99 } 100 101 if (!found) { 102 dev_dbg(hw->dev, "Not support field %d for pin = %d (%s)\n", 103 field, desc->number, desc->name); 104 return -ENOTSUPP; 105 } 106 107 c = rc->range + check; 108 109 if (c->i_base > hw->nbase - 1) { 110 dev_err(hw->dev, 111 "Invalid base for field %d for pin = %d (%s)\n", 112 field, desc->number, desc->name); 113 return -EINVAL; 114 } 115 116 /* Calculated bits as the overall offset the pin is located at, 117 * if c->fixed is held, that determines the all the pins in the 118 * range use the same field with the s_pin. 119 */ 120 bits = c->fixed ? c->s_bit : c->s_bit + 121 (desc->number - c->s_pin) * (c->x_bits); 122 123 /* Fill pfd from bits. For example 32-bit register applied is assumed 124 * when c->sz_reg is equal to 32. 125 */ 126 pfd->index = c->i_base; 127 pfd->offset = c->s_addr + c->x_addrs * (bits / c->sz_reg); 128 pfd->bitpos = bits % c->sz_reg; 129 pfd->mask = (1 << c->x_bits) - 1; 130 131 /* pfd->next is used for indicating that bit wrapping-around happens 132 * which requires the manipulation for bit 0 starting in the next 133 * register to form the complete field read/write. 134 */ 135 pfd->next = pfd->bitpos + c->x_bits > c->sz_reg ? c->x_addrs : 0; 136 137 return 0; 138 } 139 140 static int mtk_hw_pin_field_get(struct mtk_pinctrl *hw, 141 const struct mtk_pin_desc *desc, 142 int field, struct mtk_pin_field *pfd) 143 { 144 if (field < 0 || field >= PINCTRL_PIN_REG_MAX) { 145 dev_err(hw->dev, "Invalid Field %d\n", field); 146 return -EINVAL; 147 } 148 149 return mtk_hw_pin_field_lookup(hw, desc, field, pfd); 150 } 151 152 static void mtk_hw_bits_part(struct mtk_pin_field *pf, int *h, int *l) 153 { 154 *l = 32 - pf->bitpos; 155 *h = get_count_order(pf->mask) - *l; 156 } 157 158 static void mtk_hw_write_cross_field(struct mtk_pinctrl *hw, 159 struct mtk_pin_field *pf, int value) 160 { 161 int nbits_l, nbits_h; 162 163 mtk_hw_bits_part(pf, &nbits_h, &nbits_l); 164 165 mtk_rmw(hw, pf->index, pf->offset, pf->mask << pf->bitpos, 166 (value & pf->mask) << pf->bitpos); 167 168 mtk_rmw(hw, pf->index, pf->offset + pf->next, BIT(nbits_h) - 1, 169 (value & pf->mask) >> nbits_l); 170 } 171 172 static void mtk_hw_read_cross_field(struct mtk_pinctrl *hw, 173 struct mtk_pin_field *pf, int *value) 174 { 175 int nbits_l, nbits_h, h, l; 176 177 mtk_hw_bits_part(pf, &nbits_h, &nbits_l); 178 179 l = (mtk_r32(hw, pf->index, pf->offset) 180 >> pf->bitpos) & (BIT(nbits_l) - 1); 181 h = (mtk_r32(hw, pf->index, pf->offset + pf->next)) 182 & (BIT(nbits_h) - 1); 183 184 *value = (h << nbits_l) | l; 185 } 186 187 int mtk_hw_set_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, 188 int field, int value) 189 { 190 struct mtk_pin_field pf; 191 int err; 192 193 err = mtk_hw_pin_field_get(hw, desc, field, &pf); 194 if (err) 195 return err; 196 197 if (value < 0 || value > pf.mask) 198 return -EINVAL; 199 200 if (!pf.next) 201 mtk_rmw(hw, pf.index, pf.offset, pf.mask << pf.bitpos, 202 (value & pf.mask) << pf.bitpos); 203 else 204 mtk_hw_write_cross_field(hw, &pf, value); 205 206 return 0; 207 } 208 EXPORT_SYMBOL_GPL(mtk_hw_set_value); 209 210 int mtk_hw_get_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, 211 int field, int *value) 212 { 213 struct mtk_pin_field pf; 214 int err; 215 216 err = mtk_hw_pin_field_get(hw, desc, field, &pf); 217 if (err) 218 return err; 219 220 if (!pf.next) 221 *value = (mtk_r32(hw, pf.index, pf.offset) 222 >> pf.bitpos) & pf.mask; 223 else 224 mtk_hw_read_cross_field(hw, &pf, value); 225 226 return 0; 227 } 228 EXPORT_SYMBOL_GPL(mtk_hw_get_value); 229 230 static int mtk_xt_find_eint_num(struct mtk_pinctrl *hw, unsigned long eint_n) 231 { 232 const struct mtk_pin_desc *desc; 233 int i = 0; 234 235 desc = (const struct mtk_pin_desc *)hw->soc->pins; 236 237 while (i < hw->soc->npins) { 238 if (desc[i].eint.eint_n == eint_n) 239 return desc[i].number; 240 i++; 241 } 242 243 return EINT_NA; 244 } 245 246 /* 247 * Virtual GPIO only used inside SOC and not being exported to outside SOC. 248 * Some modules use virtual GPIO as eint (e.g. pmif or usb). 249 * In MTK platform, external interrupt (EINT) and GPIO is 1-1 mapping 250 * and we can set GPIO as eint. 251 * But some modules use specific eint which doesn't have real GPIO pin. 252 * So we use virtual GPIO to map it. 253 */ 254 255 bool mtk_is_virt_gpio(struct mtk_pinctrl *hw, unsigned int gpio_n) 256 { 257 const struct mtk_pin_desc *desc; 258 bool virt_gpio = false; 259 260 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; 261 262 if (desc->funcs && !desc->funcs[desc->eint.eint_m].name) 263 virt_gpio = true; 264 265 return virt_gpio; 266 } 267 EXPORT_SYMBOL_GPL(mtk_is_virt_gpio); 268 269 static int mtk_xt_get_gpio_n(void *data, unsigned long eint_n, 270 unsigned int *gpio_n, 271 struct gpio_chip **gpio_chip) 272 { 273 struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; 274 const struct mtk_pin_desc *desc; 275 276 desc = (const struct mtk_pin_desc *)hw->soc->pins; 277 *gpio_chip = &hw->chip; 278 279 /* Be greedy to guess first gpio_n is equal to eint_n */ 280 if (desc[eint_n].eint.eint_n == eint_n) 281 *gpio_n = eint_n; 282 else 283 *gpio_n = mtk_xt_find_eint_num(hw, eint_n); 284 285 return *gpio_n == EINT_NA ? -EINVAL : 0; 286 } 287 288 static int mtk_xt_get_gpio_state(void *data, unsigned long eint_n) 289 { 290 struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; 291 const struct mtk_pin_desc *desc; 292 struct gpio_chip *gpio_chip; 293 unsigned int gpio_n; 294 int value, err; 295 296 err = mtk_xt_get_gpio_n(hw, eint_n, &gpio_n, &gpio_chip); 297 if (err) 298 return err; 299 300 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; 301 302 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); 303 if (err) 304 return err; 305 306 return !!value; 307 } 308 309 static int mtk_xt_set_gpio_as_eint(void *data, unsigned long eint_n) 310 { 311 struct mtk_pinctrl *hw = (struct mtk_pinctrl *)data; 312 const struct mtk_pin_desc *desc; 313 struct gpio_chip *gpio_chip; 314 unsigned int gpio_n; 315 int err; 316 317 err = mtk_xt_get_gpio_n(hw, eint_n, &gpio_n, &gpio_chip); 318 if (err) 319 return err; 320 321 if (mtk_is_virt_gpio(hw, gpio_n)) 322 return 0; 323 324 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n]; 325 326 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, 327 desc->eint.eint_m); 328 if (err) 329 return err; 330 331 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, MTK_INPUT); 332 if (err) 333 return err; 334 335 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, MTK_ENABLE); 336 /* SMT is supposed to be supported by every real GPIO and doesn't 337 * support virtual GPIOs, so the extra condition err != -ENOTSUPP 338 * is just for adding EINT support to these virtual GPIOs. It should 339 * add an extra flag in the pin descriptor when more pins with 340 * distinctive characteristic come out. 341 */ 342 if (err && err != -ENOTSUPP) 343 return err; 344 345 return 0; 346 } 347 348 static const struct mtk_eint_xt mtk_eint_xt = { 349 .get_gpio_n = mtk_xt_get_gpio_n, 350 .get_gpio_state = mtk_xt_get_gpio_state, 351 .set_gpio_as_eint = mtk_xt_set_gpio_as_eint, 352 }; 353 354 int mtk_build_eint(struct mtk_pinctrl *hw, struct platform_device *pdev) 355 { 356 struct device_node *np = pdev->dev.of_node; 357 struct resource *res; 358 359 if (!IS_ENABLED(CONFIG_EINT_MTK)) 360 return 0; 361 362 if (!of_property_read_bool(np, "interrupt-controller")) 363 return -ENODEV; 364 365 hw->eint = devm_kzalloc(hw->dev, sizeof(*hw->eint), GFP_KERNEL); 366 if (!hw->eint) 367 return -ENOMEM; 368 369 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "eint"); 370 if (!res) { 371 dev_err(&pdev->dev, "Unable to get eint resource\n"); 372 return -ENODEV; 373 } 374 375 hw->eint->base = devm_ioremap_resource(&pdev->dev, res); 376 if (IS_ERR(hw->eint->base)) 377 return PTR_ERR(hw->eint->base); 378 379 hw->eint->irq = irq_of_parse_and_map(np, 0); 380 if (!hw->eint->irq) 381 return -EINVAL; 382 383 if (!hw->soc->eint_hw) 384 return -ENODEV; 385 386 hw->eint->dev = &pdev->dev; 387 hw->eint->hw = hw->soc->eint_hw; 388 hw->eint->pctl = hw; 389 hw->eint->gpio_xlate = &mtk_eint_xt; 390 391 return mtk_eint_do_init(hw->eint); 392 } 393 EXPORT_SYMBOL_GPL(mtk_build_eint); 394 395 /* Revision 0 */ 396 int mtk_pinconf_bias_disable_set(struct mtk_pinctrl *hw, 397 const struct mtk_pin_desc *desc) 398 { 399 int err; 400 401 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, 402 MTK_DISABLE); 403 if (err) 404 return err; 405 406 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, 407 MTK_DISABLE); 408 if (err) 409 return err; 410 411 return 0; 412 } 413 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_set); 414 415 int mtk_pinconf_bias_disable_get(struct mtk_pinctrl *hw, 416 const struct mtk_pin_desc *desc, int *res) 417 { 418 int v, v2; 419 int err; 420 421 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &v); 422 if (err) 423 return err; 424 425 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &v2); 426 if (err) 427 return err; 428 429 if (v == MTK_ENABLE || v2 == MTK_ENABLE) 430 return -EINVAL; 431 432 *res = 1; 433 434 return 0; 435 } 436 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_get); 437 438 int mtk_pinconf_bias_set(struct mtk_pinctrl *hw, 439 const struct mtk_pin_desc *desc, bool pullup) 440 { 441 int err, arg; 442 443 arg = pullup ? 1 : 2; 444 445 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, arg & 1); 446 if (err) 447 return err; 448 449 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, 450 !!(arg & 2)); 451 if (err) 452 return err; 453 454 return 0; 455 } 456 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set); 457 458 int mtk_pinconf_bias_get(struct mtk_pinctrl *hw, 459 const struct mtk_pin_desc *desc, bool pullup, int *res) 460 { 461 int reg, err, v; 462 463 reg = pullup ? PINCTRL_PIN_REG_PU : PINCTRL_PIN_REG_PD; 464 465 err = mtk_hw_get_value(hw, desc, reg, &v); 466 if (err) 467 return err; 468 469 if (!v) 470 return -EINVAL; 471 472 *res = 1; 473 474 return 0; 475 } 476 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get); 477 478 /* Revision 1 */ 479 int mtk_pinconf_bias_disable_set_rev1(struct mtk_pinctrl *hw, 480 const struct mtk_pin_desc *desc) 481 { 482 int err; 483 484 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, 485 MTK_DISABLE); 486 if (err) 487 return err; 488 489 return 0; 490 } 491 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_set_rev1); 492 493 int mtk_pinconf_bias_disable_get_rev1(struct mtk_pinctrl *hw, 494 const struct mtk_pin_desc *desc, int *res) 495 { 496 int v, err; 497 498 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, &v); 499 if (err) 500 return err; 501 502 if (v == MTK_ENABLE) 503 return -EINVAL; 504 505 *res = 1; 506 507 return 0; 508 } 509 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_disable_get_rev1); 510 511 int mtk_pinconf_bias_set_rev1(struct mtk_pinctrl *hw, 512 const struct mtk_pin_desc *desc, bool pullup) 513 { 514 int err, arg; 515 516 arg = pullup ? MTK_PULLUP : MTK_PULLDOWN; 517 518 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, 519 MTK_ENABLE); 520 if (err) 521 return err; 522 523 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, arg); 524 if (err) 525 return err; 526 527 return 0; 528 } 529 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_rev1); 530 531 int mtk_pinconf_bias_get_rev1(struct mtk_pinctrl *hw, 532 const struct mtk_pin_desc *desc, bool pullup, 533 int *res) 534 { 535 int err, v; 536 537 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, &v); 538 if (err) 539 return err; 540 541 if (v == MTK_DISABLE) 542 return -EINVAL; 543 544 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, &v); 545 if (err) 546 return err; 547 548 if (pullup ^ (v == MTK_PULLUP)) 549 return -EINVAL; 550 551 *res = 1; 552 553 return 0; 554 } 555 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_rev1); 556 557 /* Combo for the following pull register type: 558 * 1. PU + PD 559 * 2. PULLSEL + PULLEN 560 * 3. PUPD + R0 + R1 561 */ 562 static int mtk_pinconf_bias_set_pu_pd(struct mtk_pinctrl *hw, 563 const struct mtk_pin_desc *desc, 564 u32 pullup, u32 arg) 565 { 566 int err, pu, pd; 567 568 if (arg == MTK_DISABLE) { 569 pu = 0; 570 pd = 0; 571 } else if ((arg == MTK_ENABLE) && pullup) { 572 pu = 1; 573 pd = 0; 574 } else if ((arg == MTK_ENABLE) && !pullup) { 575 pu = 0; 576 pd = 1; 577 } else { 578 err = -EINVAL; 579 goto out; 580 } 581 582 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PU, pu); 583 if (err) 584 goto out; 585 586 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PD, pd); 587 588 out: 589 return err; 590 } 591 592 static int mtk_pinconf_bias_set_pullsel_pullen(struct mtk_pinctrl *hw, 593 const struct mtk_pin_desc *desc, 594 u32 pullup, u32 arg) 595 { 596 int err, enable; 597 598 if (arg == MTK_DISABLE) 599 enable = 0; 600 else if (arg == MTK_ENABLE) 601 enable = 1; 602 else { 603 err = -EINVAL; 604 goto out; 605 } 606 607 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLEN, enable); 608 if (err) 609 goto out; 610 611 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, pullup); 612 613 out: 614 return err; 615 } 616 617 static int mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw, 618 const struct mtk_pin_desc *desc, 619 u32 pullup, u32 arg) 620 { 621 int err, r0, r1; 622 623 if ((arg == MTK_DISABLE) || (arg == MTK_PUPD_SET_R1R0_00)) { 624 pullup = 0; 625 r0 = 0; 626 r1 = 0; 627 } else if (arg == MTK_PUPD_SET_R1R0_01) { 628 r0 = 1; 629 r1 = 0; 630 } else if (arg == MTK_PUPD_SET_R1R0_10) { 631 r0 = 0; 632 r1 = 1; 633 } else if (arg == MTK_PUPD_SET_R1R0_11) { 634 r0 = 1; 635 r1 = 1; 636 } else { 637 err = -EINVAL; 638 goto out; 639 } 640 641 /* MTK HW PUPD bit: 1 for pull-down, 0 for pull-up */ 642 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PUPD, !pullup); 643 if (err) 644 goto out; 645 646 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R0, r0); 647 if (err) 648 goto out; 649 650 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R1, r1); 651 652 out: 653 return err; 654 } 655 656 static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw, 657 const struct mtk_pin_desc *desc, 658 u32 *pullup, u32 *enable) 659 { 660 int err, pu, pd; 661 662 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu); 663 if (err) 664 goto out; 665 666 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd); 667 if (err) 668 goto out; 669 670 if (pu == 0 && pd == 0) { 671 *pullup = 0; 672 *enable = MTK_DISABLE; 673 } else if (pu == 1 && pd == 0) { 674 *pullup = 1; 675 *enable = MTK_ENABLE; 676 } else if (pu == 0 && pd == 1) { 677 *pullup = 0; 678 *enable = MTK_ENABLE; 679 } else 680 err = -EINVAL; 681 682 out: 683 return err; 684 } 685 686 static int mtk_pinconf_bias_get_pullsel_pullen(struct mtk_pinctrl *hw, 687 const struct mtk_pin_desc *desc, 688 u32 *pullup, u32 *enable) 689 { 690 int err; 691 692 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLSEL, pullup); 693 if (err) 694 goto out; 695 696 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PULLEN, enable); 697 698 out: 699 return err; 700 } 701 702 static int mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw, 703 const struct mtk_pin_desc *desc, 704 u32 *pullup, u32 *enable) 705 { 706 int err, r0, r1; 707 708 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PUPD, pullup); 709 if (err) 710 goto out; 711 /* MTK HW PUPD bit: 1 for pull-down, 0 for pull-up */ 712 *pullup = !(*pullup); 713 714 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R0, &r0); 715 if (err) 716 goto out; 717 718 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R1, &r1); 719 if (err) 720 goto out; 721 722 if ((r1 == 0) && (r0 == 0)) 723 *enable = MTK_PUPD_SET_R1R0_00; 724 else if ((r1 == 0) && (r0 == 1)) 725 *enable = MTK_PUPD_SET_R1R0_01; 726 else if ((r1 == 1) && (r0 == 0)) 727 *enable = MTK_PUPD_SET_R1R0_10; 728 else if ((r1 == 1) && (r0 == 1)) 729 *enable = MTK_PUPD_SET_R1R0_11; 730 else 731 err = -EINVAL; 732 733 out: 734 return err; 735 } 736 737 int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw, 738 const struct mtk_pin_desc *desc, 739 u32 pullup, u32 arg) 740 { 741 int err; 742 743 err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg); 744 if (!err) 745 goto out; 746 747 err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc, pullup, arg); 748 if (!err) 749 goto out; 750 751 err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg); 752 753 out: 754 return err; 755 } 756 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo); 757 758 int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw, 759 const struct mtk_pin_desc *desc, 760 u32 *pullup, u32 *enable) 761 { 762 int err; 763 764 err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable); 765 if (!err) 766 goto out; 767 768 err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc, pullup, enable); 769 if (!err) 770 goto out; 771 772 err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable); 773 774 out: 775 return err; 776 } 777 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo); 778 779 /* Revision 0 */ 780 int mtk_pinconf_drive_set(struct mtk_pinctrl *hw, 781 const struct mtk_pin_desc *desc, u32 arg) 782 { 783 const struct mtk_drive_desc *tb; 784 int err = -ENOTSUPP; 785 786 tb = &mtk_drive[desc->drv_n]; 787 /* 4mA when (e8, e4) = (0, 0) 788 * 8mA when (e8, e4) = (0, 1) 789 * 12mA when (e8, e4) = (1, 0) 790 * 16mA when (e8, e4) = (1, 1) 791 */ 792 if ((arg >= tb->min && arg <= tb->max) && !(arg % tb->step)) { 793 arg = (arg / tb->step - 1) * tb->scal; 794 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_E4, 795 arg & 0x1); 796 if (err) 797 return err; 798 799 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_E8, 800 (arg & 0x2) >> 1); 801 if (err) 802 return err; 803 } 804 805 return err; 806 } 807 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_set); 808 809 int mtk_pinconf_drive_get(struct mtk_pinctrl *hw, 810 const struct mtk_pin_desc *desc, int *val) 811 { 812 const struct mtk_drive_desc *tb; 813 int err, val1, val2; 814 815 tb = &mtk_drive[desc->drv_n]; 816 817 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_E4, &val1); 818 if (err) 819 return err; 820 821 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_E8, &val2); 822 if (err) 823 return err; 824 825 /* 4mA when (e8, e4) = (0, 0); 8mA when (e8, e4) = (0, 1) 826 * 12mA when (e8, e4) = (1, 0); 16mA when (e8, e4) = (1, 1) 827 */ 828 *val = (((val2 << 1) + val1) / tb->scal + 1) * tb->step; 829 830 return 0; 831 } 832 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_get); 833 834 /* Revision 1 */ 835 int mtk_pinconf_drive_set_rev1(struct mtk_pinctrl *hw, 836 const struct mtk_pin_desc *desc, u32 arg) 837 { 838 const struct mtk_drive_desc *tb; 839 int err = -ENOTSUPP; 840 841 tb = &mtk_drive[desc->drv_n]; 842 843 if ((arg >= tb->min && arg <= tb->max) && !(arg % tb->step)) { 844 arg = (arg / tb->step - 1) * tb->scal; 845 846 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV, 847 arg); 848 if (err) 849 return err; 850 } 851 852 return err; 853 } 854 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_set_rev1); 855 856 int mtk_pinconf_drive_get_rev1(struct mtk_pinctrl *hw, 857 const struct mtk_pin_desc *desc, int *val) 858 { 859 const struct mtk_drive_desc *tb; 860 int err, val1; 861 862 tb = &mtk_drive[desc->drv_n]; 863 864 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV, &val1); 865 if (err) 866 return err; 867 868 *val = ((val1 & 0x7) / tb->scal + 1) * tb->step; 869 870 return 0; 871 } 872 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_get_rev1); 873 874 int mtk_pinconf_drive_set_raw(struct mtk_pinctrl *hw, 875 const struct mtk_pin_desc *desc, u32 arg) 876 { 877 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV, arg); 878 } 879 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_set_raw); 880 881 int mtk_pinconf_drive_get_raw(struct mtk_pinctrl *hw, 882 const struct mtk_pin_desc *desc, int *val) 883 { 884 return mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV, val); 885 } 886 EXPORT_SYMBOL_GPL(mtk_pinconf_drive_get_raw); 887 888 int mtk_pinconf_adv_pull_set(struct mtk_pinctrl *hw, 889 const struct mtk_pin_desc *desc, bool pullup, 890 u32 arg) 891 { 892 int err; 893 894 /* 10K off & 50K (75K) off, when (R0, R1) = (0, 0); 895 * 10K off & 50K (75K) on, when (R0, R1) = (0, 1); 896 * 10K on & 50K (75K) off, when (R0, R1) = (1, 0); 897 * 10K on & 50K (75K) on, when (R0, R1) = (1, 1) 898 */ 899 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R0, arg & 1); 900 if (err) 901 return 0; 902 903 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_R1, 904 !!(arg & 2)); 905 if (err) 906 return 0; 907 908 arg = pullup ? 0 : 1; 909 910 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_PUPD, arg); 911 912 /* If PUPD register is not supported for that pin, let's fallback to 913 * general bias control. 914 */ 915 if (err == -ENOTSUPP) { 916 if (hw->soc->bias_set) { 917 err = hw->soc->bias_set(hw, desc, pullup); 918 if (err) 919 return err; 920 } else { 921 return -ENOTSUPP; 922 } 923 } 924 925 return err; 926 } 927 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_pull_set); 928 929 int mtk_pinconf_adv_pull_get(struct mtk_pinctrl *hw, 930 const struct mtk_pin_desc *desc, bool pullup, 931 u32 *val) 932 { 933 u32 t, t2; 934 int err; 935 936 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PUPD, &t); 937 938 /* If PUPD register is not supported for that pin, let's fallback to 939 * general bias control. 940 */ 941 if (err == -ENOTSUPP) { 942 if (hw->soc->bias_get) { 943 err = hw->soc->bias_get(hw, desc, pullup, val); 944 if (err) 945 return err; 946 } else { 947 return -ENOTSUPP; 948 } 949 } else { 950 /* t == 0 supposes PULLUP for the customized PULL setup */ 951 if (err) 952 return err; 953 954 if (pullup ^ !t) 955 return -EINVAL; 956 } 957 958 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R0, &t); 959 if (err) 960 return err; 961 962 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_R1, &t2); 963 if (err) 964 return err; 965 966 *val = (t | t2 << 1) & 0x7; 967 968 return 0; 969 } 970 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_pull_get); 971 972 int mtk_pinconf_adv_drive_set(struct mtk_pinctrl *hw, 973 const struct mtk_pin_desc *desc, u32 arg) 974 { 975 int err; 976 int en = arg & 1; 977 int e0 = !!(arg & 2); 978 int e1 = !!(arg & 4); 979 980 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_EN, en); 981 if (err) 982 return err; 983 984 if (!en) 985 return err; 986 987 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_E0, e0); 988 if (err) 989 return err; 990 991 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV_E1, e1); 992 if (err) 993 return err; 994 995 return err; 996 } 997 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_drive_set); 998 999 int mtk_pinconf_adv_drive_get(struct mtk_pinctrl *hw, 1000 const struct mtk_pin_desc *desc, u32 *val) 1001 { 1002 u32 en, e0, e1; 1003 int err; 1004 1005 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_EN, &en); 1006 if (err) 1007 return err; 1008 1009 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_E0, &e0); 1010 if (err) 1011 return err; 1012 1013 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV_E1, &e1); 1014 if (err) 1015 return err; 1016 1017 *val = (en | e0 << 1 | e1 << 2) & 0x7; 1018 1019 return 0; 1020 } 1021 EXPORT_SYMBOL_GPL(mtk_pinconf_adv_drive_get); 1022 1023 MODULE_LICENSE("GPL v2"); 1024 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>"); 1025 MODULE_DESCRIPTION("Pin configuration library module for mediatek SoCs"); 1026