1e278dcb7SAndy Shevchenko // SPDX-License-Identifier: GPL-2.0 2e278dcb7SAndy Shevchenko /* 3e278dcb7SAndy Shevchenko * Intel Jasper Lake PCH pinctrl/GPIO driver 4e278dcb7SAndy Shevchenko * 5e278dcb7SAndy Shevchenko * Copyright (C) 2020, Intel Corporation 6e278dcb7SAndy Shevchenko * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 7e278dcb7SAndy Shevchenko */ 8e278dcb7SAndy Shevchenko 9e278dcb7SAndy Shevchenko #include <linux/mod_devicetable.h> 10e278dcb7SAndy Shevchenko #include <linux/module.h> 11e278dcb7SAndy Shevchenko #include <linux/platform_device.h> 12e278dcb7SAndy Shevchenko 13e278dcb7SAndy Shevchenko #include <linux/pinctrl/pinctrl.h> 14e278dcb7SAndy Shevchenko 15e278dcb7SAndy Shevchenko #include "pinctrl-intel.h" 16e278dcb7SAndy Shevchenko 17e278dcb7SAndy Shevchenko #define JSL_PAD_OWN 0x020 18e278dcb7SAndy Shevchenko #define JSL_PADCFGLOCK 0x080 19e278dcb7SAndy Shevchenko #define JSL_HOSTSW_OWN 0x0b0 20e278dcb7SAndy Shevchenko #define JSL_GPI_IS 0x100 21e278dcb7SAndy Shevchenko #define JSL_GPI_IE 0x120 22e278dcb7SAndy Shevchenko 23e278dcb7SAndy Shevchenko #define JSL_GPP(r, s, e, g) \ 24e278dcb7SAndy Shevchenko { \ 25e278dcb7SAndy Shevchenko .reg_num = (r), \ 26e278dcb7SAndy Shevchenko .base = (s), \ 27e278dcb7SAndy Shevchenko .size = ((e) - (s) + 1), \ 28e278dcb7SAndy Shevchenko .gpio_base = (g), \ 29e278dcb7SAndy Shevchenko } 30e278dcb7SAndy Shevchenko 31e278dcb7SAndy Shevchenko #define JSL_COMMUNITY(b, s, e, g) \ 32e278dcb7SAndy Shevchenko { \ 33e278dcb7SAndy Shevchenko .barno = (b), \ 34e278dcb7SAndy Shevchenko .padown_offset = JSL_PAD_OWN, \ 35e278dcb7SAndy Shevchenko .padcfglock_offset = JSL_PADCFGLOCK, \ 36e278dcb7SAndy Shevchenko .hostown_offset = JSL_HOSTSW_OWN, \ 37e278dcb7SAndy Shevchenko .is_offset = JSL_GPI_IS, \ 38e278dcb7SAndy Shevchenko .ie_offset = JSL_GPI_IE, \ 39e278dcb7SAndy Shevchenko .pin_base = (s), \ 40e278dcb7SAndy Shevchenko .npins = ((e) - (s) + 1), \ 41e278dcb7SAndy Shevchenko .gpps = (g), \ 42e278dcb7SAndy Shevchenko .ngpps = ARRAY_SIZE(g), \ 43e278dcb7SAndy Shevchenko } 44e278dcb7SAndy Shevchenko 45e278dcb7SAndy Shevchenko /* Jasper Lake */ 46e278dcb7SAndy Shevchenko static const struct pinctrl_pin_desc jsl_pins[] = { 47e278dcb7SAndy Shevchenko /* GPP_F */ 48e278dcb7SAndy Shevchenko PINCTRL_PIN(0, "CNV_BRI_DT_UART0_RTSB"), 49e278dcb7SAndy Shevchenko PINCTRL_PIN(1, "CNV_BRI_RSP_UART0_RXD"), 50e278dcb7SAndy Shevchenko PINCTRL_PIN(2, "EMMC_HIP_MON"), 51e278dcb7SAndy Shevchenko PINCTRL_PIN(3, "CNV_RGI_RSP_UART0_CTSB"), 52e278dcb7SAndy Shevchenko PINCTRL_PIN(4, "CNV_RF_RESET_B"), 53e278dcb7SAndy Shevchenko PINCTRL_PIN(5, "MODEM_CLKREQ"), 54e278dcb7SAndy Shevchenko PINCTRL_PIN(6, "CNV_PA_BLANKING"), 55e278dcb7SAndy Shevchenko PINCTRL_PIN(7, "EMMC_CMD"), 56e278dcb7SAndy Shevchenko PINCTRL_PIN(8, "EMMC_DATA0"), 57e278dcb7SAndy Shevchenko PINCTRL_PIN(9, "EMMC_DATA1"), 58e278dcb7SAndy Shevchenko PINCTRL_PIN(10, "EMMC_DATA2"), 59e278dcb7SAndy Shevchenko PINCTRL_PIN(11, "EMMC_DATA3"), 60e278dcb7SAndy Shevchenko PINCTRL_PIN(12, "EMMC_DATA4"), 61e278dcb7SAndy Shevchenko PINCTRL_PIN(13, "EMMC_DATA5"), 62e278dcb7SAndy Shevchenko PINCTRL_PIN(14, "EMMC_DATA6"), 63e278dcb7SAndy Shevchenko PINCTRL_PIN(15, "EMMC_DATA7"), 64e278dcb7SAndy Shevchenko PINCTRL_PIN(16, "EMMC_RCLK"), 65e278dcb7SAndy Shevchenko PINCTRL_PIN(17, "EMMC_CLK"), 66e278dcb7SAndy Shevchenko PINCTRL_PIN(18, "EMMC_RESETB"), 67e278dcb7SAndy Shevchenko PINCTRL_PIN(19, "A4WP_PRESENT"), 68e278dcb7SAndy Shevchenko /* GPP_B */ 69e278dcb7SAndy Shevchenko PINCTRL_PIN(20, "CORE_VID_0"), 70e278dcb7SAndy Shevchenko PINCTRL_PIN(21, "CORE_VID_1"), 71e278dcb7SAndy Shevchenko PINCTRL_PIN(22, "VRALERTB"), 72e278dcb7SAndy Shevchenko PINCTRL_PIN(23, "CPU_GP_2"), 73e278dcb7SAndy Shevchenko PINCTRL_PIN(24, "CPU_GP_3"), 74e278dcb7SAndy Shevchenko PINCTRL_PIN(25, "SRCCLKREQB_0"), 75e278dcb7SAndy Shevchenko PINCTRL_PIN(26, "SRCCLKREQB_1"), 76e278dcb7SAndy Shevchenko PINCTRL_PIN(27, "SRCCLKREQB_2"), 77e278dcb7SAndy Shevchenko PINCTRL_PIN(28, "SRCCLKREQB_3"), 78e278dcb7SAndy Shevchenko PINCTRL_PIN(29, "SRCCLKREQB_4"), 79e278dcb7SAndy Shevchenko PINCTRL_PIN(30, "SRCCLKREQB_5"), 80e278dcb7SAndy Shevchenko PINCTRL_PIN(31, "PMCALERTB"), 81e278dcb7SAndy Shevchenko PINCTRL_PIN(32, "SLP_S0B"), 82e278dcb7SAndy Shevchenko PINCTRL_PIN(33, "PLTRSTB"), 83e278dcb7SAndy Shevchenko PINCTRL_PIN(34, "SPKR"), 84e278dcb7SAndy Shevchenko PINCTRL_PIN(35, "GSPI0_CS0B"), 85e278dcb7SAndy Shevchenko PINCTRL_PIN(36, "GSPI0_CLK"), 86e278dcb7SAndy Shevchenko PINCTRL_PIN(37, "GSPI0_MISO"), 87e278dcb7SAndy Shevchenko PINCTRL_PIN(38, "GSPI0_MOSI"), 88e278dcb7SAndy Shevchenko PINCTRL_PIN(39, "GSPI1_CS0B"), 89e278dcb7SAndy Shevchenko PINCTRL_PIN(40, "GSPI1_CLK"), 90e278dcb7SAndy Shevchenko PINCTRL_PIN(41, "GSPI1_MISO"), 91e278dcb7SAndy Shevchenko PINCTRL_PIN(42, "GSPI1_MOSI"), 92e278dcb7SAndy Shevchenko PINCTRL_PIN(43, "DDSP_HPD_A"), 93e278dcb7SAndy Shevchenko PINCTRL_PIN(44, "GSPI0_CLK_LOOPBK"), 94e278dcb7SAndy Shevchenko PINCTRL_PIN(45, "GSPI1_CLK_LOOPBK"), 95e278dcb7SAndy Shevchenko /* GPP_A */ 96e278dcb7SAndy Shevchenko PINCTRL_PIN(46, "ESPI_IO_0"), 97e278dcb7SAndy Shevchenko PINCTRL_PIN(47, "ESPI_IO_1"), 98e278dcb7SAndy Shevchenko PINCTRL_PIN(48, "ESPI_IO_2"), 99e278dcb7SAndy Shevchenko PINCTRL_PIN(49, "ESPI_IO_3"), 100e278dcb7SAndy Shevchenko PINCTRL_PIN(50, "ESPI_CSB"), 101e278dcb7SAndy Shevchenko PINCTRL_PIN(51, "ESPI_CLK"), 102e278dcb7SAndy Shevchenko PINCTRL_PIN(52, "ESPI_RESETB"), 103e278dcb7SAndy Shevchenko PINCTRL_PIN(53, "SMBCLK"), 104e278dcb7SAndy Shevchenko PINCTRL_PIN(54, "SMBDATA"), 105e278dcb7SAndy Shevchenko PINCTRL_PIN(55, "SMBALERTB"), 106e278dcb7SAndy Shevchenko PINCTRL_PIN(56, "CPU_GP_0"), 107e278dcb7SAndy Shevchenko PINCTRL_PIN(57, "CPU_GP_1"), 108e278dcb7SAndy Shevchenko PINCTRL_PIN(58, "USB2_OCB_1"), 109e278dcb7SAndy Shevchenko PINCTRL_PIN(59, "USB2_OCB_2"), 110e278dcb7SAndy Shevchenko PINCTRL_PIN(60, "USB2_OCB_3"), 111e278dcb7SAndy Shevchenko PINCTRL_PIN(61, "DDSP_HPD_A_TIME_SYNC_0"), 112e278dcb7SAndy Shevchenko PINCTRL_PIN(62, "DDSP_HPD_B"), 113e278dcb7SAndy Shevchenko PINCTRL_PIN(63, "DDSP_HPD_C"), 114e278dcb7SAndy Shevchenko PINCTRL_PIN(64, "USB2_OCB_0"), 115e278dcb7SAndy Shevchenko PINCTRL_PIN(65, "PCHHOTB"), 116e278dcb7SAndy Shevchenko PINCTRL_PIN(66, "ESPI_CLK_LOOPBK"), 117e278dcb7SAndy Shevchenko /* GPP_S */ 118e278dcb7SAndy Shevchenko PINCTRL_PIN(67, "SNDW1_CLK"), 119e278dcb7SAndy Shevchenko PINCTRL_PIN(68, "SNDW1_DATA"), 120e278dcb7SAndy Shevchenko PINCTRL_PIN(69, "SNDW2_CLK"), 121e278dcb7SAndy Shevchenko PINCTRL_PIN(70, "SNDW2_DATA"), 122e278dcb7SAndy Shevchenko PINCTRL_PIN(71, "SNDW1_CLK"), 123e278dcb7SAndy Shevchenko PINCTRL_PIN(72, "SNDW1_DATA"), 124e278dcb7SAndy Shevchenko PINCTRL_PIN(73, "SNDW4_CLK_DMIC_CLK_0"), 125e278dcb7SAndy Shevchenko PINCTRL_PIN(74, "SNDW4_DATA_DMIC_DATA_0"), 126e278dcb7SAndy Shevchenko /* GPP_R */ 127e278dcb7SAndy Shevchenko PINCTRL_PIN(75, "HDA_BCLK"), 128e278dcb7SAndy Shevchenko PINCTRL_PIN(76, "HDA_SYNC"), 129e278dcb7SAndy Shevchenko PINCTRL_PIN(77, "HDA_SDO"), 130e278dcb7SAndy Shevchenko PINCTRL_PIN(78, "HDA_SDI_0"), 131e278dcb7SAndy Shevchenko PINCTRL_PIN(79, "HDA_RSTB"), 132e278dcb7SAndy Shevchenko PINCTRL_PIN(80, "HDA_SDI_1"), 133e278dcb7SAndy Shevchenko PINCTRL_PIN(81, "I2S1_SFRM"), 134e278dcb7SAndy Shevchenko PINCTRL_PIN(82, "I2S1_TXD"), 135e278dcb7SAndy Shevchenko /* GPP_H */ 136e278dcb7SAndy Shevchenko PINCTRL_PIN(83, "GPPC_H_0"), 137e278dcb7SAndy Shevchenko PINCTRL_PIN(84, "SD_PWR_EN_B"), 138e278dcb7SAndy Shevchenko PINCTRL_PIN(85, "MODEM_CLKREQ"), 139e278dcb7SAndy Shevchenko PINCTRL_PIN(86, "SX_EXIT_HOLDOFFB"), 140e278dcb7SAndy Shevchenko PINCTRL_PIN(87, "I2C2_SDA"), 141e278dcb7SAndy Shevchenko PINCTRL_PIN(88, "I2C2_SCL"), 142e278dcb7SAndy Shevchenko PINCTRL_PIN(89, "I2C3_SDA"), 143e278dcb7SAndy Shevchenko PINCTRL_PIN(90, "I2C3_SCL"), 144e278dcb7SAndy Shevchenko PINCTRL_PIN(91, "I2C4_SDA"), 145e278dcb7SAndy Shevchenko PINCTRL_PIN(92, "I2C4_SCL"), 146e278dcb7SAndy Shevchenko PINCTRL_PIN(93, "CPU_VCCIO_PWR_GATEB"), 147e278dcb7SAndy Shevchenko PINCTRL_PIN(94, "I2S2_SCLK"), 148e278dcb7SAndy Shevchenko PINCTRL_PIN(95, "I2S2_SFRM"), 149e278dcb7SAndy Shevchenko PINCTRL_PIN(96, "I2S2_TXD"), 150e278dcb7SAndy Shevchenko PINCTRL_PIN(97, "I2S2_RXD"), 151e278dcb7SAndy Shevchenko PINCTRL_PIN(98, "I2S1_SCLK"), 152e278dcb7SAndy Shevchenko PINCTRL_PIN(99, "GPPC_H_16"), 153e278dcb7SAndy Shevchenko PINCTRL_PIN(100, "GPPC_H_17"), 154e278dcb7SAndy Shevchenko PINCTRL_PIN(101, "GPPC_H_18"), 155e278dcb7SAndy Shevchenko PINCTRL_PIN(102, "GPPC_H_19"), 156e278dcb7SAndy Shevchenko PINCTRL_PIN(103, "GPPC_H_20"), 157e278dcb7SAndy Shevchenko PINCTRL_PIN(104, "GPPC_H_21"), 158e278dcb7SAndy Shevchenko PINCTRL_PIN(105, "GPPC_H_22"), 159e278dcb7SAndy Shevchenko PINCTRL_PIN(106, "GPPC_H_23"), 160e278dcb7SAndy Shevchenko /* GPP_D */ 161e278dcb7SAndy Shevchenko PINCTRL_PIN(107, "SPI1_CSB"), 162e278dcb7SAndy Shevchenko PINCTRL_PIN(108, "SPI1_CLK"), 163e278dcb7SAndy Shevchenko PINCTRL_PIN(109, "SPI1_MISO_IO_1"), 164e278dcb7SAndy Shevchenko PINCTRL_PIN(110, "SPI1_MOSI_IO_0"), 165e278dcb7SAndy Shevchenko PINCTRL_PIN(111, "ISH_I2C0_SDA"), 166e278dcb7SAndy Shevchenko PINCTRL_PIN(112, "ISH_I2C0_SCL"), 167e278dcb7SAndy Shevchenko PINCTRL_PIN(113, "ISH_I2C1_SDA"), 168e278dcb7SAndy Shevchenko PINCTRL_PIN(114, "ISH_I2C1_SCL"), 169e278dcb7SAndy Shevchenko PINCTRL_PIN(115, "ISH_SPI_CSB"), 170e278dcb7SAndy Shevchenko PINCTRL_PIN(116, "ISH_SPI_CLK"), 171e278dcb7SAndy Shevchenko PINCTRL_PIN(117, "ISH_SPI_MISO"), 172e278dcb7SAndy Shevchenko PINCTRL_PIN(118, "ISH_SPI_MOSI"), 173e278dcb7SAndy Shevchenko PINCTRL_PIN(119, "ISH_UART0_RXD"), 174e278dcb7SAndy Shevchenko PINCTRL_PIN(120, "ISH_UART0_TXD"), 175e278dcb7SAndy Shevchenko PINCTRL_PIN(121, "ISH_UART0_RTSB"), 176e278dcb7SAndy Shevchenko PINCTRL_PIN(122, "ISH_UART0_CTSB"), 177e278dcb7SAndy Shevchenko PINCTRL_PIN(123, "SPI1_IO_2"), 178e278dcb7SAndy Shevchenko PINCTRL_PIN(124, "SPI1_IO_3"), 179e278dcb7SAndy Shevchenko PINCTRL_PIN(125, "I2S_MCLK"), 180e278dcb7SAndy Shevchenko PINCTRL_PIN(126, "CNV_MFUART2_RXD"), 181e278dcb7SAndy Shevchenko PINCTRL_PIN(127, "CNV_MFUART2_TXD"), 182e278dcb7SAndy Shevchenko PINCTRL_PIN(128, "CNV_PA_BLANKING"), 183e278dcb7SAndy Shevchenko PINCTRL_PIN(129, "I2C5_SDA"), 184e278dcb7SAndy Shevchenko PINCTRL_PIN(130, "I2C5_SCL"), 185e278dcb7SAndy Shevchenko PINCTRL_PIN(131, "GSPI2_CLK_LOOPBK"), 186e278dcb7SAndy Shevchenko PINCTRL_PIN(132, "SPI1_CLK_LOOPBK"), 187e278dcb7SAndy Shevchenko /* vGPIO */ 188e278dcb7SAndy Shevchenko PINCTRL_PIN(133, "CNV_BTEN"), 189e278dcb7SAndy Shevchenko PINCTRL_PIN(134, "CNV_WCEN"), 190e278dcb7SAndy Shevchenko PINCTRL_PIN(135, "CNV_BT_HOST_WAKEB"), 191e278dcb7SAndy Shevchenko PINCTRL_PIN(136, "CNV_BT_IF_SELECT"), 192e278dcb7SAndy Shevchenko PINCTRL_PIN(137, "vCNV_BT_UART_TXD"), 193e278dcb7SAndy Shevchenko PINCTRL_PIN(138, "vCNV_BT_UART_RXD"), 194e278dcb7SAndy Shevchenko PINCTRL_PIN(139, "vCNV_BT_UART_CTS_B"), 195e278dcb7SAndy Shevchenko PINCTRL_PIN(140, "vCNV_BT_UART_RTS_B"), 196e278dcb7SAndy Shevchenko PINCTRL_PIN(141, "vCNV_MFUART1_TXD"), 197e278dcb7SAndy Shevchenko PINCTRL_PIN(142, "vCNV_MFUART1_RXD"), 198e278dcb7SAndy Shevchenko PINCTRL_PIN(143, "vCNV_MFUART1_CTS_B"), 199e278dcb7SAndy Shevchenko PINCTRL_PIN(144, "vCNV_MFUART1_RTS_B"), 200e278dcb7SAndy Shevchenko PINCTRL_PIN(145, "vUART0_TXD"), 201e278dcb7SAndy Shevchenko PINCTRL_PIN(146, "vUART0_RXD"), 202e278dcb7SAndy Shevchenko PINCTRL_PIN(147, "vUART0_CTS_B"), 203e278dcb7SAndy Shevchenko PINCTRL_PIN(148, "vUART0_RTS_B"), 204e278dcb7SAndy Shevchenko PINCTRL_PIN(149, "vISH_UART0_TXD"), 205e278dcb7SAndy Shevchenko PINCTRL_PIN(150, "vISH_UART0_RXD"), 206e278dcb7SAndy Shevchenko PINCTRL_PIN(151, "vISH_UART0_CTS_B"), 207e278dcb7SAndy Shevchenko PINCTRL_PIN(152, "vISH_UART0_RTS_B"), 208e278dcb7SAndy Shevchenko PINCTRL_PIN(153, "vCNV_BT_I2S_BCLK"), 209e278dcb7SAndy Shevchenko PINCTRL_PIN(154, "vCNV_BT_I2S_WS_SYNC"), 210e278dcb7SAndy Shevchenko PINCTRL_PIN(155, "vCNV_BT_I2S_SDO"), 211e278dcb7SAndy Shevchenko PINCTRL_PIN(156, "vCNV_BT_I2S_SDI"), 212e278dcb7SAndy Shevchenko PINCTRL_PIN(157, "vI2S2_SCLK"), 213e278dcb7SAndy Shevchenko PINCTRL_PIN(158, "vI2S2_SFRM"), 214e278dcb7SAndy Shevchenko PINCTRL_PIN(159, "vI2S2_TXD"), 215e278dcb7SAndy Shevchenko PINCTRL_PIN(160, "vI2S2_RXD"), 216e278dcb7SAndy Shevchenko PINCTRL_PIN(161, "vSD3_CD_B"), 217e278dcb7SAndy Shevchenko /* GPP_C */ 218e278dcb7SAndy Shevchenko PINCTRL_PIN(162, "GPPC_C_0"), 219e278dcb7SAndy Shevchenko PINCTRL_PIN(163, "GPPC_C_1"), 220e278dcb7SAndy Shevchenko PINCTRL_PIN(164, "GPPC_C_2"), 221e278dcb7SAndy Shevchenko PINCTRL_PIN(165, "GPPC_C_3"), 222e278dcb7SAndy Shevchenko PINCTRL_PIN(166, "GPPC_C_4"), 223e278dcb7SAndy Shevchenko PINCTRL_PIN(167, "GPPC_C_5"), 224e278dcb7SAndy Shevchenko PINCTRL_PIN(168, "SUSWARNB_SUSPWRDNACK"), 225e278dcb7SAndy Shevchenko PINCTRL_PIN(169, "SUSACKB"), 226e278dcb7SAndy Shevchenko PINCTRL_PIN(170, "UART0_RXD"), 227e278dcb7SAndy Shevchenko PINCTRL_PIN(171, "UART0_TXD"), 228e278dcb7SAndy Shevchenko PINCTRL_PIN(172, "UART0_RTSB"), 229e278dcb7SAndy Shevchenko PINCTRL_PIN(173, "UART0_CTSB"), 230e278dcb7SAndy Shevchenko PINCTRL_PIN(174, "UART1_RXD"), 231e278dcb7SAndy Shevchenko PINCTRL_PIN(175, "UART1_TXD"), 232e278dcb7SAndy Shevchenko PINCTRL_PIN(176, "UART1_RTSB"), 233e278dcb7SAndy Shevchenko PINCTRL_PIN(177, "UART1_CTSB"), 234e278dcb7SAndy Shevchenko PINCTRL_PIN(178, "I2C0_SDA"), 235e278dcb7SAndy Shevchenko PINCTRL_PIN(179, "I2C0_SCL"), 236e278dcb7SAndy Shevchenko PINCTRL_PIN(180, "I2C1_SDA"), 237e278dcb7SAndy Shevchenko PINCTRL_PIN(181, "I2C1_SCL"), 238e278dcb7SAndy Shevchenko PINCTRL_PIN(182, "UART2_RXD"), 239e278dcb7SAndy Shevchenko PINCTRL_PIN(183, "UART2_TXD"), 240e278dcb7SAndy Shevchenko PINCTRL_PIN(184, "UART2_RTSB"), 241e278dcb7SAndy Shevchenko PINCTRL_PIN(185, "UART2_CTSB"), 242e278dcb7SAndy Shevchenko /* HVCMOS */ 243e278dcb7SAndy Shevchenko PINCTRL_PIN(186, "L_BKLTEN"), 244e278dcb7SAndy Shevchenko PINCTRL_PIN(187, "L_BKLTCTL"), 245e278dcb7SAndy Shevchenko PINCTRL_PIN(188, "L_VDDEN"), 246e278dcb7SAndy Shevchenko PINCTRL_PIN(189, "SYS_PWROK"), 247e278dcb7SAndy Shevchenko PINCTRL_PIN(190, "SYS_RESETB"), 248e278dcb7SAndy Shevchenko PINCTRL_PIN(191, "MLK_RSTB"), 249e278dcb7SAndy Shevchenko /* GPP_E */ 250e278dcb7SAndy Shevchenko PINCTRL_PIN(192, "ISH_GP_0"), 251e278dcb7SAndy Shevchenko PINCTRL_PIN(193, "ISH_GP_1"), 252e278dcb7SAndy Shevchenko PINCTRL_PIN(194, "IMGCLKOUT_1"), 253e278dcb7SAndy Shevchenko PINCTRL_PIN(195, "ISH_GP_2"), 254e278dcb7SAndy Shevchenko PINCTRL_PIN(196, "IMGCLKOUT_2"), 255e278dcb7SAndy Shevchenko PINCTRL_PIN(197, "SATA_LEDB"), 256e278dcb7SAndy Shevchenko PINCTRL_PIN(198, "IMGCLKOUT_3"), 257e278dcb7SAndy Shevchenko PINCTRL_PIN(199, "ISH_GP_3"), 258e278dcb7SAndy Shevchenko PINCTRL_PIN(200, "ISH_GP_4"), 259e278dcb7SAndy Shevchenko PINCTRL_PIN(201, "ISH_GP_5"), 260e278dcb7SAndy Shevchenko PINCTRL_PIN(202, "ISH_GP_6"), 261e278dcb7SAndy Shevchenko PINCTRL_PIN(203, "ISH_GP_7"), 262e278dcb7SAndy Shevchenko PINCTRL_PIN(204, "IMGCLKOUT_4"), 263e278dcb7SAndy Shevchenko PINCTRL_PIN(205, "DDPA_CTRLCLK"), 264e278dcb7SAndy Shevchenko PINCTRL_PIN(206, "DDPA_CTRLDATA"), 265e278dcb7SAndy Shevchenko PINCTRL_PIN(207, "DDPB_CTRLCLK"), 266e278dcb7SAndy Shevchenko PINCTRL_PIN(208, "DDPB_CTRLDATA"), 267e278dcb7SAndy Shevchenko PINCTRL_PIN(209, "DDPC_CTRLCLK"), 268e278dcb7SAndy Shevchenko PINCTRL_PIN(210, "DDPC_CTRLDATA"), 269e278dcb7SAndy Shevchenko PINCTRL_PIN(211, "IMGCLKOUT_5"), 270e278dcb7SAndy Shevchenko PINCTRL_PIN(212, "CNV_BRI_DT"), 271e278dcb7SAndy Shevchenko PINCTRL_PIN(213, "CNV_BRI_RSP"), 272e278dcb7SAndy Shevchenko PINCTRL_PIN(214, "CNV_RGI_DT"), 273e278dcb7SAndy Shevchenko PINCTRL_PIN(215, "CNV_RGI_RSP"), 274e278dcb7SAndy Shevchenko /* GPP_G */ 275e278dcb7SAndy Shevchenko PINCTRL_PIN(216, "SD3_CMD"), 276e278dcb7SAndy Shevchenko PINCTRL_PIN(217, "SD3_D0"), 277e278dcb7SAndy Shevchenko PINCTRL_PIN(218, "SD3_D1"), 278e278dcb7SAndy Shevchenko PINCTRL_PIN(219, "SD3_D2"), 279e278dcb7SAndy Shevchenko PINCTRL_PIN(220, "SD3_D3"), 280e278dcb7SAndy Shevchenko PINCTRL_PIN(221, "SD3_CDB"), 281e278dcb7SAndy Shevchenko PINCTRL_PIN(222, "SD3_CLK"), 282e278dcb7SAndy Shevchenko PINCTRL_PIN(223, "SD3_WP"), 283e278dcb7SAndy Shevchenko }; 284e278dcb7SAndy Shevchenko 285e278dcb7SAndy Shevchenko static const struct intel_padgroup jsl_community0_gpps[] = { 286e278dcb7SAndy Shevchenko JSL_GPP(0, 0, 19, 320), /* GPP_F */ 287e278dcb7SAndy Shevchenko JSL_GPP(1, 20, 45, 32), /* GPP_B */ 288e278dcb7SAndy Shevchenko JSL_GPP(2, 46, 66, 64), /* GPP_A */ 289e278dcb7SAndy Shevchenko JSL_GPP(3, 67, 74, 96), /* GPP_S */ 290e278dcb7SAndy Shevchenko JSL_GPP(4, 75, 82, 128), /* GPP_R */ 291e278dcb7SAndy Shevchenko }; 292e278dcb7SAndy Shevchenko 293e278dcb7SAndy Shevchenko static const struct intel_padgroup jsl_community1_gpps[] = { 294e278dcb7SAndy Shevchenko JSL_GPP(0, 83, 106, 160), /* GPP_H */ 295e278dcb7SAndy Shevchenko JSL_GPP(1, 107, 132, 192), /* GPP_D */ 296e278dcb7SAndy Shevchenko JSL_GPP(2, 133, 161, 224), /* vGPIO */ 297e278dcb7SAndy Shevchenko JSL_GPP(3, 162, 185, 256), /* GPP_C */ 298e278dcb7SAndy Shevchenko }; 299e278dcb7SAndy Shevchenko 300e278dcb7SAndy Shevchenko static const struct intel_padgroup jsl_community4_gpps[] = { 301e278dcb7SAndy Shevchenko JSL_GPP(0, 186, 191, INTEL_GPIO_BASE_NOMAP), /* HVCMOS */ 302e278dcb7SAndy Shevchenko JSL_GPP(1, 192, 215, 288), /* GPP_E */ 303e278dcb7SAndy Shevchenko }; 304e278dcb7SAndy Shevchenko 305e278dcb7SAndy Shevchenko static const struct intel_padgroup jsl_community5_gpps[] = { 306e278dcb7SAndy Shevchenko JSL_GPP(0, 216, 223, INTEL_GPIO_BASE_ZERO), /* GPP_G */ 307e278dcb7SAndy Shevchenko }; 308e278dcb7SAndy Shevchenko 309e278dcb7SAndy Shevchenko static const struct intel_community jsl_communities[] = { 310e278dcb7SAndy Shevchenko JSL_COMMUNITY(0, 0, 82, jsl_community0_gpps), 311e278dcb7SAndy Shevchenko JSL_COMMUNITY(1, 83, 185, jsl_community1_gpps), 312e278dcb7SAndy Shevchenko JSL_COMMUNITY(2, 186, 215, jsl_community4_gpps), 313e278dcb7SAndy Shevchenko JSL_COMMUNITY(3, 216, 223, jsl_community5_gpps), 314e278dcb7SAndy Shevchenko }; 315e278dcb7SAndy Shevchenko 316e278dcb7SAndy Shevchenko static const struct intel_pinctrl_soc_data jsl_soc_data = { 317e278dcb7SAndy Shevchenko .pins = jsl_pins, 318e278dcb7SAndy Shevchenko .npins = ARRAY_SIZE(jsl_pins), 319e278dcb7SAndy Shevchenko .communities = jsl_communities, 320e278dcb7SAndy Shevchenko .ncommunities = ARRAY_SIZE(jsl_communities), 321e278dcb7SAndy Shevchenko }; 322e278dcb7SAndy Shevchenko 323e278dcb7SAndy Shevchenko static const struct acpi_device_id jsl_pinctrl_acpi_match[] = { 324e278dcb7SAndy Shevchenko { "INT34C8", (kernel_ulong_t)&jsl_soc_data }, 325e278dcb7SAndy Shevchenko { } 326e278dcb7SAndy Shevchenko }; 327e278dcb7SAndy Shevchenko MODULE_DEVICE_TABLE(acpi, jsl_pinctrl_acpi_match); 328e278dcb7SAndy Shevchenko 329e278dcb7SAndy Shevchenko static INTEL_PINCTRL_PM_OPS(jsl_pinctrl_pm_ops); 330e278dcb7SAndy Shevchenko 331e278dcb7SAndy Shevchenko static struct platform_driver jsl_pinctrl_driver = { 332e278dcb7SAndy Shevchenko .probe = intel_pinctrl_probe_by_hid, 333e278dcb7SAndy Shevchenko .driver = { 334e278dcb7SAndy Shevchenko .name = "jasperlake-pinctrl", 335e278dcb7SAndy Shevchenko .acpi_match_table = jsl_pinctrl_acpi_match, 336e278dcb7SAndy Shevchenko .pm = &jsl_pinctrl_pm_ops, 337e278dcb7SAndy Shevchenko }, 338e278dcb7SAndy Shevchenko }; 339e278dcb7SAndy Shevchenko 340e278dcb7SAndy Shevchenko module_platform_driver(jsl_pinctrl_driver); 341e278dcb7SAndy Shevchenko 342e278dcb7SAndy Shevchenko MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>"); 343e278dcb7SAndy Shevchenko MODULE_DESCRIPTION("Intel Jasper Lake PCH pinctrl/GPIO driver"); 344e278dcb7SAndy Shevchenko MODULE_LICENSE("GPL v2"); 345