1e278dcb7SAndy Shevchenko // SPDX-License-Identifier: GPL-2.0 2e278dcb7SAndy Shevchenko /* 3e278dcb7SAndy Shevchenko * Intel Jasper Lake PCH pinctrl/GPIO driver 4e278dcb7SAndy Shevchenko * 5e278dcb7SAndy Shevchenko * Copyright (C) 2020, Intel Corporation 6e278dcb7SAndy Shevchenko * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 7e278dcb7SAndy Shevchenko */ 8e278dcb7SAndy Shevchenko 9e278dcb7SAndy Shevchenko #include <linux/mod_devicetable.h> 10e278dcb7SAndy Shevchenko #include <linux/module.h> 11e278dcb7SAndy Shevchenko #include <linux/platform_device.h> 12e278dcb7SAndy Shevchenko 13e278dcb7SAndy Shevchenko #include <linux/pinctrl/pinctrl.h> 14e278dcb7SAndy Shevchenko 15e278dcb7SAndy Shevchenko #include "pinctrl-intel.h" 16e278dcb7SAndy Shevchenko 17e278dcb7SAndy Shevchenko #define JSL_PAD_OWN 0x020 18e278dcb7SAndy Shevchenko #define JSL_PADCFGLOCK 0x080 19cdd8fc2dSEvan Green #define JSL_HOSTSW_OWN 0x0c0 20e278dcb7SAndy Shevchenko #define JSL_GPI_IS 0x100 21e278dcb7SAndy Shevchenko #define JSL_GPI_IE 0x120 22e278dcb7SAndy Shevchenko 23e278dcb7SAndy Shevchenko #define JSL_GPP(r, s, e, g) \ 24e278dcb7SAndy Shevchenko { \ 25e278dcb7SAndy Shevchenko .reg_num = (r), \ 26e278dcb7SAndy Shevchenko .base = (s), \ 27e278dcb7SAndy Shevchenko .size = ((e) - (s) + 1), \ 28e278dcb7SAndy Shevchenko .gpio_base = (g), \ 29e278dcb7SAndy Shevchenko } 30e278dcb7SAndy Shevchenko 31e278dcb7SAndy Shevchenko #define JSL_COMMUNITY(b, s, e, g) \ 326ab57fb3SAndy Shevchenko INTEL_COMMUNITY_GPPS(b, s, e, g, JSL) 33e278dcb7SAndy Shevchenko 34e278dcb7SAndy Shevchenko /* Jasper Lake */ 35e278dcb7SAndy Shevchenko static const struct pinctrl_pin_desc jsl_pins[] = { 36e278dcb7SAndy Shevchenko /* GPP_F */ 37e278dcb7SAndy Shevchenko PINCTRL_PIN(0, "CNV_BRI_DT_UART0_RTSB"), 38e278dcb7SAndy Shevchenko PINCTRL_PIN(1, "CNV_BRI_RSP_UART0_RXD"), 39e278dcb7SAndy Shevchenko PINCTRL_PIN(2, "EMMC_HIP_MON"), 40e278dcb7SAndy Shevchenko PINCTRL_PIN(3, "CNV_RGI_RSP_UART0_CTSB"), 41e278dcb7SAndy Shevchenko PINCTRL_PIN(4, "CNV_RF_RESET_B"), 42e278dcb7SAndy Shevchenko PINCTRL_PIN(5, "MODEM_CLKREQ"), 43e278dcb7SAndy Shevchenko PINCTRL_PIN(6, "CNV_PA_BLANKING"), 44e278dcb7SAndy Shevchenko PINCTRL_PIN(7, "EMMC_CMD"), 45e278dcb7SAndy Shevchenko PINCTRL_PIN(8, "EMMC_DATA0"), 46e278dcb7SAndy Shevchenko PINCTRL_PIN(9, "EMMC_DATA1"), 47e278dcb7SAndy Shevchenko PINCTRL_PIN(10, "EMMC_DATA2"), 48e278dcb7SAndy Shevchenko PINCTRL_PIN(11, "EMMC_DATA3"), 49e278dcb7SAndy Shevchenko PINCTRL_PIN(12, "EMMC_DATA4"), 50e278dcb7SAndy Shevchenko PINCTRL_PIN(13, "EMMC_DATA5"), 51e278dcb7SAndy Shevchenko PINCTRL_PIN(14, "EMMC_DATA6"), 52e278dcb7SAndy Shevchenko PINCTRL_PIN(15, "EMMC_DATA7"), 53e278dcb7SAndy Shevchenko PINCTRL_PIN(16, "EMMC_RCLK"), 54e278dcb7SAndy Shevchenko PINCTRL_PIN(17, "EMMC_CLK"), 55e278dcb7SAndy Shevchenko PINCTRL_PIN(18, "EMMC_RESETB"), 56e278dcb7SAndy Shevchenko PINCTRL_PIN(19, "A4WP_PRESENT"), 5759024c93SAndy Shevchenko /* SPI */ 5859024c93SAndy Shevchenko PINCTRL_PIN(20, "SPI0_IO_2"), 5959024c93SAndy Shevchenko PINCTRL_PIN(21, "SPI0_IO_3"), 6059024c93SAndy Shevchenko PINCTRL_PIN(22, "SPI0_MOSI_IO_0"), 6159024c93SAndy Shevchenko PINCTRL_PIN(23, "SPI0_MISO_IO_1"), 6259024c93SAndy Shevchenko PINCTRL_PIN(24, "SPI0_TPM_CSB"), 6359024c93SAndy Shevchenko PINCTRL_PIN(25, "SPI0_FLASH_0_CSB"), 6459024c93SAndy Shevchenko PINCTRL_PIN(26, "SPI0_FLASH_1_CSB"), 6559024c93SAndy Shevchenko PINCTRL_PIN(27, "SPI0_CLK"), 6659024c93SAndy Shevchenko PINCTRL_PIN(28, "SPI0_CLK_LOOPBK"), 67e278dcb7SAndy Shevchenko /* GPP_B */ 6859024c93SAndy Shevchenko PINCTRL_PIN(29, "CORE_VID_0"), 6959024c93SAndy Shevchenko PINCTRL_PIN(30, "CORE_VID_1"), 7059024c93SAndy Shevchenko PINCTRL_PIN(31, "VRALERTB"), 7159024c93SAndy Shevchenko PINCTRL_PIN(32, "CPU_GP_2"), 7259024c93SAndy Shevchenko PINCTRL_PIN(33, "CPU_GP_3"), 7359024c93SAndy Shevchenko PINCTRL_PIN(34, "SRCCLKREQB_0"), 7459024c93SAndy Shevchenko PINCTRL_PIN(35, "SRCCLKREQB_1"), 7559024c93SAndy Shevchenko PINCTRL_PIN(36, "SRCCLKREQB_2"), 7659024c93SAndy Shevchenko PINCTRL_PIN(37, "SRCCLKREQB_3"), 7759024c93SAndy Shevchenko PINCTRL_PIN(38, "SRCCLKREQB_4"), 7859024c93SAndy Shevchenko PINCTRL_PIN(39, "SRCCLKREQB_5"), 7959024c93SAndy Shevchenko PINCTRL_PIN(40, "PMCALERTB"), 8059024c93SAndy Shevchenko PINCTRL_PIN(41, "SLP_S0B"), 8159024c93SAndy Shevchenko PINCTRL_PIN(42, "PLTRSTB"), 8259024c93SAndy Shevchenko PINCTRL_PIN(43, "SPKR"), 8359024c93SAndy Shevchenko PINCTRL_PIN(44, "GSPI0_CS0B"), 8459024c93SAndy Shevchenko PINCTRL_PIN(45, "GSPI0_CLK"), 8559024c93SAndy Shevchenko PINCTRL_PIN(46, "GSPI0_MISO"), 8659024c93SAndy Shevchenko PINCTRL_PIN(47, "GSPI0_MOSI"), 8759024c93SAndy Shevchenko PINCTRL_PIN(48, "GSPI1_CS0B"), 8859024c93SAndy Shevchenko PINCTRL_PIN(49, "GSPI1_CLK"), 8959024c93SAndy Shevchenko PINCTRL_PIN(50, "GSPI1_MISO"), 9059024c93SAndy Shevchenko PINCTRL_PIN(51, "GSPI1_MOSI"), 9159024c93SAndy Shevchenko PINCTRL_PIN(52, "DDSP_HPD_A"), 9259024c93SAndy Shevchenko PINCTRL_PIN(53, "GSPI0_CLK_LOOPBK"), 9359024c93SAndy Shevchenko PINCTRL_PIN(54, "GSPI1_CLK_LOOPBK"), 94e278dcb7SAndy Shevchenko /* GPP_A */ 9559024c93SAndy Shevchenko PINCTRL_PIN(55, "ESPI_IO_0"), 9659024c93SAndy Shevchenko PINCTRL_PIN(56, "ESPI_IO_1"), 9759024c93SAndy Shevchenko PINCTRL_PIN(57, "ESPI_IO_2"), 9859024c93SAndy Shevchenko PINCTRL_PIN(58, "ESPI_IO_3"), 9959024c93SAndy Shevchenko PINCTRL_PIN(59, "ESPI_CSB"), 10059024c93SAndy Shevchenko PINCTRL_PIN(60, "ESPI_CLK"), 10159024c93SAndy Shevchenko PINCTRL_PIN(61, "ESPI_RESETB"), 10259024c93SAndy Shevchenko PINCTRL_PIN(62, "SMBCLK"), 10359024c93SAndy Shevchenko PINCTRL_PIN(63, "SMBDATA"), 10459024c93SAndy Shevchenko PINCTRL_PIN(64, "SMBALERTB"), 10559024c93SAndy Shevchenko PINCTRL_PIN(65, "CPU_GP_0"), 10659024c93SAndy Shevchenko PINCTRL_PIN(66, "CPU_GP_1"), 10759024c93SAndy Shevchenko PINCTRL_PIN(67, "USB2_OCB_1"), 10859024c93SAndy Shevchenko PINCTRL_PIN(68, "USB2_OCB_2"), 10959024c93SAndy Shevchenko PINCTRL_PIN(69, "USB2_OCB_3"), 11059024c93SAndy Shevchenko PINCTRL_PIN(70, "DDSP_HPD_A_TIME_SYNC_0"), 11159024c93SAndy Shevchenko PINCTRL_PIN(71, "DDSP_HPD_B"), 11259024c93SAndy Shevchenko PINCTRL_PIN(72, "DDSP_HPD_C"), 11359024c93SAndy Shevchenko PINCTRL_PIN(73, "USB2_OCB_0"), 11459024c93SAndy Shevchenko PINCTRL_PIN(74, "PCHHOTB"), 11559024c93SAndy Shevchenko PINCTRL_PIN(75, "ESPI_CLK_LOOPBK"), 116e278dcb7SAndy Shevchenko /* GPP_S */ 11759024c93SAndy Shevchenko PINCTRL_PIN(76, "SNDW1_CLK"), 11859024c93SAndy Shevchenko PINCTRL_PIN(77, "SNDW1_DATA"), 11959024c93SAndy Shevchenko PINCTRL_PIN(78, "SNDW2_CLK"), 12059024c93SAndy Shevchenko PINCTRL_PIN(79, "SNDW2_DATA"), 12159024c93SAndy Shevchenko PINCTRL_PIN(80, "SNDW1_CLK"), 12259024c93SAndy Shevchenko PINCTRL_PIN(81, "SNDW1_DATA"), 12359024c93SAndy Shevchenko PINCTRL_PIN(82, "SNDW4_CLK_DMIC_CLK_0"), 12459024c93SAndy Shevchenko PINCTRL_PIN(83, "SNDW4_DATA_DMIC_DATA_0"), 125e278dcb7SAndy Shevchenko /* GPP_R */ 12659024c93SAndy Shevchenko PINCTRL_PIN(84, "HDA_BCLK"), 12759024c93SAndy Shevchenko PINCTRL_PIN(85, "HDA_SYNC"), 12859024c93SAndy Shevchenko PINCTRL_PIN(86, "HDA_SDO"), 12959024c93SAndy Shevchenko PINCTRL_PIN(87, "HDA_SDI_0"), 13059024c93SAndy Shevchenko PINCTRL_PIN(88, "HDA_RSTB"), 13159024c93SAndy Shevchenko PINCTRL_PIN(89, "HDA_SDI_1"), 13259024c93SAndy Shevchenko PINCTRL_PIN(90, "I2S1_SFRM"), 13359024c93SAndy Shevchenko PINCTRL_PIN(91, "I2S1_TXD"), 134e278dcb7SAndy Shevchenko /* GPP_H */ 13559024c93SAndy Shevchenko PINCTRL_PIN(92, "GPPC_H_0"), 13659024c93SAndy Shevchenko PINCTRL_PIN(93, "SD_PWR_EN_B"), 13759024c93SAndy Shevchenko PINCTRL_PIN(94, "MODEM_CLKREQ"), 13859024c93SAndy Shevchenko PINCTRL_PIN(95, "SX_EXIT_HOLDOFFB"), 13959024c93SAndy Shevchenko PINCTRL_PIN(96, "I2C2_SDA"), 14059024c93SAndy Shevchenko PINCTRL_PIN(97, "I2C2_SCL"), 14159024c93SAndy Shevchenko PINCTRL_PIN(98, "I2C3_SDA"), 14259024c93SAndy Shevchenko PINCTRL_PIN(99, "I2C3_SCL"), 14359024c93SAndy Shevchenko PINCTRL_PIN(100, "I2C4_SDA"), 14459024c93SAndy Shevchenko PINCTRL_PIN(101, "I2C4_SCL"), 14559024c93SAndy Shevchenko PINCTRL_PIN(102, "CPU_VCCIO_PWR_GATEB"), 14659024c93SAndy Shevchenko PINCTRL_PIN(103, "I2S2_SCLK"), 14759024c93SAndy Shevchenko PINCTRL_PIN(104, "I2S2_SFRM"), 14859024c93SAndy Shevchenko PINCTRL_PIN(105, "I2S2_TXD"), 14959024c93SAndy Shevchenko PINCTRL_PIN(106, "I2S2_RXD"), 15059024c93SAndy Shevchenko PINCTRL_PIN(107, "I2S1_SCLK"), 15159024c93SAndy Shevchenko PINCTRL_PIN(108, "GPPC_H_16"), 15259024c93SAndy Shevchenko PINCTRL_PIN(109, "GPPC_H_17"), 15359024c93SAndy Shevchenko PINCTRL_PIN(110, "GPPC_H_18"), 15459024c93SAndy Shevchenko PINCTRL_PIN(111, "GPPC_H_19"), 15559024c93SAndy Shevchenko PINCTRL_PIN(112, "GPPC_H_20"), 15659024c93SAndy Shevchenko PINCTRL_PIN(113, "GPPC_H_21"), 15759024c93SAndy Shevchenko PINCTRL_PIN(114, "GPPC_H_22"), 15859024c93SAndy Shevchenko PINCTRL_PIN(115, "GPPC_H_23"), 159e278dcb7SAndy Shevchenko /* GPP_D */ 16059024c93SAndy Shevchenko PINCTRL_PIN(116, "SPI1_CSB"), 16159024c93SAndy Shevchenko PINCTRL_PIN(117, "SPI1_CLK"), 16259024c93SAndy Shevchenko PINCTRL_PIN(118, "SPI1_MISO_IO_1"), 16359024c93SAndy Shevchenko PINCTRL_PIN(119, "SPI1_MOSI_IO_0"), 16459024c93SAndy Shevchenko PINCTRL_PIN(120, "ISH_I2C0_SDA"), 16559024c93SAndy Shevchenko PINCTRL_PIN(121, "ISH_I2C0_SCL"), 16659024c93SAndy Shevchenko PINCTRL_PIN(122, "ISH_I2C1_SDA"), 16759024c93SAndy Shevchenko PINCTRL_PIN(123, "ISH_I2C1_SCL"), 16859024c93SAndy Shevchenko PINCTRL_PIN(124, "ISH_SPI_CSB"), 16959024c93SAndy Shevchenko PINCTRL_PIN(125, "ISH_SPI_CLK"), 17059024c93SAndy Shevchenko PINCTRL_PIN(126, "ISH_SPI_MISO"), 17159024c93SAndy Shevchenko PINCTRL_PIN(127, "ISH_SPI_MOSI"), 17259024c93SAndy Shevchenko PINCTRL_PIN(128, "ISH_UART0_RXD"), 17359024c93SAndy Shevchenko PINCTRL_PIN(129, "ISH_UART0_TXD"), 17459024c93SAndy Shevchenko PINCTRL_PIN(130, "ISH_UART0_RTSB"), 17559024c93SAndy Shevchenko PINCTRL_PIN(131, "ISH_UART0_CTSB"), 17659024c93SAndy Shevchenko PINCTRL_PIN(132, "SPI1_IO_2"), 17759024c93SAndy Shevchenko PINCTRL_PIN(133, "SPI1_IO_3"), 17859024c93SAndy Shevchenko PINCTRL_PIN(134, "I2S_MCLK"), 17959024c93SAndy Shevchenko PINCTRL_PIN(135, "CNV_MFUART2_RXD"), 18059024c93SAndy Shevchenko PINCTRL_PIN(136, "CNV_MFUART2_TXD"), 18159024c93SAndy Shevchenko PINCTRL_PIN(137, "CNV_PA_BLANKING"), 18259024c93SAndy Shevchenko PINCTRL_PIN(138, "I2C5_SDA"), 18359024c93SAndy Shevchenko PINCTRL_PIN(139, "I2C5_SCL"), 18459024c93SAndy Shevchenko PINCTRL_PIN(140, "GSPI2_CLK_LOOPBK"), 18559024c93SAndy Shevchenko PINCTRL_PIN(141, "SPI1_CLK_LOOPBK"), 186e278dcb7SAndy Shevchenko /* vGPIO */ 18759024c93SAndy Shevchenko PINCTRL_PIN(142, "CNV_BTEN"), 18859024c93SAndy Shevchenko PINCTRL_PIN(143, "CNV_WCEN"), 18959024c93SAndy Shevchenko PINCTRL_PIN(144, "CNV_BT_HOST_WAKEB"), 19059024c93SAndy Shevchenko PINCTRL_PIN(145, "CNV_BT_IF_SELECT"), 19159024c93SAndy Shevchenko PINCTRL_PIN(146, "vCNV_BT_UART_TXD"), 19259024c93SAndy Shevchenko PINCTRL_PIN(147, "vCNV_BT_UART_RXD"), 19359024c93SAndy Shevchenko PINCTRL_PIN(148, "vCNV_BT_UART_CTS_B"), 19459024c93SAndy Shevchenko PINCTRL_PIN(149, "vCNV_BT_UART_RTS_B"), 19559024c93SAndy Shevchenko PINCTRL_PIN(150, "vCNV_MFUART1_TXD"), 19659024c93SAndy Shevchenko PINCTRL_PIN(151, "vCNV_MFUART1_RXD"), 19759024c93SAndy Shevchenko PINCTRL_PIN(152, "vCNV_MFUART1_CTS_B"), 19859024c93SAndy Shevchenko PINCTRL_PIN(153, "vCNV_MFUART1_RTS_B"), 19959024c93SAndy Shevchenko PINCTRL_PIN(154, "vUART0_TXD"), 20059024c93SAndy Shevchenko PINCTRL_PIN(155, "vUART0_RXD"), 20159024c93SAndy Shevchenko PINCTRL_PIN(156, "vUART0_CTS_B"), 20259024c93SAndy Shevchenko PINCTRL_PIN(157, "vUART0_RTS_B"), 20359024c93SAndy Shevchenko PINCTRL_PIN(158, "vISH_UART0_TXD"), 20459024c93SAndy Shevchenko PINCTRL_PIN(159, "vISH_UART0_RXD"), 20559024c93SAndy Shevchenko PINCTRL_PIN(160, "vISH_UART0_CTS_B"), 20659024c93SAndy Shevchenko PINCTRL_PIN(161, "vISH_UART0_RTS_B"), 20759024c93SAndy Shevchenko PINCTRL_PIN(162, "vCNV_BT_I2S_BCLK"), 20859024c93SAndy Shevchenko PINCTRL_PIN(163, "vCNV_BT_I2S_WS_SYNC"), 20959024c93SAndy Shevchenko PINCTRL_PIN(164, "vCNV_BT_I2S_SDO"), 21059024c93SAndy Shevchenko PINCTRL_PIN(165, "vCNV_BT_I2S_SDI"), 21159024c93SAndy Shevchenko PINCTRL_PIN(166, "vI2S2_SCLK"), 21259024c93SAndy Shevchenko PINCTRL_PIN(167, "vI2S2_SFRM"), 21359024c93SAndy Shevchenko PINCTRL_PIN(168, "vI2S2_TXD"), 21459024c93SAndy Shevchenko PINCTRL_PIN(169, "vI2S2_RXD"), 21559024c93SAndy Shevchenko PINCTRL_PIN(170, "vSD3_CD_B"), 216e278dcb7SAndy Shevchenko /* GPP_C */ 21759024c93SAndy Shevchenko PINCTRL_PIN(171, "GPPC_C_0"), 21859024c93SAndy Shevchenko PINCTRL_PIN(172, "GPPC_C_1"), 21959024c93SAndy Shevchenko PINCTRL_PIN(173, "GPPC_C_2"), 22059024c93SAndy Shevchenko PINCTRL_PIN(174, "GPPC_C_3"), 22159024c93SAndy Shevchenko PINCTRL_PIN(175, "GPPC_C_4"), 22259024c93SAndy Shevchenko PINCTRL_PIN(176, "GPPC_C_5"), 22359024c93SAndy Shevchenko PINCTRL_PIN(177, "SUSWARNB_SUSPWRDNACK"), 22459024c93SAndy Shevchenko PINCTRL_PIN(178, "SUSACKB"), 22559024c93SAndy Shevchenko PINCTRL_PIN(179, "UART0_RXD"), 22659024c93SAndy Shevchenko PINCTRL_PIN(180, "UART0_TXD"), 22759024c93SAndy Shevchenko PINCTRL_PIN(181, "UART0_RTSB"), 22859024c93SAndy Shevchenko PINCTRL_PIN(182, "UART0_CTSB"), 22959024c93SAndy Shevchenko PINCTRL_PIN(183, "UART1_RXD"), 23059024c93SAndy Shevchenko PINCTRL_PIN(184, "UART1_TXD"), 23159024c93SAndy Shevchenko PINCTRL_PIN(185, "UART1_RTSB"), 23259024c93SAndy Shevchenko PINCTRL_PIN(186, "UART1_CTSB"), 23359024c93SAndy Shevchenko PINCTRL_PIN(187, "I2C0_SDA"), 23459024c93SAndy Shevchenko PINCTRL_PIN(188, "I2C0_SCL"), 23559024c93SAndy Shevchenko PINCTRL_PIN(189, "I2C1_SDA"), 23659024c93SAndy Shevchenko PINCTRL_PIN(190, "I2C1_SCL"), 23759024c93SAndy Shevchenko PINCTRL_PIN(191, "UART2_RXD"), 23859024c93SAndy Shevchenko PINCTRL_PIN(192, "UART2_TXD"), 23959024c93SAndy Shevchenko PINCTRL_PIN(193, "UART2_RTSB"), 24059024c93SAndy Shevchenko PINCTRL_PIN(194, "UART2_CTSB"), 241e278dcb7SAndy Shevchenko /* HVCMOS */ 24259024c93SAndy Shevchenko PINCTRL_PIN(195, "L_BKLTEN"), 24359024c93SAndy Shevchenko PINCTRL_PIN(196, "L_BKLTCTL"), 24459024c93SAndy Shevchenko PINCTRL_PIN(197, "L_VDDEN"), 24559024c93SAndy Shevchenko PINCTRL_PIN(198, "SYS_PWROK"), 24659024c93SAndy Shevchenko PINCTRL_PIN(199, "SYS_RESETB"), 24759024c93SAndy Shevchenko PINCTRL_PIN(200, "MLK_RSTB"), 248e278dcb7SAndy Shevchenko /* GPP_E */ 24959024c93SAndy Shevchenko PINCTRL_PIN(201, "ISH_GP_0"), 25059024c93SAndy Shevchenko PINCTRL_PIN(202, "ISH_GP_1"), 25159024c93SAndy Shevchenko PINCTRL_PIN(203, "IMGCLKOUT_1"), 25259024c93SAndy Shevchenko PINCTRL_PIN(204, "ISH_GP_2"), 25359024c93SAndy Shevchenko PINCTRL_PIN(205, "IMGCLKOUT_2"), 25459024c93SAndy Shevchenko PINCTRL_PIN(206, "SATA_LEDB"), 25559024c93SAndy Shevchenko PINCTRL_PIN(207, "IMGCLKOUT_3"), 25659024c93SAndy Shevchenko PINCTRL_PIN(208, "ISH_GP_3"), 25759024c93SAndy Shevchenko PINCTRL_PIN(209, "ISH_GP_4"), 25859024c93SAndy Shevchenko PINCTRL_PIN(210, "ISH_GP_5"), 25959024c93SAndy Shevchenko PINCTRL_PIN(211, "ISH_GP_6"), 26059024c93SAndy Shevchenko PINCTRL_PIN(212, "ISH_GP_7"), 26159024c93SAndy Shevchenko PINCTRL_PIN(213, "IMGCLKOUT_4"), 26259024c93SAndy Shevchenko PINCTRL_PIN(214, "DDPA_CTRLCLK"), 26359024c93SAndy Shevchenko PINCTRL_PIN(215, "DDPA_CTRLDATA"), 26459024c93SAndy Shevchenko PINCTRL_PIN(216, "DDPB_CTRLCLK"), 26559024c93SAndy Shevchenko PINCTRL_PIN(217, "DDPB_CTRLDATA"), 26659024c93SAndy Shevchenko PINCTRL_PIN(218, "DDPC_CTRLCLK"), 26759024c93SAndy Shevchenko PINCTRL_PIN(219, "DDPC_CTRLDATA"), 26859024c93SAndy Shevchenko PINCTRL_PIN(220, "IMGCLKOUT_5"), 26959024c93SAndy Shevchenko PINCTRL_PIN(221, "CNV_BRI_DT"), 27059024c93SAndy Shevchenko PINCTRL_PIN(222, "CNV_BRI_RSP"), 27159024c93SAndy Shevchenko PINCTRL_PIN(223, "CNV_RGI_DT"), 27259024c93SAndy Shevchenko PINCTRL_PIN(224, "CNV_RGI_RSP"), 273e278dcb7SAndy Shevchenko /* GPP_G */ 27459024c93SAndy Shevchenko PINCTRL_PIN(225, "SD3_CMD"), 27559024c93SAndy Shevchenko PINCTRL_PIN(226, "SD3_D0"), 27659024c93SAndy Shevchenko PINCTRL_PIN(227, "SD3_D1"), 27759024c93SAndy Shevchenko PINCTRL_PIN(228, "SD3_D2"), 27859024c93SAndy Shevchenko PINCTRL_PIN(229, "SD3_D3"), 27959024c93SAndy Shevchenko PINCTRL_PIN(230, "SD3_CDB"), 28059024c93SAndy Shevchenko PINCTRL_PIN(231, "SD3_CLK"), 28159024c93SAndy Shevchenko PINCTRL_PIN(232, "SD3_WP"), 282e278dcb7SAndy Shevchenko }; 283e278dcb7SAndy Shevchenko 284e278dcb7SAndy Shevchenko static const struct intel_padgroup jsl_community0_gpps[] = { 285e278dcb7SAndy Shevchenko JSL_GPP(0, 0, 19, 320), /* GPP_F */ 28659024c93SAndy Shevchenko JSL_GPP(1, 20, 28, INTEL_GPIO_BASE_NOMAP), /* SPI */ 28759024c93SAndy Shevchenko JSL_GPP(2, 29, 54, 32), /* GPP_B */ 28859024c93SAndy Shevchenko JSL_GPP(3, 55, 75, 64), /* GPP_A */ 28959024c93SAndy Shevchenko JSL_GPP(4, 76, 83, 96), /* GPP_S */ 29059024c93SAndy Shevchenko JSL_GPP(5, 84, 91, 128), /* GPP_R */ 291e278dcb7SAndy Shevchenko }; 292e278dcb7SAndy Shevchenko 293e278dcb7SAndy Shevchenko static const struct intel_padgroup jsl_community1_gpps[] = { 29459024c93SAndy Shevchenko JSL_GPP(0, 92, 115, 160), /* GPP_H */ 29559024c93SAndy Shevchenko JSL_GPP(1, 116, 141, 192), /* GPP_D */ 29659024c93SAndy Shevchenko JSL_GPP(2, 142, 170, 224), /* vGPIO */ 29759024c93SAndy Shevchenko JSL_GPP(3, 171, 194, 256), /* GPP_C */ 298e278dcb7SAndy Shevchenko }; 299e278dcb7SAndy Shevchenko 300e278dcb7SAndy Shevchenko static const struct intel_padgroup jsl_community4_gpps[] = { 30159024c93SAndy Shevchenko JSL_GPP(0, 195, 200, INTEL_GPIO_BASE_NOMAP), /* HVCMOS */ 30259024c93SAndy Shevchenko JSL_GPP(1, 201, 224, 288), /* GPP_E */ 303e278dcb7SAndy Shevchenko }; 304e278dcb7SAndy Shevchenko 305e278dcb7SAndy Shevchenko static const struct intel_padgroup jsl_community5_gpps[] = { 30659024c93SAndy Shevchenko JSL_GPP(0, 225, 232, INTEL_GPIO_BASE_ZERO), /* GPP_G */ 307e278dcb7SAndy Shevchenko }; 308e278dcb7SAndy Shevchenko 309e278dcb7SAndy Shevchenko static const struct intel_community jsl_communities[] = { 31059024c93SAndy Shevchenko JSL_COMMUNITY(0, 0, 91, jsl_community0_gpps), 31159024c93SAndy Shevchenko JSL_COMMUNITY(1, 92, 194, jsl_community1_gpps), 31259024c93SAndy Shevchenko JSL_COMMUNITY(2, 195, 224, jsl_community4_gpps), 31359024c93SAndy Shevchenko JSL_COMMUNITY(3, 225, 232, jsl_community5_gpps), 314e278dcb7SAndy Shevchenko }; 315e278dcb7SAndy Shevchenko 316e278dcb7SAndy Shevchenko static const struct intel_pinctrl_soc_data jsl_soc_data = { 317e278dcb7SAndy Shevchenko .pins = jsl_pins, 318e278dcb7SAndy Shevchenko .npins = ARRAY_SIZE(jsl_pins), 319e278dcb7SAndy Shevchenko .communities = jsl_communities, 320e278dcb7SAndy Shevchenko .ncommunities = ARRAY_SIZE(jsl_communities), 321e278dcb7SAndy Shevchenko }; 322e278dcb7SAndy Shevchenko 323e278dcb7SAndy Shevchenko static const struct acpi_device_id jsl_pinctrl_acpi_match[] = { 324e278dcb7SAndy Shevchenko { "INT34C8", (kernel_ulong_t)&jsl_soc_data }, 325e278dcb7SAndy Shevchenko { } 326e278dcb7SAndy Shevchenko }; 327e278dcb7SAndy Shevchenko MODULE_DEVICE_TABLE(acpi, jsl_pinctrl_acpi_match); 328e278dcb7SAndy Shevchenko 329e278dcb7SAndy Shevchenko static INTEL_PINCTRL_PM_OPS(jsl_pinctrl_pm_ops); 330e278dcb7SAndy Shevchenko 331e278dcb7SAndy Shevchenko static struct platform_driver jsl_pinctrl_driver = { 332e278dcb7SAndy Shevchenko .probe = intel_pinctrl_probe_by_hid, 333e278dcb7SAndy Shevchenko .driver = { 334e278dcb7SAndy Shevchenko .name = "jasperlake-pinctrl", 335e278dcb7SAndy Shevchenko .acpi_match_table = jsl_pinctrl_acpi_match, 336e278dcb7SAndy Shevchenko .pm = &jsl_pinctrl_pm_ops, 337e278dcb7SAndy Shevchenko }, 338e278dcb7SAndy Shevchenko }; 339e278dcb7SAndy Shevchenko module_platform_driver(jsl_pinctrl_driver); 340e278dcb7SAndy Shevchenko 341e278dcb7SAndy Shevchenko MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>"); 342e278dcb7SAndy Shevchenko MODULE_DESCRIPTION("Intel Jasper Lake PCH pinctrl/GPIO driver"); 343e278dcb7SAndy Shevchenko MODULE_LICENSE("GPL v2"); 344*34393c36SAndy Shevchenko MODULE_IMPORT_NS(PINCTRL_INTEL); 345