1c969afb4SAndy Shevchenko // SPDX-License-Identifier: GPL-2.0 2c969afb4SAndy Shevchenko /* 3c969afb4SAndy Shevchenko * Intel Elkhart Lake PCH pinctrl/GPIO driver 4c969afb4SAndy Shevchenko * 5c969afb4SAndy Shevchenko * Copyright (C) 2019, Intel Corporation 6c969afb4SAndy Shevchenko * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 7c969afb4SAndy Shevchenko */ 8c969afb4SAndy Shevchenko 9c969afb4SAndy Shevchenko #include <linux/mod_devicetable.h> 10c969afb4SAndy Shevchenko #include <linux/module.h> 11c969afb4SAndy Shevchenko #include <linux/platform_device.h> 12c969afb4SAndy Shevchenko 13c969afb4SAndy Shevchenko #include <linux/pinctrl/pinctrl.h> 14c969afb4SAndy Shevchenko 15c969afb4SAndy Shevchenko #include "pinctrl-intel.h" 16c969afb4SAndy Shevchenko 17c969afb4SAndy Shevchenko #define EHL_PAD_OWN 0x020 18c969afb4SAndy Shevchenko #define EHL_PADCFGLOCK 0x080 19c969afb4SAndy Shevchenko #define EHL_HOSTSW_OWN 0x0b0 20c969afb4SAndy Shevchenko #define EHL_GPI_IS 0x100 21c969afb4SAndy Shevchenko #define EHL_GPI_IE 0x120 22c969afb4SAndy Shevchenko 23c969afb4SAndy Shevchenko #define EHL_GPP(r, s, e) \ 24c969afb4SAndy Shevchenko { \ 25c969afb4SAndy Shevchenko .reg_num = (r), \ 26c969afb4SAndy Shevchenko .base = (s), \ 27c969afb4SAndy Shevchenko .size = ((e) - (s) + 1), \ 28c969afb4SAndy Shevchenko } 29c969afb4SAndy Shevchenko 30d83bc222SAndy Shevchenko #define EHL_COMMUNITY(b, s, e, g) \ 31d83bc222SAndy Shevchenko INTEL_COMMUNITY_GPPS(b, s, e, g, EHL) 32c969afb4SAndy Shevchenko 33c969afb4SAndy Shevchenko /* Elkhart Lake */ 34c969afb4SAndy Shevchenko static const struct pinctrl_pin_desc ehl_community0_pins[] = { 35c969afb4SAndy Shevchenko /* GPP_B */ 36c969afb4SAndy Shevchenko PINCTRL_PIN(0, "CORE_VID_0"), 37c969afb4SAndy Shevchenko PINCTRL_PIN(1, "CORE_VID_1"), 38c969afb4SAndy Shevchenko PINCTRL_PIN(2, "VRALERTB"), 39c969afb4SAndy Shevchenko PINCTRL_PIN(3, "CPU_GP_2"), 40c969afb4SAndy Shevchenko PINCTRL_PIN(4, "CPU_GP_3"), 41c969afb4SAndy Shevchenko PINCTRL_PIN(5, "OSE_I2C0_SCLK"), 42c969afb4SAndy Shevchenko PINCTRL_PIN(6, "OSE_I2C0_SDAT"), 43c969afb4SAndy Shevchenko PINCTRL_PIN(7, "OSE_I2C1_SCLK"), 44c969afb4SAndy Shevchenko PINCTRL_PIN(8, "OSE_I2C1_SDAT"), 45c969afb4SAndy Shevchenko PINCTRL_PIN(9, "I2C5_SDA"), 46c969afb4SAndy Shevchenko PINCTRL_PIN(10, "I2C5_SCL"), 47c969afb4SAndy Shevchenko PINCTRL_PIN(11, "PMCALERTB"), 48c969afb4SAndy Shevchenko PINCTRL_PIN(12, "SLP_S0B"), 49c969afb4SAndy Shevchenko PINCTRL_PIN(13, "PLTRSTB"), 50c969afb4SAndy Shevchenko PINCTRL_PIN(14, "SPKR"), 51c969afb4SAndy Shevchenko PINCTRL_PIN(15, "GSPI0_CS0B"), 52c969afb4SAndy Shevchenko PINCTRL_PIN(16, "GSPI0_CLK"), 53c969afb4SAndy Shevchenko PINCTRL_PIN(17, "GSPI0_MISO"), 54c969afb4SAndy Shevchenko PINCTRL_PIN(18, "GSPI0_MOSI"), 55c969afb4SAndy Shevchenko PINCTRL_PIN(19, "GSPI1_CS0B"), 56c969afb4SAndy Shevchenko PINCTRL_PIN(20, "GSPI1_CLK"), 57c969afb4SAndy Shevchenko PINCTRL_PIN(21, "GSPI1_MISO"), 58c969afb4SAndy Shevchenko PINCTRL_PIN(22, "GSPI1_MOSI"), 59c969afb4SAndy Shevchenko PINCTRL_PIN(23, "GPPC_B_23"), 60c969afb4SAndy Shevchenko PINCTRL_PIN(24, "GSPI0_CLK_LOOPBK"), 61c969afb4SAndy Shevchenko PINCTRL_PIN(25, "GSPI1_CLK_LOOPBK"), 62c969afb4SAndy Shevchenko /* GPP_T */ 63c969afb4SAndy Shevchenko PINCTRL_PIN(26, "OSE_QEPA_2"), 64c969afb4SAndy Shevchenko PINCTRL_PIN(27, "OSE_QEPB_2"), 65c969afb4SAndy Shevchenko PINCTRL_PIN(28, "OSE_QEPI_2"), 66c969afb4SAndy Shevchenko PINCTRL_PIN(29, "GPPC_T_3"), 67c969afb4SAndy Shevchenko PINCTRL_PIN(30, "RGMII0_INT"), 68c969afb4SAndy Shevchenko PINCTRL_PIN(31, "RGMII0_RESETB"), 69c969afb4SAndy Shevchenko PINCTRL_PIN(32, "RGMII0_AUXTS"), 70c969afb4SAndy Shevchenko PINCTRL_PIN(33, "RGMII0_PPS"), 71c969afb4SAndy Shevchenko PINCTRL_PIN(34, "USB2_OCB_2"), 72c969afb4SAndy Shevchenko PINCTRL_PIN(35, "OSE_HSUART2_EN"), 73c969afb4SAndy Shevchenko PINCTRL_PIN(36, "OSE_HSUART2_RE"), 74c969afb4SAndy Shevchenko PINCTRL_PIN(37, "USB2_OCB_3"), 75c969afb4SAndy Shevchenko PINCTRL_PIN(38, "OSE_UART2_RXD"), 76c969afb4SAndy Shevchenko PINCTRL_PIN(39, "OSE_UART2_TXD"), 77c969afb4SAndy Shevchenko PINCTRL_PIN(40, "OSE_UART2_RTSB"), 78c969afb4SAndy Shevchenko PINCTRL_PIN(41, "OSE_UART2_CTSB"), 79c969afb4SAndy Shevchenko /* GPP_G */ 80c969afb4SAndy Shevchenko PINCTRL_PIN(42, "SD3_CMD"), 81c969afb4SAndy Shevchenko PINCTRL_PIN(43, "SD3_D0"), 82c969afb4SAndy Shevchenko PINCTRL_PIN(44, "SD3_D1"), 83c969afb4SAndy Shevchenko PINCTRL_PIN(45, "SD3_D2"), 84c969afb4SAndy Shevchenko PINCTRL_PIN(46, "SD3_D3"), 85c969afb4SAndy Shevchenko PINCTRL_PIN(47, "SD3_CDB"), 86c969afb4SAndy Shevchenko PINCTRL_PIN(48, "SD3_CLK"), 87c969afb4SAndy Shevchenko PINCTRL_PIN(49, "I2S2_SCLK"), 88c969afb4SAndy Shevchenko PINCTRL_PIN(50, "I2S2_SFRM"), 89c969afb4SAndy Shevchenko PINCTRL_PIN(51, "I2S2_TXD"), 90c969afb4SAndy Shevchenko PINCTRL_PIN(52, "I2S2_RXD"), 91c969afb4SAndy Shevchenko PINCTRL_PIN(53, "I2S3_SCLK"), 92c969afb4SAndy Shevchenko PINCTRL_PIN(54, "I2S3_SFRM"), 93c969afb4SAndy Shevchenko PINCTRL_PIN(55, "I2S3_TXD"), 94c969afb4SAndy Shevchenko PINCTRL_PIN(56, "I2S3_RXD"), 95c969afb4SAndy Shevchenko PINCTRL_PIN(57, "ESPI_IO_0"), 96c969afb4SAndy Shevchenko PINCTRL_PIN(58, "ESPI_IO_1"), 97c969afb4SAndy Shevchenko PINCTRL_PIN(59, "ESPI_IO_2"), 98c969afb4SAndy Shevchenko PINCTRL_PIN(60, "ESPI_IO_3"), 99c969afb4SAndy Shevchenko PINCTRL_PIN(61, "I2S1_SCLK"), 100c969afb4SAndy Shevchenko PINCTRL_PIN(62, "ESPI_CSB"), 101c969afb4SAndy Shevchenko PINCTRL_PIN(63, "ESPI_CLK"), 102c969afb4SAndy Shevchenko PINCTRL_PIN(64, "ESPI_RESETB"), 103c969afb4SAndy Shevchenko PINCTRL_PIN(65, "SD3_WP"), 104c969afb4SAndy Shevchenko PINCTRL_PIN(66, "ESPI_CLK_LOOPBK"), 105c969afb4SAndy Shevchenko }; 106c969afb4SAndy Shevchenko 107c969afb4SAndy Shevchenko static const struct intel_padgroup ehl_community0_gpps[] = { 108c969afb4SAndy Shevchenko EHL_GPP(0, 0, 25), /* GPP_B */ 109c969afb4SAndy Shevchenko EHL_GPP(1, 26, 41), /* GPP_T */ 110c969afb4SAndy Shevchenko EHL_GPP(2, 42, 66), /* GPP_G */ 111c969afb4SAndy Shevchenko }; 112c969afb4SAndy Shevchenko 113c969afb4SAndy Shevchenko static const struct intel_community ehl_community0[] = { 114d83bc222SAndy Shevchenko EHL_COMMUNITY(0, 0, 66, ehl_community0_gpps), 115c969afb4SAndy Shevchenko }; 116c969afb4SAndy Shevchenko 117c969afb4SAndy Shevchenko static const struct intel_pinctrl_soc_data ehl_community0_soc_data = { 118c969afb4SAndy Shevchenko .uid = "0", 119c969afb4SAndy Shevchenko .pins = ehl_community0_pins, 120c969afb4SAndy Shevchenko .npins = ARRAY_SIZE(ehl_community0_pins), 121c969afb4SAndy Shevchenko .communities = ehl_community0, 122c969afb4SAndy Shevchenko .ncommunities = ARRAY_SIZE(ehl_community0), 123c969afb4SAndy Shevchenko }; 124c969afb4SAndy Shevchenko 125c969afb4SAndy Shevchenko static const struct pinctrl_pin_desc ehl_community1_pins[] = { 126c969afb4SAndy Shevchenko /* GPP_V */ 127c969afb4SAndy Shevchenko PINCTRL_PIN(0, "EMMC_CMD"), 128c969afb4SAndy Shevchenko PINCTRL_PIN(1, "EMMC_DATA0"), 129c969afb4SAndy Shevchenko PINCTRL_PIN(2, "EMMC_DATA1"), 130c969afb4SAndy Shevchenko PINCTRL_PIN(3, "EMMC_DATA2"), 131c969afb4SAndy Shevchenko PINCTRL_PIN(4, "EMMC_DATA3"), 132c969afb4SAndy Shevchenko PINCTRL_PIN(5, "EMMC_DATA4"), 133c969afb4SAndy Shevchenko PINCTRL_PIN(6, "EMMC_DATA5"), 134c969afb4SAndy Shevchenko PINCTRL_PIN(7, "EMMC_DATA6"), 135c969afb4SAndy Shevchenko PINCTRL_PIN(8, "EMMC_DATA7"), 136c969afb4SAndy Shevchenko PINCTRL_PIN(9, "EMMC_RCLK"), 137c969afb4SAndy Shevchenko PINCTRL_PIN(10, "EMMC_CLK"), 138c969afb4SAndy Shevchenko PINCTRL_PIN(11, "EMMC_RESETB"), 139c969afb4SAndy Shevchenko PINCTRL_PIN(12, "OSE_TGPIO0"), 140c969afb4SAndy Shevchenko PINCTRL_PIN(13, "OSE_TGPIO1"), 141c969afb4SAndy Shevchenko PINCTRL_PIN(14, "OSE_TGPIO2"), 142c969afb4SAndy Shevchenko PINCTRL_PIN(15, "OSE_TGPIO3"), 143c969afb4SAndy Shevchenko /* GPP_H */ 144c969afb4SAndy Shevchenko PINCTRL_PIN(16, "RGMII1_INT"), 145c969afb4SAndy Shevchenko PINCTRL_PIN(17, "RGMII1_RESETB"), 146c969afb4SAndy Shevchenko PINCTRL_PIN(18, "RGMII1_AUXTS"), 147c969afb4SAndy Shevchenko PINCTRL_PIN(19, "RGMII1_PPS"), 148c969afb4SAndy Shevchenko PINCTRL_PIN(20, "I2C2_SDA"), 149c969afb4SAndy Shevchenko PINCTRL_PIN(21, "I2C2_SCL"), 150c969afb4SAndy Shevchenko PINCTRL_PIN(22, "I2C3_SDA"), 151c969afb4SAndy Shevchenko PINCTRL_PIN(23, "I2C3_SCL"), 152c969afb4SAndy Shevchenko PINCTRL_PIN(24, "I2C4_SDA"), 153c969afb4SAndy Shevchenko PINCTRL_PIN(25, "I2C4_SCL"), 154c969afb4SAndy Shevchenko PINCTRL_PIN(26, "SRCCLKREQB_4"), 155c969afb4SAndy Shevchenko PINCTRL_PIN(27, "SRCCLKREQB_5"), 156c969afb4SAndy Shevchenko PINCTRL_PIN(28, "OSE_UART1_RXD"), 157c969afb4SAndy Shevchenko PINCTRL_PIN(29, "OSE_UART1_TXD"), 158c969afb4SAndy Shevchenko PINCTRL_PIN(30, "GPPC_H_14"), 159c969afb4SAndy Shevchenko PINCTRL_PIN(31, "OSE_UART1_CTSB"), 160c969afb4SAndy Shevchenko PINCTRL_PIN(32, "PCIE_LNK_DOWN"), 161c969afb4SAndy Shevchenko PINCTRL_PIN(33, "SD_PWR_EN_B"), 162c969afb4SAndy Shevchenko PINCTRL_PIN(34, "CPU_C10_GATEB"), 163c969afb4SAndy Shevchenko PINCTRL_PIN(35, "GPPC_H_19"), 164c969afb4SAndy Shevchenko PINCTRL_PIN(36, "OSE_PWM7"), 165c969afb4SAndy Shevchenko PINCTRL_PIN(37, "OSE_HSUART1_DE"), 166c969afb4SAndy Shevchenko PINCTRL_PIN(38, "OSE_HSUART1_RE"), 167c969afb4SAndy Shevchenko PINCTRL_PIN(39, "OSE_HSUART1_EN"), 168c969afb4SAndy Shevchenko /* GPP_D */ 169c969afb4SAndy Shevchenko PINCTRL_PIN(40, "OSE_QEPA_0"), 170c969afb4SAndy Shevchenko PINCTRL_PIN(41, "OSE_QEPB_0"), 171c969afb4SAndy Shevchenko PINCTRL_PIN(42, "OSE_QEPI_0"), 172c969afb4SAndy Shevchenko PINCTRL_PIN(43, "OSE_PWM6"), 173c969afb4SAndy Shevchenko PINCTRL_PIN(44, "OSE_PWM2"), 174c969afb4SAndy Shevchenko PINCTRL_PIN(45, "SRCCLKREQB_0"), 175c969afb4SAndy Shevchenko PINCTRL_PIN(46, "SRCCLKREQB_1"), 176c969afb4SAndy Shevchenko PINCTRL_PIN(47, "SRCCLKREQB_2"), 177c969afb4SAndy Shevchenko PINCTRL_PIN(48, "SRCCLKREQB_3"), 178c969afb4SAndy Shevchenko PINCTRL_PIN(49, "OSE_SPI0_CSB"), 179c969afb4SAndy Shevchenko PINCTRL_PIN(50, "OSE_SPI0_SCLK"), 180c969afb4SAndy Shevchenko PINCTRL_PIN(51, "OSE_SPI0_MISO"), 181c969afb4SAndy Shevchenko PINCTRL_PIN(52, "OSE_SPI0_MOSI"), 182c969afb4SAndy Shevchenko PINCTRL_PIN(53, "OSE_QEPA_1"), 183c969afb4SAndy Shevchenko PINCTRL_PIN(54, "OSE_QEPB_1"), 184c969afb4SAndy Shevchenko PINCTRL_PIN(55, "OSE_PWM3"), 185c969afb4SAndy Shevchenko PINCTRL_PIN(56, "OSE_QEPI_1"), 186c969afb4SAndy Shevchenko PINCTRL_PIN(57, "OSE_PWM4"), 187c969afb4SAndy Shevchenko PINCTRL_PIN(58, "OSE_PWM5"), 188c969afb4SAndy Shevchenko PINCTRL_PIN(59, "I2S_MCLK1_OUT"), 189c969afb4SAndy Shevchenko PINCTRL_PIN(60, "GSPI2_CLK_LOOPBK"), 190c969afb4SAndy Shevchenko /* GPP_U */ 191c969afb4SAndy Shevchenko PINCTRL_PIN(61, "RGMII2_INT"), 192c969afb4SAndy Shevchenko PINCTRL_PIN(62, "RGMII2_RESETB"), 193c969afb4SAndy Shevchenko PINCTRL_PIN(63, "RGMII2_PPS"), 194c969afb4SAndy Shevchenko PINCTRL_PIN(64, "RGMII2_AUXTS"), 195c969afb4SAndy Shevchenko PINCTRL_PIN(65, "ISI_SPIM_CS"), 196c969afb4SAndy Shevchenko PINCTRL_PIN(66, "ISI_SPIM_SCLK"), 197c969afb4SAndy Shevchenko PINCTRL_PIN(67, "ISI_SPIM_MISO"), 198c969afb4SAndy Shevchenko PINCTRL_PIN(68, "OSE_QEPA_3"), 199c969afb4SAndy Shevchenko PINCTRL_PIN(69, "ISI_SPIS_CS"), 200c969afb4SAndy Shevchenko PINCTRL_PIN(70, "ISI_SPIS_SCLK"), 201c969afb4SAndy Shevchenko PINCTRL_PIN(71, "ISI_SPIS_MISO"), 202c969afb4SAndy Shevchenko PINCTRL_PIN(72, "OSE_QEPB_3"), 203c969afb4SAndy Shevchenko PINCTRL_PIN(73, "ISI_CHX_OKNOK_0"), 204c969afb4SAndy Shevchenko PINCTRL_PIN(74, "ISI_CHX_OKNOK_1"), 205c969afb4SAndy Shevchenko PINCTRL_PIN(75, "ISI_CHX_RLY_SWTCH"), 206c969afb4SAndy Shevchenko PINCTRL_PIN(76, "ISI_CHX_PMIC_EN"), 207c969afb4SAndy Shevchenko PINCTRL_PIN(77, "ISI_OKNOK_0"), 208c969afb4SAndy Shevchenko PINCTRL_PIN(78, "ISI_OKNOK_1"), 209c969afb4SAndy Shevchenko PINCTRL_PIN(79, "ISI_ALERT"), 210c969afb4SAndy Shevchenko PINCTRL_PIN(80, "OSE_QEPI_3"), 211c969afb4SAndy Shevchenko PINCTRL_PIN(81, "GSPI3_CLK_LOOPBK"), 212c969afb4SAndy Shevchenko PINCTRL_PIN(82, "GSPI4_CLK_LOOPBK"), 213c969afb4SAndy Shevchenko PINCTRL_PIN(83, "GSPI5_CLK_LOOPBK"), 214c969afb4SAndy Shevchenko PINCTRL_PIN(84, "GSPI6_CLK_LOOPBK"), 215c969afb4SAndy Shevchenko /* vGPIO */ 216c969afb4SAndy Shevchenko PINCTRL_PIN(85, "CNV_BTEN"), 217c969afb4SAndy Shevchenko PINCTRL_PIN(86, "CNV_BT_HOST_WAKEB"), 218c969afb4SAndy Shevchenko PINCTRL_PIN(87, "CNV_BT_IF_SELECT"), 219c969afb4SAndy Shevchenko PINCTRL_PIN(88, "vCNV_BT_UART_TXD"), 220c969afb4SAndy Shevchenko PINCTRL_PIN(89, "vCNV_BT_UART_RXD"), 221c969afb4SAndy Shevchenko PINCTRL_PIN(90, "vCNV_BT_UART_CTS_B"), 222c969afb4SAndy Shevchenko PINCTRL_PIN(91, "vCNV_BT_UART_RTS_B"), 223c969afb4SAndy Shevchenko PINCTRL_PIN(92, "vCNV_MFUART1_TXD"), 224c969afb4SAndy Shevchenko PINCTRL_PIN(93, "vCNV_MFUART1_RXD"), 225c969afb4SAndy Shevchenko PINCTRL_PIN(94, "vCNV_MFUART1_CTS_B"), 226c969afb4SAndy Shevchenko PINCTRL_PIN(95, "vCNV_MFUART1_RTS_B"), 227c969afb4SAndy Shevchenko PINCTRL_PIN(96, "vUART0_TXD"), 228c969afb4SAndy Shevchenko PINCTRL_PIN(97, "vUART0_RXD"), 229c969afb4SAndy Shevchenko PINCTRL_PIN(98, "vUART0_CTS_B"), 230c969afb4SAndy Shevchenko PINCTRL_PIN(99, "vUART0_RTS_B"), 231c969afb4SAndy Shevchenko PINCTRL_PIN(100, "vOSE_UART0_TXD"), 232c969afb4SAndy Shevchenko PINCTRL_PIN(101, "vOSE_UART0_RXD"), 233c969afb4SAndy Shevchenko PINCTRL_PIN(102, "vOSE_UART0_CTS_B"), 234c969afb4SAndy Shevchenko PINCTRL_PIN(103, "vOSE_UART0_RTS_B"), 235c969afb4SAndy Shevchenko PINCTRL_PIN(104, "vCNV_BT_I2S_BCLK"), 236c969afb4SAndy Shevchenko PINCTRL_PIN(105, "vCNV_BT_I2S_WS_SYNC"), 237c969afb4SAndy Shevchenko PINCTRL_PIN(106, "vCNV_BT_I2S_SDO"), 238c969afb4SAndy Shevchenko PINCTRL_PIN(107, "vCNV_BT_I2S_SDI"), 239c969afb4SAndy Shevchenko PINCTRL_PIN(108, "vI2S2_SCLK"), 240c969afb4SAndy Shevchenko PINCTRL_PIN(109, "vI2S2_SFRM"), 241c969afb4SAndy Shevchenko PINCTRL_PIN(110, "vI2S2_TXD"), 242c969afb4SAndy Shevchenko PINCTRL_PIN(111, "vI2S2_RXD"), 243c969afb4SAndy Shevchenko PINCTRL_PIN(112, "vSD3_CD_B"), 244c969afb4SAndy Shevchenko }; 245c969afb4SAndy Shevchenko 246c969afb4SAndy Shevchenko static const struct intel_padgroup ehl_community1_gpps[] = { 247c969afb4SAndy Shevchenko EHL_GPP(0, 0, 15), /* GPP_V */ 248c969afb4SAndy Shevchenko EHL_GPP(1, 16, 39), /* GPP_H */ 249c969afb4SAndy Shevchenko EHL_GPP(2, 40, 60), /* GPP_D */ 250c969afb4SAndy Shevchenko EHL_GPP(3, 61, 84), /* GPP_U */ 251c969afb4SAndy Shevchenko EHL_GPP(4, 85, 112), /* vGPIO */ 252c969afb4SAndy Shevchenko }; 253c969afb4SAndy Shevchenko 254c969afb4SAndy Shevchenko static const struct intel_community ehl_community1[] = { 255d83bc222SAndy Shevchenko EHL_COMMUNITY(0, 0, 112, ehl_community1_gpps), 256c969afb4SAndy Shevchenko }; 257c969afb4SAndy Shevchenko 258c969afb4SAndy Shevchenko static const struct intel_pinctrl_soc_data ehl_community1_soc_data = { 259c969afb4SAndy Shevchenko .uid = "1", 260c969afb4SAndy Shevchenko .pins = ehl_community1_pins, 261c969afb4SAndy Shevchenko .npins = ARRAY_SIZE(ehl_community1_pins), 262c969afb4SAndy Shevchenko .communities = ehl_community1, 263c969afb4SAndy Shevchenko .ncommunities = ARRAY_SIZE(ehl_community1), 264c969afb4SAndy Shevchenko }; 265c969afb4SAndy Shevchenko 266c969afb4SAndy Shevchenko static const struct pinctrl_pin_desc ehl_community3_pins[] = { 267c969afb4SAndy Shevchenko /* CPU */ 268c969afb4SAndy Shevchenko PINCTRL_PIN(0, "HDACPU_SDI"), 269c969afb4SAndy Shevchenko PINCTRL_PIN(1, "HDACPU_SDO"), 270c969afb4SAndy Shevchenko PINCTRL_PIN(2, "HDACPU_BCLK"), 271c969afb4SAndy Shevchenko PINCTRL_PIN(3, "PM_SYNC"), 272c969afb4SAndy Shevchenko PINCTRL_PIN(4, "PECI"), 273c969afb4SAndy Shevchenko PINCTRL_PIN(5, "CPUPWRGD"), 274c969afb4SAndy Shevchenko PINCTRL_PIN(6, "THRMTRIPB"), 275c969afb4SAndy Shevchenko PINCTRL_PIN(7, "PLTRST_CPUB"), 276c969afb4SAndy Shevchenko PINCTRL_PIN(8, "PM_DOWN"), 277c969afb4SAndy Shevchenko PINCTRL_PIN(9, "TRIGGER_IN"), 278c969afb4SAndy Shevchenko PINCTRL_PIN(10, "TRIGGER_OUT"), 279c969afb4SAndy Shevchenko PINCTRL_PIN(11, "UFS_RESETB"), 280c969afb4SAndy Shevchenko PINCTRL_PIN(12, "CLKOUT_CPURTC"), 281c969afb4SAndy Shevchenko PINCTRL_PIN(13, "VCCST_OVERRIDE"), 282c969afb4SAndy Shevchenko PINCTRL_PIN(14, "C10_WAKE"), 283c969afb4SAndy Shevchenko PINCTRL_PIN(15, "PROCHOTB"), 284c969afb4SAndy Shevchenko PINCTRL_PIN(16, "CATERRB"), 285c969afb4SAndy Shevchenko /* GPP_S */ 286c969afb4SAndy Shevchenko PINCTRL_PIN(17, "UFS_REF_CLK_0"), 287c969afb4SAndy Shevchenko PINCTRL_PIN(18, "UFS_REF_CLK_1"), 288c969afb4SAndy Shevchenko /* GPP_A */ 289c969afb4SAndy Shevchenko PINCTRL_PIN(19, "RGMII0_TXDATA_3"), 290c969afb4SAndy Shevchenko PINCTRL_PIN(20, "RGMII0_TXDATA_2"), 291c969afb4SAndy Shevchenko PINCTRL_PIN(21, "RGMII0_TXDATA_1"), 292c969afb4SAndy Shevchenko PINCTRL_PIN(22, "RGMII0_TXDATA_0"), 293c969afb4SAndy Shevchenko PINCTRL_PIN(23, "RGMII0_TXCLK"), 294c969afb4SAndy Shevchenko PINCTRL_PIN(24, "RGMII0_TXCTL"), 295c969afb4SAndy Shevchenko PINCTRL_PIN(25, "RGMII0_RXCLK"), 296c969afb4SAndy Shevchenko PINCTRL_PIN(26, "RGMII0_RXDATA_3"), 297c969afb4SAndy Shevchenko PINCTRL_PIN(27, "RGMII0_RXDATA_2"), 298c969afb4SAndy Shevchenko PINCTRL_PIN(28, "RGMII0_RXDATA_1"), 299c969afb4SAndy Shevchenko PINCTRL_PIN(29, "RGMII0_RXDATA_0"), 300c969afb4SAndy Shevchenko PINCTRL_PIN(30, "RGMII1_TXDATA_3"), 301c969afb4SAndy Shevchenko PINCTRL_PIN(31, "RGMII1_TXDATA_2"), 302c969afb4SAndy Shevchenko PINCTRL_PIN(32, "RGMII1_TXDATA_1"), 303c969afb4SAndy Shevchenko PINCTRL_PIN(33, "RGMII1_TXDATA_0"), 304c969afb4SAndy Shevchenko PINCTRL_PIN(34, "RGMII1_TXCLK"), 305c969afb4SAndy Shevchenko PINCTRL_PIN(35, "RGMII1_TXCTL"), 306c969afb4SAndy Shevchenko PINCTRL_PIN(36, "RGMII1_RXCLK"), 307c969afb4SAndy Shevchenko PINCTRL_PIN(37, "RGMII1_RXCTL"), 308c969afb4SAndy Shevchenko PINCTRL_PIN(38, "RGMII1_RXDATA_3"), 309c969afb4SAndy Shevchenko PINCTRL_PIN(39, "RGMII1_RXDATA_2"), 310c969afb4SAndy Shevchenko PINCTRL_PIN(40, "RGMII1_RXDATA_1"), 311c969afb4SAndy Shevchenko PINCTRL_PIN(41, "RGMII1_RXDATA_0"), 312c969afb4SAndy Shevchenko PINCTRL_PIN(42, "RGMII0_RXCTL"), 313c969afb4SAndy Shevchenko /* vGPIO_3 */ 314c969afb4SAndy Shevchenko PINCTRL_PIN(43, "ESPI_USB_OCB_0"), 315c969afb4SAndy Shevchenko PINCTRL_PIN(44, "ESPI_USB_OCB_1"), 316c969afb4SAndy Shevchenko PINCTRL_PIN(45, "ESPI_USB_OCB_2"), 317c969afb4SAndy Shevchenko PINCTRL_PIN(46, "ESPI_USB_OCB_3"), 318c969afb4SAndy Shevchenko }; 319c969afb4SAndy Shevchenko 320c969afb4SAndy Shevchenko static const struct intel_padgroup ehl_community3_gpps[] = { 321c969afb4SAndy Shevchenko EHL_GPP(0, 0, 16), /* CPU */ 322c969afb4SAndy Shevchenko EHL_GPP(1, 17, 18), /* GPP_S */ 323c969afb4SAndy Shevchenko EHL_GPP(2, 19, 42), /* GPP_A */ 324c969afb4SAndy Shevchenko EHL_GPP(3, 43, 46), /* vGPIO_3 */ 325c969afb4SAndy Shevchenko }; 326c969afb4SAndy Shevchenko 327c969afb4SAndy Shevchenko static const struct intel_community ehl_community3[] = { 328d83bc222SAndy Shevchenko EHL_COMMUNITY(0, 0, 46, ehl_community3_gpps), 329c969afb4SAndy Shevchenko }; 330c969afb4SAndy Shevchenko 331c969afb4SAndy Shevchenko static const struct intel_pinctrl_soc_data ehl_community3_soc_data = { 332c969afb4SAndy Shevchenko .uid = "3", 333c969afb4SAndy Shevchenko .pins = ehl_community3_pins, 334c969afb4SAndy Shevchenko .npins = ARRAY_SIZE(ehl_community3_pins), 335c969afb4SAndy Shevchenko .communities = ehl_community3, 336c969afb4SAndy Shevchenko .ncommunities = ARRAY_SIZE(ehl_community3), 337c969afb4SAndy Shevchenko }; 338c969afb4SAndy Shevchenko 339c969afb4SAndy Shevchenko static const struct pinctrl_pin_desc ehl_community4_pins[] = { 340c969afb4SAndy Shevchenko /* GPP_C */ 341c969afb4SAndy Shevchenko PINCTRL_PIN(0, "SMBCLK"), 342c969afb4SAndy Shevchenko PINCTRL_PIN(1, "SMBDATA"), 343c969afb4SAndy Shevchenko PINCTRL_PIN(2, "OSE_PWM0"), 344c969afb4SAndy Shevchenko PINCTRL_PIN(3, "RGMII0_MDC"), 345c969afb4SAndy Shevchenko PINCTRL_PIN(4, "RGMII0_MDIO"), 346c969afb4SAndy Shevchenko PINCTRL_PIN(5, "OSE_PWM1"), 347c969afb4SAndy Shevchenko PINCTRL_PIN(6, "RGMII1_MDC"), 348c969afb4SAndy Shevchenko PINCTRL_PIN(7, "RGMII1_MDIO"), 349c969afb4SAndy Shevchenko PINCTRL_PIN(8, "OSE_TGPIO4"), 350c969afb4SAndy Shevchenko PINCTRL_PIN(9, "OSE_HSUART0_EN"), 351c969afb4SAndy Shevchenko PINCTRL_PIN(10, "OSE_TGPIO5"), 352c969afb4SAndy Shevchenko PINCTRL_PIN(11, "OSE_HSUART0_RE"), 353c969afb4SAndy Shevchenko PINCTRL_PIN(12, "OSE_UART0_RXD"), 354c969afb4SAndy Shevchenko PINCTRL_PIN(13, "OSE_UART0_TXD"), 355c969afb4SAndy Shevchenko PINCTRL_PIN(14, "OSE_UART0_RTSB"), 356c969afb4SAndy Shevchenko PINCTRL_PIN(15, "OSE_UART0_CTSB"), 357c969afb4SAndy Shevchenko PINCTRL_PIN(16, "RGMII2_MDIO"), 358c969afb4SAndy Shevchenko PINCTRL_PIN(17, "RGMII2_MDC"), 359c969afb4SAndy Shevchenko PINCTRL_PIN(18, "OSE_I2C4_SDAT"), 360c969afb4SAndy Shevchenko PINCTRL_PIN(19, "OSE_I2C4_SCLK"), 361c969afb4SAndy Shevchenko PINCTRL_PIN(20, "OSE_UART4_RXD"), 362c969afb4SAndy Shevchenko PINCTRL_PIN(21, "OSE_UART4_TXD"), 363c969afb4SAndy Shevchenko PINCTRL_PIN(22, "OSE_UART4_RTSB"), 364c969afb4SAndy Shevchenko PINCTRL_PIN(23, "OSE_UART4_CTSB"), 365c969afb4SAndy Shevchenko /* GPP_F */ 366c969afb4SAndy Shevchenko PINCTRL_PIN(24, "CNV_BRI_DT"), 367c969afb4SAndy Shevchenko PINCTRL_PIN(25, "CNV_BRI_RSP"), 368c969afb4SAndy Shevchenko PINCTRL_PIN(26, "CNV_RGI_DT"), 369c969afb4SAndy Shevchenko PINCTRL_PIN(27, "CNV_RGI_RSP"), 370c969afb4SAndy Shevchenko PINCTRL_PIN(28, "CNV_RF_RESET_B"), 371c969afb4SAndy Shevchenko PINCTRL_PIN(29, "EMMC_HIP_MON"), 372c969afb4SAndy Shevchenko PINCTRL_PIN(30, "CNV_PA_BLANKING"), 373c969afb4SAndy Shevchenko PINCTRL_PIN(31, "OSE_I2S1_SCLK"), 374c969afb4SAndy Shevchenko PINCTRL_PIN(32, "I2S_MCLK2_INOUT"), 375c969afb4SAndy Shevchenko PINCTRL_PIN(33, "BOOTMPC"), 376c969afb4SAndy Shevchenko PINCTRL_PIN(34, "OSE_I2S1_SFRM"), 377c969afb4SAndy Shevchenko PINCTRL_PIN(35, "GPPC_F_11"), 378c969afb4SAndy Shevchenko PINCTRL_PIN(36, "GSXDOUT"), 379c969afb4SAndy Shevchenko PINCTRL_PIN(37, "GSXSLOAD"), 380c969afb4SAndy Shevchenko PINCTRL_PIN(38, "GSXDIN"), 381c969afb4SAndy Shevchenko PINCTRL_PIN(39, "GSXSRESETB"), 382c969afb4SAndy Shevchenko PINCTRL_PIN(40, "GSXCLK"), 383c969afb4SAndy Shevchenko PINCTRL_PIN(41, "GPPC_F_17"), 384c969afb4SAndy Shevchenko PINCTRL_PIN(42, "OSE_I2S1_TXD"), 385c969afb4SAndy Shevchenko PINCTRL_PIN(43, "OSE_I2S1_RXD"), 386c969afb4SAndy Shevchenko PINCTRL_PIN(44, "EXT_PWR_GATEB"), 387c969afb4SAndy Shevchenko PINCTRL_PIN(45, "EXT_PWR_GATE2B"), 388c969afb4SAndy Shevchenko PINCTRL_PIN(46, "VNN_CTRL"), 389c969afb4SAndy Shevchenko PINCTRL_PIN(47, "V1P05_CTRL"), 390c969afb4SAndy Shevchenko PINCTRL_PIN(48, "GPPF_CLK_LOOPBACK"), 391c969afb4SAndy Shevchenko /* HVCMOS */ 392c969afb4SAndy Shevchenko PINCTRL_PIN(49, "L_BKLTEN"), 393c969afb4SAndy Shevchenko PINCTRL_PIN(50, "L_BKLTCTL"), 394c969afb4SAndy Shevchenko PINCTRL_PIN(51, "L_VDDEN"), 395c969afb4SAndy Shevchenko PINCTRL_PIN(52, "SYS_PWROK"), 396c969afb4SAndy Shevchenko PINCTRL_PIN(53, "SYS_RESETB"), 397c969afb4SAndy Shevchenko PINCTRL_PIN(54, "MLK_RSTB"), 398c969afb4SAndy Shevchenko /* GPP_E */ 399c969afb4SAndy Shevchenko PINCTRL_PIN(55, "SATA_LEDB"), 400c969afb4SAndy Shevchenko PINCTRL_PIN(56, "GPPC_E_1"), 401c969afb4SAndy Shevchenko PINCTRL_PIN(57, "GPPC_E_2"), 402c969afb4SAndy Shevchenko PINCTRL_PIN(58, "DDSP_HPD_B"), 403c969afb4SAndy Shevchenko PINCTRL_PIN(59, "SATA_DEVSLP_0"), 404c969afb4SAndy Shevchenko PINCTRL_PIN(60, "DDPB_CTRLDATA"), 405c969afb4SAndy Shevchenko PINCTRL_PIN(61, "GPPC_E_6"), 406c969afb4SAndy Shevchenko PINCTRL_PIN(62, "DDPB_CTRLCLK"), 407c969afb4SAndy Shevchenko PINCTRL_PIN(63, "GPPC_E_8"), 408c969afb4SAndy Shevchenko PINCTRL_PIN(64, "USB2_OCB_0"), 409c969afb4SAndy Shevchenko PINCTRL_PIN(65, "GPPC_E_10"), 410c969afb4SAndy Shevchenko PINCTRL_PIN(66, "GPPC_E_11"), 411c969afb4SAndy Shevchenko PINCTRL_PIN(67, "GPPC_E_12"), 412c969afb4SAndy Shevchenko PINCTRL_PIN(68, "GPPC_E_13"), 413c969afb4SAndy Shevchenko PINCTRL_PIN(69, "DDSP_HPD_A"), 414c969afb4SAndy Shevchenko PINCTRL_PIN(70, "OSE_I2S0_RXD"), 415c969afb4SAndy Shevchenko PINCTRL_PIN(71, "OSE_I2S0_TXD"), 416c969afb4SAndy Shevchenko PINCTRL_PIN(72, "DDSP_HPD_C"), 417c969afb4SAndy Shevchenko PINCTRL_PIN(73, "DDPA_CTRLDATA"), 418c969afb4SAndy Shevchenko PINCTRL_PIN(74, "DDPA_CTRLCLK"), 419c969afb4SAndy Shevchenko PINCTRL_PIN(75, "OSE_I2S0_SCLK"), 420c969afb4SAndy Shevchenko PINCTRL_PIN(76, "OSE_I2S0_SFRM"), 421c969afb4SAndy Shevchenko PINCTRL_PIN(77, "DDPC_CTRLDATA"), 422c969afb4SAndy Shevchenko PINCTRL_PIN(78, "DDPC_CTRLCLK"), 423c969afb4SAndy Shevchenko PINCTRL_PIN(79, "SPI1_CLK_LOOPBK"), 424c969afb4SAndy Shevchenko }; 425c969afb4SAndy Shevchenko 426c969afb4SAndy Shevchenko static const struct intel_padgroup ehl_community4_gpps[] = { 427c969afb4SAndy Shevchenko EHL_GPP(0, 0, 23), /* GPP_C */ 428c969afb4SAndy Shevchenko EHL_GPP(1, 24, 48), /* GPP_F */ 429c969afb4SAndy Shevchenko EHL_GPP(2, 49, 54), /* HVCMOS */ 430c969afb4SAndy Shevchenko EHL_GPP(3, 55, 79), /* GPP_E */ 431c969afb4SAndy Shevchenko }; 432c969afb4SAndy Shevchenko 433c969afb4SAndy Shevchenko static const struct intel_community ehl_community4[] = { 434d83bc222SAndy Shevchenko EHL_COMMUNITY(0, 0, 79, ehl_community4_gpps), 435c969afb4SAndy Shevchenko }; 436c969afb4SAndy Shevchenko 437c969afb4SAndy Shevchenko static const struct intel_pinctrl_soc_data ehl_community4_soc_data = { 438c969afb4SAndy Shevchenko .uid = "4", 439c969afb4SAndy Shevchenko .pins = ehl_community4_pins, 440c969afb4SAndy Shevchenko .npins = ARRAY_SIZE(ehl_community4_pins), 441c969afb4SAndy Shevchenko .communities = ehl_community4, 442c969afb4SAndy Shevchenko .ncommunities = ARRAY_SIZE(ehl_community4), 443c969afb4SAndy Shevchenko }; 444c969afb4SAndy Shevchenko 445c969afb4SAndy Shevchenko static const struct pinctrl_pin_desc ehl_community5_pins[] = { 446c969afb4SAndy Shevchenko /* GPP_R */ 447c969afb4SAndy Shevchenko PINCTRL_PIN(0, "HDA_BCLK"), 448c969afb4SAndy Shevchenko PINCTRL_PIN(1, "HDA_SYNC"), 449c969afb4SAndy Shevchenko PINCTRL_PIN(2, "HDA_SDO"), 450c969afb4SAndy Shevchenko PINCTRL_PIN(3, "HDA_SDI_0"), 451c969afb4SAndy Shevchenko PINCTRL_PIN(4, "HDA_RSTB"), 452c969afb4SAndy Shevchenko PINCTRL_PIN(5, "HDA_SDI_1"), 453c969afb4SAndy Shevchenko PINCTRL_PIN(6, "GPP_R_6"), 454c969afb4SAndy Shevchenko PINCTRL_PIN(7, "GPP_R_7"), 455c969afb4SAndy Shevchenko }; 456c969afb4SAndy Shevchenko 457c969afb4SAndy Shevchenko static const struct intel_padgroup ehl_community5_gpps[] = { 458c969afb4SAndy Shevchenko EHL_GPP(0, 0, 7), /* GPP_R */ 459c969afb4SAndy Shevchenko }; 460c969afb4SAndy Shevchenko 461c969afb4SAndy Shevchenko static const struct intel_community ehl_community5[] = { 462d83bc222SAndy Shevchenko EHL_COMMUNITY(0, 0, 7, ehl_community5_gpps), 463c969afb4SAndy Shevchenko }; 464c969afb4SAndy Shevchenko 465c969afb4SAndy Shevchenko static const struct intel_pinctrl_soc_data ehl_community5_soc_data = { 466c969afb4SAndy Shevchenko .uid = "5", 467c969afb4SAndy Shevchenko .pins = ehl_community5_pins, 468c969afb4SAndy Shevchenko .npins = ARRAY_SIZE(ehl_community5_pins), 469c969afb4SAndy Shevchenko .communities = ehl_community5, 470c969afb4SAndy Shevchenko .ncommunities = ARRAY_SIZE(ehl_community5), 471c969afb4SAndy Shevchenko }; 472c969afb4SAndy Shevchenko 473c969afb4SAndy Shevchenko static const struct intel_pinctrl_soc_data *ehl_soc_data_array[] = { 474c969afb4SAndy Shevchenko &ehl_community0_soc_data, 475c969afb4SAndy Shevchenko &ehl_community1_soc_data, 476c969afb4SAndy Shevchenko &ehl_community3_soc_data, 477c969afb4SAndy Shevchenko &ehl_community4_soc_data, 478c969afb4SAndy Shevchenko &ehl_community5_soc_data, 479c969afb4SAndy Shevchenko NULL 480c969afb4SAndy Shevchenko }; 481c969afb4SAndy Shevchenko 482c969afb4SAndy Shevchenko static const struct acpi_device_id ehl_pinctrl_acpi_match[] = { 483c969afb4SAndy Shevchenko { "INTC1020", (kernel_ulong_t)ehl_soc_data_array }, 484c969afb4SAndy Shevchenko { } 485c969afb4SAndy Shevchenko }; 486c969afb4SAndy Shevchenko MODULE_DEVICE_TABLE(acpi, ehl_pinctrl_acpi_match); 487c969afb4SAndy Shevchenko 488c969afb4SAndy Shevchenko static INTEL_PINCTRL_PM_OPS(ehl_pinctrl_pm_ops); 489c969afb4SAndy Shevchenko 490c969afb4SAndy Shevchenko static struct platform_driver ehl_pinctrl_driver = { 491c969afb4SAndy Shevchenko .probe = intel_pinctrl_probe_by_uid, 492c969afb4SAndy Shevchenko .driver = { 493c969afb4SAndy Shevchenko .name = "elkhartlake-pinctrl", 494c969afb4SAndy Shevchenko .acpi_match_table = ehl_pinctrl_acpi_match, 495c969afb4SAndy Shevchenko .pm = &ehl_pinctrl_pm_ops, 496c969afb4SAndy Shevchenko }, 497c969afb4SAndy Shevchenko }; 498c969afb4SAndy Shevchenko module_platform_driver(ehl_pinctrl_driver); 499c969afb4SAndy Shevchenko 500c969afb4SAndy Shevchenko MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>"); 501c969afb4SAndy Shevchenko MODULE_DESCRIPTION("Intel Elkhart Lake PCH pinctrl/GPIO driver"); 502c969afb4SAndy Shevchenko MODULE_LICENSE("GPL v2"); 503*34393c36SAndy Shevchenko MODULE_IMPORT_NS(PINCTRL_INTEL); 504