xref: /openbmc/linux/drivers/pinctrl/intel/Kconfig (revision 4e80c8f5)
15fae8b86SMika Westerberg#
25fae8b86SMika Westerberg# Intel pin control drivers
35fae8b86SMika Westerberg#
45fae8b86SMika Westerberg
55fae8b86SMika Westerbergconfig PINCTRL_BAYTRAIL
65fae8b86SMika Westerberg	bool "Intel Baytrail GPIO pin control"
75fae8b86SMika Westerberg	depends on GPIOLIB && ACPI
85fae8b86SMika Westerberg	select GPIOLIB_IRQCHIP
9c501d0b1SCristina Ciocan	select PINMUX
10c501d0b1SCristina Ciocan	select PINCONF
11c501d0b1SCristina Ciocan	select GENERIC_PINCONF
125fae8b86SMika Westerberg	help
135fae8b86SMika Westerberg	  driver for memory mapped GPIO functionality on Intel Baytrail
145fae8b86SMika Westerberg	  platforms. Supports 3 banks with 102, 28 and 44 gpios.
155fae8b86SMika Westerberg	  Most pins are usually muxed to some other functionality by firmware,
165fae8b86SMika Westerberg	  so only a small amount is available for gpio use.
175fae8b86SMika Westerberg
185fae8b86SMika Westerberg	  Requires ACPI device enumeration code to set up a platform device.
196e08d6bbSMika Westerberg
206e08d6bbSMika Westerbergconfig PINCTRL_CHERRYVIEW
216e08d6bbSMika Westerberg	tristate "Intel Cherryview/Braswell pinctrl and GPIO driver"
226e08d6bbSMika Westerberg	depends on ACPI
236e08d6bbSMika Westerberg	select PINMUX
246e08d6bbSMika Westerberg	select PINCONF
256e08d6bbSMika Westerberg	select GENERIC_PINCONF
266e08d6bbSMika Westerberg	select GPIOLIB
276e08d6bbSMika Westerberg	select GPIOLIB_IRQCHIP
286e08d6bbSMika Westerberg	help
296e08d6bbSMika Westerberg	  Cherryview/Braswell pinctrl driver provides an interface that
306e08d6bbSMika Westerberg	  allows configuring of SoC pins and using them as GPIOs.
317981c001SMika Westerberg
324e80c8f5SAndy Shevchenkoconfig PINCTRL_MERRIFIELD
334e80c8f5SAndy Shevchenko	tristate "Intel Merrifield pinctrl driver"
344e80c8f5SAndy Shevchenko	depends on X86_INTEL_MID
354e80c8f5SAndy Shevchenko	select PINMUX
364e80c8f5SAndy Shevchenko	select PINCONF
374e80c8f5SAndy Shevchenko	select GENERIC_PINCONF
384e80c8f5SAndy Shevchenko	help
394e80c8f5SAndy Shevchenko	  Merrifield Family-Level Interface Shim (FLIS) driver provides an
404e80c8f5SAndy Shevchenko	  interface that allows configuring of SoC pins and using them as
414e80c8f5SAndy Shevchenko	  GPIOs.
424e80c8f5SAndy Shevchenko
437981c001SMika Westerbergconfig PINCTRL_INTEL
447981c001SMika Westerberg	tristate
457981c001SMika Westerberg	select PINMUX
467981c001SMika Westerberg	select PINCONF
477981c001SMika Westerberg	select GENERIC_PINCONF
487981c001SMika Westerberg	select GPIOLIB
497981c001SMika Westerberg	select GPIOLIB_IRQCHIP
507981c001SMika Westerberg
51ee1a6ca4SMika Westerbergconfig PINCTRL_BROXTON
52ee1a6ca4SMika Westerberg	tristate "Intel Broxton pinctrl and GPIO driver"
53ee1a6ca4SMika Westerberg	depends on ACPI
54ee1a6ca4SMika Westerberg	select PINCTRL_INTEL
55ee1a6ca4SMika Westerberg	help
56ee1a6ca4SMika Westerberg	  Broxton pinctrl driver provides an interface that allows
57ee1a6ca4SMika Westerberg	  configuring of SoC pins and using them as GPIOs.
58ee1a6ca4SMika Westerberg
597981c001SMika Westerbergconfig PINCTRL_SUNRISEPOINT
607981c001SMika Westerberg	tristate "Intel Sunrisepoint pinctrl and GPIO driver"
617981c001SMika Westerberg	depends on ACPI
627981c001SMika Westerberg	select PINCTRL_INTEL
637981c001SMika Westerberg	help
647981c001SMika Westerberg	  Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver
657981c001SMika Westerberg	  provides an interface that allows configuring of PCH pins and
667981c001SMika Westerberg	  using them as GPIOs.
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