1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2016 Freescale Semiconductor, Inc.
4  * Copyright 2017-2018 NXP
5  *	Dong Aisheng <aisheng.dong@nxp.com>
6  */
7 
8 #include <linux/err.h>
9 #include <linux/firmware/imx/sci.h>
10 #include <linux/of_address.h>
11 #include <linux/pinctrl/pinctrl.h>
12 #include <linux/platform_device.h>
13 
14 #include "../core.h"
15 #include "pinctrl-imx.h"
16 
17 enum pad_func_e {
18 	IMX_SC_PAD_FUNC_SET = 15,
19 	IMX_SC_PAD_FUNC_GET = 16,
20 };
21 
22 struct imx_sc_msg_req_pad_set {
23 	struct imx_sc_rpc_msg hdr;
24 	u32 val;
25 	u16 pad;
26 } __packed __aligned(4);
27 
28 struct imx_sc_msg_req_pad_get {
29 	struct imx_sc_rpc_msg hdr;
30 	u16 pad;
31 } __packed __aligned(4);
32 
33 struct imx_sc_msg_resp_pad_get {
34 	struct imx_sc_rpc_msg hdr;
35 	u32 val;
36 } __packed;
37 
38 static struct imx_sc_ipc *pinctrl_ipc_handle;
39 
40 int imx_pinctrl_sc_ipc_init(struct platform_device *pdev)
41 {
42 	return imx_scu_get_handle(&pinctrl_ipc_handle);
43 }
44 EXPORT_SYMBOL_GPL(imx_pinctrl_sc_ipc_init);
45 
46 int imx_pinconf_get_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
47 			unsigned long *config)
48 {
49 	struct imx_sc_msg_req_pad_get msg;
50 	struct imx_sc_msg_resp_pad_get *resp;
51 	struct imx_sc_rpc_msg *hdr = &msg.hdr;
52 	int ret;
53 
54 	hdr->ver = IMX_SC_RPC_VERSION;
55 	hdr->svc = IMX_SC_RPC_SVC_PAD;
56 	hdr->func = IMX_SC_PAD_FUNC_GET;
57 	hdr->size = 2;
58 
59 	msg.pad = pin_id;
60 
61 	ret = imx_scu_call_rpc(pinctrl_ipc_handle, &msg, true);
62 	if (ret)
63 		return ret;
64 
65 	resp = (struct imx_sc_msg_resp_pad_get *)&msg;
66 	*config = resp->val;
67 
68 	return 0;
69 }
70 EXPORT_SYMBOL_GPL(imx_pinconf_get_scu);
71 
72 int imx_pinconf_set_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
73 			unsigned long *configs, unsigned num_configs)
74 {
75 	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
76 	struct imx_sc_msg_req_pad_set msg;
77 	struct imx_sc_rpc_msg *hdr = &msg.hdr;
78 	unsigned int mux = configs[0];
79 	unsigned int conf = configs[1];
80 	unsigned int val;
81 	int ret;
82 
83 	/*
84 	 * Set mux and conf together in one IPC call
85 	 */
86 	WARN_ON(num_configs != 2);
87 
88 	val = conf | BM_PAD_CTL_IFMUX_ENABLE | BM_PAD_CTL_GP_ENABLE;
89 	val |= mux << BP_PAD_CTL_IFMUX;
90 
91 	hdr->ver = IMX_SC_RPC_VERSION;
92 	hdr->svc = IMX_SC_RPC_SVC_PAD;
93 	hdr->func = IMX_SC_PAD_FUNC_SET;
94 	hdr->size = 3;
95 
96 	msg.pad = pin_id;
97 	msg.val = val;
98 
99 	ret = imx_scu_call_rpc(pinctrl_ipc_handle, &msg, true);
100 
101 	dev_dbg(ipctl->dev, "write: pin_id %u config 0x%x val 0x%x\n",
102 		pin_id, conf, val);
103 
104 	return ret;
105 }
106 EXPORT_SYMBOL_GPL(imx_pinconf_set_scu);
107 
108 void imx_pinctrl_parse_pin_scu(struct imx_pinctrl *ipctl,
109 			       unsigned int *pin_id, struct imx_pin *pin,
110 			       const __be32 **list_p)
111 {
112 	const struct imx_pinctrl_soc_info *info = ipctl->info;
113 	struct imx_pin_scu *pin_scu = &pin->conf.scu;
114 	const __be32 *list = *list_p;
115 
116 	pin->pin = be32_to_cpu(*list++);
117 	*pin_id = pin->pin;
118 	pin_scu->mux_mode = be32_to_cpu(*list++);
119 	pin_scu->config = be32_to_cpu(*list++);
120 	*list_p = list;
121 
122 	dev_dbg(ipctl->dev, "%s: 0x%x 0x%08lx", info->pins[pin->pin].name,
123 		pin_scu->mux_mode, pin_scu->config);
124 }
125 EXPORT_SYMBOL_GPL(imx_pinctrl_parse_pin_scu);
126