1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // Copyright 2012 Freescale Semiconductor, Inc.
4 
5 #include <linux/err.h>
6 #include <linux/init.h>
7 #include <linux/io.h>
8 #include <linux/of.h>
9 #include <linux/of_address.h>
10 #include <linux/platform_device.h>
11 #include <linux/seq_file.h>
12 #include <linux/slab.h>
13 
14 #include <linux/pinctrl/machine.h>
15 #include <linux/pinctrl/pinconf.h>
16 #include <linux/pinctrl/pinctrl.h>
17 #include <linux/pinctrl/pinmux.h>
18 
19 #include "../core.h"
20 #include "pinctrl-mxs.h"
21 
22 #define SUFFIX_LEN	4
23 
24 struct mxs_pinctrl_data {
25 	struct device *dev;
26 	struct pinctrl_dev *pctl;
27 	void __iomem *base;
28 	struct mxs_pinctrl_soc_data *soc;
29 };
30 
31 static int mxs_get_groups_count(struct pinctrl_dev *pctldev)
32 {
33 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
34 
35 	return d->soc->ngroups;
36 }
37 
38 static const char *mxs_get_group_name(struct pinctrl_dev *pctldev,
39 				      unsigned group)
40 {
41 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
42 
43 	return d->soc->groups[group].name;
44 }
45 
46 static int mxs_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
47 			      const unsigned **pins, unsigned *num_pins)
48 {
49 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
50 
51 	*pins = d->soc->groups[group].pins;
52 	*num_pins = d->soc->groups[group].npins;
53 
54 	return 0;
55 }
56 
57 static void mxs_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
58 			     unsigned offset)
59 {
60 	seq_printf(s, " %s", dev_name(pctldev->dev));
61 }
62 
63 static int mxs_dt_node_to_map(struct pinctrl_dev *pctldev,
64 			      struct device_node *np,
65 			      struct pinctrl_map **map, unsigned *num_maps)
66 {
67 	struct pinctrl_map *new_map;
68 	char *group = NULL;
69 	unsigned new_num = 1;
70 	unsigned long config = 0;
71 	unsigned long *pconfig;
72 	int length = strlen(np->name) + SUFFIX_LEN;
73 	bool purecfg = false;
74 	u32 val, reg;
75 	int ret, i = 0;
76 
77 	/* Check for pin config node which has no 'reg' property */
78 	if (of_property_read_u32(np, "reg", &reg))
79 		purecfg = true;
80 
81 	ret = of_property_read_u32(np, "fsl,drive-strength", &val);
82 	if (!ret)
83 		config = val | MA_PRESENT;
84 	ret = of_property_read_u32(np, "fsl,voltage", &val);
85 	if (!ret)
86 		config |= val << VOL_SHIFT | VOL_PRESENT;
87 	ret = of_property_read_u32(np, "fsl,pull-up", &val);
88 	if (!ret)
89 		config |= val << PULL_SHIFT | PULL_PRESENT;
90 
91 	/* Check for group node which has both mux and config settings */
92 	if (!purecfg && config)
93 		new_num = 2;
94 
95 	new_map = kcalloc(new_num, sizeof(*new_map), GFP_KERNEL);
96 	if (!new_map)
97 		return -ENOMEM;
98 
99 	if (!purecfg) {
100 		new_map[i].type = PIN_MAP_TYPE_MUX_GROUP;
101 		new_map[i].data.mux.function = np->name;
102 
103 		/* Compose group name */
104 		group = kzalloc(length, GFP_KERNEL);
105 		if (!group) {
106 			ret = -ENOMEM;
107 			goto free;
108 		}
109 		snprintf(group, length, "%s.%d", np->name, reg);
110 		new_map[i].data.mux.group = group;
111 		i++;
112 	}
113 
114 	if (config) {
115 		pconfig = kmemdup(&config, sizeof(config), GFP_KERNEL);
116 		if (!pconfig) {
117 			ret = -ENOMEM;
118 			goto free_group;
119 		}
120 
121 		new_map[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
122 		new_map[i].data.configs.group_or_pin = purecfg ? np->name :
123 								 group;
124 		new_map[i].data.configs.configs = pconfig;
125 		new_map[i].data.configs.num_configs = 1;
126 	}
127 
128 	*map = new_map;
129 	*num_maps = new_num;
130 
131 	return 0;
132 
133 free_group:
134 	if (!purecfg)
135 		kfree(group);
136 free:
137 	kfree(new_map);
138 	return ret;
139 }
140 
141 static void mxs_dt_free_map(struct pinctrl_dev *pctldev,
142 			    struct pinctrl_map *map, unsigned num_maps)
143 {
144 	u32 i;
145 
146 	for (i = 0; i < num_maps; i++) {
147 		if (map[i].type == PIN_MAP_TYPE_MUX_GROUP)
148 			kfree(map[i].data.mux.group);
149 		if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
150 			kfree(map[i].data.configs.configs);
151 	}
152 
153 	kfree(map);
154 }
155 
156 static const struct pinctrl_ops mxs_pinctrl_ops = {
157 	.get_groups_count = mxs_get_groups_count,
158 	.get_group_name = mxs_get_group_name,
159 	.get_group_pins = mxs_get_group_pins,
160 	.pin_dbg_show = mxs_pin_dbg_show,
161 	.dt_node_to_map = mxs_dt_node_to_map,
162 	.dt_free_map = mxs_dt_free_map,
163 };
164 
165 static int mxs_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
166 {
167 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
168 
169 	return d->soc->nfunctions;
170 }
171 
172 static const char *mxs_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
173 					     unsigned function)
174 {
175 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
176 
177 	return d->soc->functions[function].name;
178 }
179 
180 static int mxs_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
181 				       unsigned group,
182 				       const char * const **groups,
183 				       unsigned * const num_groups)
184 {
185 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
186 
187 	*groups = d->soc->functions[group].groups;
188 	*num_groups = d->soc->functions[group].ngroups;
189 
190 	return 0;
191 }
192 
193 static void mxs_pinctrl_rmwl(u32 value, u32 mask, u8 shift, void __iomem *reg)
194 {
195 	u32 tmp;
196 
197 	tmp = readl(reg);
198 	tmp &= ~(mask << shift);
199 	tmp |= value << shift;
200 	writel(tmp, reg);
201 }
202 
203 static int mxs_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
204 			       unsigned group)
205 {
206 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
207 	struct mxs_group *g = &d->soc->groups[group];
208 	void __iomem *reg;
209 	u8 bank, shift;
210 	u16 pin;
211 	u32 i;
212 
213 	for (i = 0; i < g->npins; i++) {
214 		bank = PINID_TO_BANK(g->pins[i]);
215 		pin = PINID_TO_PIN(g->pins[i]);
216 		reg = d->base + d->soc->regs->muxsel;
217 		reg += bank * 0x20 + pin / 16 * 0x10;
218 		shift = pin % 16 * 2;
219 
220 		mxs_pinctrl_rmwl(g->muxsel[i], 0x3, shift, reg);
221 	}
222 
223 	return 0;
224 }
225 
226 static const struct pinmux_ops mxs_pinmux_ops = {
227 	.get_functions_count = mxs_pinctrl_get_funcs_count,
228 	.get_function_name = mxs_pinctrl_get_func_name,
229 	.get_function_groups = mxs_pinctrl_get_func_groups,
230 	.set_mux = mxs_pinctrl_set_mux,
231 };
232 
233 static int mxs_pinconf_get(struct pinctrl_dev *pctldev,
234 			   unsigned pin, unsigned long *config)
235 {
236 	return -ENOTSUPP;
237 }
238 
239 static int mxs_pinconf_set(struct pinctrl_dev *pctldev,
240 			   unsigned pin, unsigned long *configs,
241 			   unsigned num_configs)
242 {
243 	return -ENOTSUPP;
244 }
245 
246 static int mxs_pinconf_group_get(struct pinctrl_dev *pctldev,
247 				 unsigned group, unsigned long *config)
248 {
249 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
250 
251 	*config = d->soc->groups[group].config;
252 
253 	return 0;
254 }
255 
256 static int mxs_pinconf_group_set(struct pinctrl_dev *pctldev,
257 				 unsigned group, unsigned long *configs,
258 				 unsigned num_configs)
259 {
260 	struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
261 	struct mxs_group *g = &d->soc->groups[group];
262 	void __iomem *reg;
263 	u8 ma, vol, pull, bank, shift;
264 	u16 pin;
265 	u32 i;
266 	int n;
267 	unsigned long config;
268 
269 	for (n = 0; n < num_configs; n++) {
270 		config = configs[n];
271 
272 		ma = PIN_CONFIG_TO_MA(config);
273 		vol = PIN_CONFIG_TO_VOL(config);
274 		pull = PIN_CONFIG_TO_PULL(config);
275 
276 		for (i = 0; i < g->npins; i++) {
277 			bank = PINID_TO_BANK(g->pins[i]);
278 			pin = PINID_TO_PIN(g->pins[i]);
279 
280 			/* drive */
281 			reg = d->base + d->soc->regs->drive;
282 			reg += bank * 0x40 + pin / 8 * 0x10;
283 
284 			/* mA */
285 			if (config & MA_PRESENT) {
286 				shift = pin % 8 * 4;
287 				mxs_pinctrl_rmwl(ma, 0x3, shift, reg);
288 			}
289 
290 			/* vol */
291 			if (config & VOL_PRESENT) {
292 				shift = pin % 8 * 4 + 2;
293 				if (vol)
294 					writel(1 << shift, reg + SET);
295 				else
296 					writel(1 << shift, reg + CLR);
297 			}
298 
299 			/* pull */
300 			if (config & PULL_PRESENT) {
301 				reg = d->base + d->soc->regs->pull;
302 				reg += bank * 0x10;
303 				shift = pin;
304 				if (pull)
305 					writel(1 << shift, reg + SET);
306 				else
307 					writel(1 << shift, reg + CLR);
308 			}
309 		}
310 
311 		/* cache the config value for mxs_pinconf_group_get() */
312 		g->config = config;
313 
314 	} /* for each config */
315 
316 	return 0;
317 }
318 
319 static void mxs_pinconf_dbg_show(struct pinctrl_dev *pctldev,
320 				 struct seq_file *s, unsigned pin)
321 {
322 	/* Not support */
323 }
324 
325 static void mxs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
326 				       struct seq_file *s, unsigned group)
327 {
328 	unsigned long config;
329 
330 	if (!mxs_pinconf_group_get(pctldev, group, &config))
331 		seq_printf(s, "0x%lx", config);
332 }
333 
334 static const struct pinconf_ops mxs_pinconf_ops = {
335 	.pin_config_get = mxs_pinconf_get,
336 	.pin_config_set = mxs_pinconf_set,
337 	.pin_config_group_get = mxs_pinconf_group_get,
338 	.pin_config_group_set = mxs_pinconf_group_set,
339 	.pin_config_dbg_show = mxs_pinconf_dbg_show,
340 	.pin_config_group_dbg_show = mxs_pinconf_group_dbg_show,
341 };
342 
343 static struct pinctrl_desc mxs_pinctrl_desc = {
344 	.pctlops = &mxs_pinctrl_ops,
345 	.pmxops = &mxs_pinmux_ops,
346 	.confops = &mxs_pinconf_ops,
347 	.owner = THIS_MODULE,
348 };
349 
350 static int mxs_pinctrl_parse_group(struct platform_device *pdev,
351 				   struct device_node *np, int idx,
352 				   const char **out_name)
353 {
354 	struct mxs_pinctrl_data *d = platform_get_drvdata(pdev);
355 	struct mxs_group *g = &d->soc->groups[idx];
356 	struct property *prop;
357 	const char *propname = "fsl,pinmux-ids";
358 	char *group;
359 	int length = strlen(np->name) + SUFFIX_LEN;
360 	u32 val, i;
361 
362 	group = devm_kzalloc(&pdev->dev, length, GFP_KERNEL);
363 	if (!group)
364 		return -ENOMEM;
365 	if (of_property_read_u32(np, "reg", &val))
366 		snprintf(group, length, "%s", np->name);
367 	else
368 		snprintf(group, length, "%s.%d", np->name, val);
369 	g->name = group;
370 
371 	prop = of_find_property(np, propname, &length);
372 	if (!prop)
373 		return -EINVAL;
374 	g->npins = length / sizeof(u32);
375 
376 	g->pins = devm_kcalloc(&pdev->dev, g->npins, sizeof(*g->pins),
377 			       GFP_KERNEL);
378 	if (!g->pins)
379 		return -ENOMEM;
380 
381 	g->muxsel = devm_kcalloc(&pdev->dev, g->npins, sizeof(*g->muxsel),
382 				 GFP_KERNEL);
383 	if (!g->muxsel)
384 		return -ENOMEM;
385 
386 	of_property_read_u32_array(np, propname, g->pins, g->npins);
387 	for (i = 0; i < g->npins; i++) {
388 		g->muxsel[i] = MUXID_TO_MUXSEL(g->pins[i]);
389 		g->pins[i] = MUXID_TO_PINID(g->pins[i]);
390 	}
391 
392 	if (out_name)
393 		*out_name = g->name;
394 
395 	return 0;
396 }
397 
398 static int mxs_pinctrl_probe_dt(struct platform_device *pdev,
399 				struct mxs_pinctrl_data *d)
400 {
401 	struct mxs_pinctrl_soc_data *soc = d->soc;
402 	struct device_node *np = pdev->dev.of_node;
403 	struct device_node *child;
404 	struct mxs_function *f;
405 	const char *gpio_compat = "fsl,mxs-gpio";
406 	const char *fn, *fnull = "";
407 	int i = 0, idxf = 0, idxg = 0;
408 	int ret;
409 	u32 val;
410 
411 	child = of_get_next_child(np, NULL);
412 	if (!child) {
413 		dev_err(&pdev->dev, "no group is defined\n");
414 		return -ENOENT;
415 	}
416 
417 	/* Count total functions and groups */
418 	fn = fnull;
419 	for_each_child_of_node(np, child) {
420 		if (of_device_is_compatible(child, gpio_compat))
421 			continue;
422 		soc->ngroups++;
423 		/* Skip pure pinconf node */
424 		if (of_property_read_u32(child, "reg", &val))
425 			continue;
426 		if (strcmp(fn, child->name)) {
427 			fn = child->name;
428 			soc->nfunctions++;
429 		}
430 	}
431 
432 	soc->functions = devm_kcalloc(&pdev->dev,
433 				      soc->nfunctions,
434 				      sizeof(*soc->functions),
435 				      GFP_KERNEL);
436 	if (!soc->functions)
437 		return -ENOMEM;
438 
439 	soc->groups = devm_kcalloc(&pdev->dev,
440 				   soc->ngroups, sizeof(*soc->groups),
441 				   GFP_KERNEL);
442 	if (!soc->groups)
443 		return -ENOMEM;
444 
445 	/* Count groups for each function */
446 	fn = fnull;
447 	f = &soc->functions[idxf];
448 	for_each_child_of_node(np, child) {
449 		if (of_device_is_compatible(child, gpio_compat))
450 			continue;
451 		if (of_property_read_u32(child, "reg", &val))
452 			continue;
453 		if (strcmp(fn, child->name)) {
454 			struct device_node *child2;
455 
456 			/*
457 			 * This reference is dropped by
458 			 * of_get_next_child(np, * child)
459 			 */
460 			of_node_get(child);
461 
462 			/*
463 			 * The logic parsing the functions from dt currently
464 			 * doesn't handle if functions with the same name are
465 			 * not grouped together. Only the first contiguous
466 			 * cluster is usable for each function name. This is a
467 			 * bug that is not trivial to fix, but at least warn
468 			 * about it.
469 			 */
470 			for (child2 = of_get_next_child(np, child);
471 			     child2 != NULL;
472 			     child2 = of_get_next_child(np, child2)) {
473 				if (!strcmp(child2->name, fn))
474 					dev_warn(&pdev->dev,
475 						 "function nodes must be grouped by name (failed for: %s)",
476 						 fn);
477 			}
478 
479 			f = &soc->functions[idxf++];
480 			f->name = fn = child->name;
481 		}
482 		f->ngroups++;
483 	}
484 
485 	/* Get groups for each function */
486 	idxf = 0;
487 	fn = fnull;
488 	for_each_child_of_node(np, child) {
489 		if (of_device_is_compatible(child, gpio_compat))
490 			continue;
491 		if (of_property_read_u32(child, "reg", &val)) {
492 			ret = mxs_pinctrl_parse_group(pdev, child,
493 						      idxg++, NULL);
494 			if (ret) {
495 				of_node_put(child);
496 				return ret;
497 			}
498 			continue;
499 		}
500 
501 		if (strcmp(fn, child->name)) {
502 			f = &soc->functions[idxf++];
503 			f->groups = devm_kcalloc(&pdev->dev,
504 						 f->ngroups,
505 						 sizeof(*f->groups),
506 						 GFP_KERNEL);
507 			if (!f->groups) {
508 				of_node_put(child);
509 				return -ENOMEM;
510 			}
511 			fn = child->name;
512 			i = 0;
513 		}
514 		ret = mxs_pinctrl_parse_group(pdev, child, idxg++,
515 					      &f->groups[i++]);
516 		if (ret) {
517 			of_node_put(child);
518 			return ret;
519 		}
520 	}
521 
522 	return 0;
523 }
524 
525 int mxs_pinctrl_probe(struct platform_device *pdev,
526 		      struct mxs_pinctrl_soc_data *soc)
527 {
528 	struct device_node *np = pdev->dev.of_node;
529 	struct mxs_pinctrl_data *d;
530 	int ret;
531 
532 	d = devm_kzalloc(&pdev->dev, sizeof(*d), GFP_KERNEL);
533 	if (!d)
534 		return -ENOMEM;
535 
536 	d->dev = &pdev->dev;
537 	d->soc = soc;
538 
539 	d->base = of_iomap(np, 0);
540 	if (!d->base)
541 		return -EADDRNOTAVAIL;
542 
543 	mxs_pinctrl_desc.pins = d->soc->pins;
544 	mxs_pinctrl_desc.npins = d->soc->npins;
545 	mxs_pinctrl_desc.name = dev_name(&pdev->dev);
546 
547 	platform_set_drvdata(pdev, d);
548 
549 	ret = mxs_pinctrl_probe_dt(pdev, d);
550 	if (ret) {
551 		dev_err(&pdev->dev, "dt probe failed: %d\n", ret);
552 		goto err;
553 	}
554 
555 	d->pctl = pinctrl_register(&mxs_pinctrl_desc, &pdev->dev, d);
556 	if (IS_ERR(d->pctl)) {
557 		dev_err(&pdev->dev, "Couldn't register MXS pinctrl driver\n");
558 		ret = PTR_ERR(d->pctl);
559 		goto err;
560 	}
561 
562 	return 0;
563 
564 err:
565 	iounmap(d->base);
566 	return ret;
567 }
568