1 /* 2 * Copyright 2012 Freescale Semiconductor, Inc. 3 * 4 * The code contained herein is licensed under the GNU General Public 5 * License. You may obtain a copy of the GNU General Public License 6 * Version 2 or later at the following locations: 7 * 8 * http://www.opensource.org/licenses/gpl-license.html 9 * http://www.gnu.org/copyleft/gpl.html 10 */ 11 12 #include <linux/err.h> 13 #include <linux/init.h> 14 #include <linux/io.h> 15 #include <linux/of.h> 16 #include <linux/of_address.h> 17 #include <linux/pinctrl/machine.h> 18 #include <linux/pinctrl/pinconf.h> 19 #include <linux/pinctrl/pinctrl.h> 20 #include <linux/pinctrl/pinmux.h> 21 #include <linux/platform_device.h> 22 #include <linux/slab.h> 23 #include "../core.h" 24 #include "pinctrl-mxs.h" 25 26 #define SUFFIX_LEN 4 27 28 struct mxs_pinctrl_data { 29 struct device *dev; 30 struct pinctrl_dev *pctl; 31 void __iomem *base; 32 struct mxs_pinctrl_soc_data *soc; 33 }; 34 35 static int mxs_get_groups_count(struct pinctrl_dev *pctldev) 36 { 37 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); 38 39 return d->soc->ngroups; 40 } 41 42 static const char *mxs_get_group_name(struct pinctrl_dev *pctldev, 43 unsigned group) 44 { 45 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); 46 47 return d->soc->groups[group].name; 48 } 49 50 static int mxs_get_group_pins(struct pinctrl_dev *pctldev, unsigned group, 51 const unsigned **pins, unsigned *num_pins) 52 { 53 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); 54 55 *pins = d->soc->groups[group].pins; 56 *num_pins = d->soc->groups[group].npins; 57 58 return 0; 59 } 60 61 static void mxs_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, 62 unsigned offset) 63 { 64 seq_printf(s, " %s", dev_name(pctldev->dev)); 65 } 66 67 static int mxs_dt_node_to_map(struct pinctrl_dev *pctldev, 68 struct device_node *np, 69 struct pinctrl_map **map, unsigned *num_maps) 70 { 71 struct pinctrl_map *new_map; 72 char *group = NULL; 73 unsigned new_num = 1; 74 unsigned long config = 0; 75 unsigned long *pconfig; 76 int length = strlen(np->name) + SUFFIX_LEN; 77 bool purecfg = false; 78 u32 val, reg; 79 int ret, i = 0; 80 81 /* Check for pin config node which has no 'reg' property */ 82 if (of_property_read_u32(np, "reg", ®)) 83 purecfg = true; 84 85 ret = of_property_read_u32(np, "fsl,drive-strength", &val); 86 if (!ret) 87 config = val | MA_PRESENT; 88 ret = of_property_read_u32(np, "fsl,voltage", &val); 89 if (!ret) 90 config |= val << VOL_SHIFT | VOL_PRESENT; 91 ret = of_property_read_u32(np, "fsl,pull-up", &val); 92 if (!ret) 93 config |= val << PULL_SHIFT | PULL_PRESENT; 94 95 /* Check for group node which has both mux and config settings */ 96 if (!purecfg && config) 97 new_num = 2; 98 99 new_map = kzalloc(sizeof(*new_map) * new_num, GFP_KERNEL); 100 if (!new_map) 101 return -ENOMEM; 102 103 if (!purecfg) { 104 new_map[i].type = PIN_MAP_TYPE_MUX_GROUP; 105 new_map[i].data.mux.function = np->name; 106 107 /* Compose group name */ 108 group = kzalloc(length, GFP_KERNEL); 109 if (!group) { 110 ret = -ENOMEM; 111 goto free; 112 } 113 snprintf(group, length, "%s.%d", np->name, reg); 114 new_map[i].data.mux.group = group; 115 i++; 116 } 117 118 if (config) { 119 pconfig = kmemdup(&config, sizeof(config), GFP_KERNEL); 120 if (!pconfig) { 121 ret = -ENOMEM; 122 goto free_group; 123 } 124 125 new_map[i].type = PIN_MAP_TYPE_CONFIGS_GROUP; 126 new_map[i].data.configs.group_or_pin = purecfg ? np->name : 127 group; 128 new_map[i].data.configs.configs = pconfig; 129 new_map[i].data.configs.num_configs = 1; 130 } 131 132 *map = new_map; 133 *num_maps = new_num; 134 135 return 0; 136 137 free_group: 138 if (!purecfg) 139 kfree(group); 140 free: 141 kfree(new_map); 142 return ret; 143 } 144 145 static void mxs_dt_free_map(struct pinctrl_dev *pctldev, 146 struct pinctrl_map *map, unsigned num_maps) 147 { 148 u32 i; 149 150 for (i = 0; i < num_maps; i++) { 151 if (map[i].type == PIN_MAP_TYPE_MUX_GROUP) 152 kfree(map[i].data.mux.group); 153 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP) 154 kfree(map[i].data.configs.configs); 155 } 156 157 kfree(map); 158 } 159 160 static const struct pinctrl_ops mxs_pinctrl_ops = { 161 .get_groups_count = mxs_get_groups_count, 162 .get_group_name = mxs_get_group_name, 163 .get_group_pins = mxs_get_group_pins, 164 .pin_dbg_show = mxs_pin_dbg_show, 165 .dt_node_to_map = mxs_dt_node_to_map, 166 .dt_free_map = mxs_dt_free_map, 167 }; 168 169 static int mxs_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev) 170 { 171 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); 172 173 return d->soc->nfunctions; 174 } 175 176 static const char *mxs_pinctrl_get_func_name(struct pinctrl_dev *pctldev, 177 unsigned function) 178 { 179 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); 180 181 return d->soc->functions[function].name; 182 } 183 184 static int mxs_pinctrl_get_func_groups(struct pinctrl_dev *pctldev, 185 unsigned group, 186 const char * const **groups, 187 unsigned * const num_groups) 188 { 189 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); 190 191 *groups = d->soc->functions[group].groups; 192 *num_groups = d->soc->functions[group].ngroups; 193 194 return 0; 195 } 196 197 static void mxs_pinctrl_rmwl(u32 value, u32 mask, u8 shift, void __iomem *reg) 198 { 199 u32 tmp; 200 201 tmp = readl(reg); 202 tmp &= ~(mask << shift); 203 tmp |= value << shift; 204 writel(tmp, reg); 205 } 206 207 static int mxs_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned selector, 208 unsigned group) 209 { 210 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); 211 struct mxs_group *g = &d->soc->groups[group]; 212 void __iomem *reg; 213 u8 bank, shift; 214 u16 pin; 215 u32 i; 216 217 for (i = 0; i < g->npins; i++) { 218 bank = PINID_TO_BANK(g->pins[i]); 219 pin = PINID_TO_PIN(g->pins[i]); 220 reg = d->base + d->soc->regs->muxsel; 221 reg += bank * 0x20 + pin / 16 * 0x10; 222 shift = pin % 16 * 2; 223 224 mxs_pinctrl_rmwl(g->muxsel[i], 0x3, shift, reg); 225 } 226 227 return 0; 228 } 229 230 static const struct pinmux_ops mxs_pinmux_ops = { 231 .get_functions_count = mxs_pinctrl_get_funcs_count, 232 .get_function_name = mxs_pinctrl_get_func_name, 233 .get_function_groups = mxs_pinctrl_get_func_groups, 234 .set_mux = mxs_pinctrl_set_mux, 235 }; 236 237 static int mxs_pinconf_get(struct pinctrl_dev *pctldev, 238 unsigned pin, unsigned long *config) 239 { 240 return -ENOTSUPP; 241 } 242 243 static int mxs_pinconf_set(struct pinctrl_dev *pctldev, 244 unsigned pin, unsigned long *configs, 245 unsigned num_configs) 246 { 247 return -ENOTSUPP; 248 } 249 250 static int mxs_pinconf_group_get(struct pinctrl_dev *pctldev, 251 unsigned group, unsigned long *config) 252 { 253 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); 254 255 *config = d->soc->groups[group].config; 256 257 return 0; 258 } 259 260 static int mxs_pinconf_group_set(struct pinctrl_dev *pctldev, 261 unsigned group, unsigned long *configs, 262 unsigned num_configs) 263 { 264 struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev); 265 struct mxs_group *g = &d->soc->groups[group]; 266 void __iomem *reg; 267 u8 ma, vol, pull, bank, shift; 268 u16 pin; 269 u32 i; 270 int n; 271 unsigned long config; 272 273 for (n = 0; n < num_configs; n++) { 274 config = configs[n]; 275 276 ma = CONFIG_TO_MA(config); 277 vol = CONFIG_TO_VOL(config); 278 pull = CONFIG_TO_PULL(config); 279 280 for (i = 0; i < g->npins; i++) { 281 bank = PINID_TO_BANK(g->pins[i]); 282 pin = PINID_TO_PIN(g->pins[i]); 283 284 /* drive */ 285 reg = d->base + d->soc->regs->drive; 286 reg += bank * 0x40 + pin / 8 * 0x10; 287 288 /* mA */ 289 if (config & MA_PRESENT) { 290 shift = pin % 8 * 4; 291 mxs_pinctrl_rmwl(ma, 0x3, shift, reg); 292 } 293 294 /* vol */ 295 if (config & VOL_PRESENT) { 296 shift = pin % 8 * 4 + 2; 297 if (vol) 298 writel(1 << shift, reg + SET); 299 else 300 writel(1 << shift, reg + CLR); 301 } 302 303 /* pull */ 304 if (config & PULL_PRESENT) { 305 reg = d->base + d->soc->regs->pull; 306 reg += bank * 0x10; 307 shift = pin; 308 if (pull) 309 writel(1 << shift, reg + SET); 310 else 311 writel(1 << shift, reg + CLR); 312 } 313 } 314 315 /* cache the config value for mxs_pinconf_group_get() */ 316 g->config = config; 317 318 } /* for each config */ 319 320 return 0; 321 } 322 323 static void mxs_pinconf_dbg_show(struct pinctrl_dev *pctldev, 324 struct seq_file *s, unsigned pin) 325 { 326 /* Not support */ 327 } 328 329 static void mxs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, 330 struct seq_file *s, unsigned group) 331 { 332 unsigned long config; 333 334 if (!mxs_pinconf_group_get(pctldev, group, &config)) 335 seq_printf(s, "0x%lx", config); 336 } 337 338 static const struct pinconf_ops mxs_pinconf_ops = { 339 .pin_config_get = mxs_pinconf_get, 340 .pin_config_set = mxs_pinconf_set, 341 .pin_config_group_get = mxs_pinconf_group_get, 342 .pin_config_group_set = mxs_pinconf_group_set, 343 .pin_config_dbg_show = mxs_pinconf_dbg_show, 344 .pin_config_group_dbg_show = mxs_pinconf_group_dbg_show, 345 }; 346 347 static struct pinctrl_desc mxs_pinctrl_desc = { 348 .pctlops = &mxs_pinctrl_ops, 349 .pmxops = &mxs_pinmux_ops, 350 .confops = &mxs_pinconf_ops, 351 .owner = THIS_MODULE, 352 }; 353 354 static int mxs_pinctrl_parse_group(struct platform_device *pdev, 355 struct device_node *np, int idx, 356 const char **out_name) 357 { 358 struct mxs_pinctrl_data *d = platform_get_drvdata(pdev); 359 struct mxs_group *g = &d->soc->groups[idx]; 360 struct property *prop; 361 const char *propname = "fsl,pinmux-ids"; 362 char *group; 363 int length = strlen(np->name) + SUFFIX_LEN; 364 u32 val, i; 365 366 group = devm_kzalloc(&pdev->dev, length, GFP_KERNEL); 367 if (!group) 368 return -ENOMEM; 369 if (of_property_read_u32(np, "reg", &val)) 370 snprintf(group, length, "%s", np->name); 371 else 372 snprintf(group, length, "%s.%d", np->name, val); 373 g->name = group; 374 375 prop = of_find_property(np, propname, &length); 376 if (!prop) 377 return -EINVAL; 378 g->npins = length / sizeof(u32); 379 380 g->pins = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->pins), 381 GFP_KERNEL); 382 if (!g->pins) 383 return -ENOMEM; 384 385 g->muxsel = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->muxsel), 386 GFP_KERNEL); 387 if (!g->muxsel) 388 return -ENOMEM; 389 390 of_property_read_u32_array(np, propname, g->pins, g->npins); 391 for (i = 0; i < g->npins; i++) { 392 g->muxsel[i] = MUXID_TO_MUXSEL(g->pins[i]); 393 g->pins[i] = MUXID_TO_PINID(g->pins[i]); 394 } 395 396 if (out_name) 397 *out_name = g->name; 398 399 return 0; 400 } 401 402 static int mxs_pinctrl_probe_dt(struct platform_device *pdev, 403 struct mxs_pinctrl_data *d) 404 { 405 struct mxs_pinctrl_soc_data *soc = d->soc; 406 struct device_node *np = pdev->dev.of_node; 407 struct device_node *child; 408 struct mxs_function *f; 409 const char *gpio_compat = "fsl,mxs-gpio"; 410 const char *fn, *fnull = ""; 411 int i = 0, idxf = 0, idxg = 0; 412 int ret; 413 u32 val; 414 415 child = of_get_next_child(np, NULL); 416 if (!child) { 417 dev_err(&pdev->dev, "no group is defined\n"); 418 return -ENOENT; 419 } 420 421 /* Count total functions and groups */ 422 fn = fnull; 423 for_each_child_of_node(np, child) { 424 if (of_device_is_compatible(child, gpio_compat)) 425 continue; 426 soc->ngroups++; 427 /* Skip pure pinconf node */ 428 if (of_property_read_u32(child, "reg", &val)) 429 continue; 430 if (strcmp(fn, child->name)) { 431 fn = child->name; 432 soc->nfunctions++; 433 } 434 } 435 436 soc->functions = devm_kzalloc(&pdev->dev, soc->nfunctions * 437 sizeof(*soc->functions), GFP_KERNEL); 438 if (!soc->functions) 439 return -ENOMEM; 440 441 soc->groups = devm_kzalloc(&pdev->dev, soc->ngroups * 442 sizeof(*soc->groups), GFP_KERNEL); 443 if (!soc->groups) 444 return -ENOMEM; 445 446 /* Count groups for each function */ 447 fn = fnull; 448 f = &soc->functions[idxf]; 449 for_each_child_of_node(np, child) { 450 if (of_device_is_compatible(child, gpio_compat)) 451 continue; 452 if (of_property_read_u32(child, "reg", &val)) 453 continue; 454 if (strcmp(fn, child->name)) { 455 struct device_node *child2; 456 457 /* 458 * This reference is dropped by 459 * of_get_next_child(np, * child) 460 */ 461 of_node_get(child); 462 463 /* 464 * The logic parsing the functions from dt currently 465 * doesn't handle if functions with the same name are 466 * not grouped together. Only the first contiguous 467 * cluster is usable for each function name. This is a 468 * bug that is not trivial to fix, but at least warn 469 * about it. 470 */ 471 for (child2 = of_get_next_child(np, child); 472 child2 != NULL; 473 child2 = of_get_next_child(np, child2)) { 474 if (!strcmp(child2->name, fn)) 475 dev_warn(&pdev->dev, 476 "function nodes must be grouped by name (failed for: %s)", 477 fn); 478 } 479 480 f = &soc->functions[idxf++]; 481 f->name = fn = child->name; 482 } 483 f->ngroups++; 484 } 485 486 /* Get groups for each function */ 487 idxf = 0; 488 fn = fnull; 489 for_each_child_of_node(np, child) { 490 if (of_device_is_compatible(child, gpio_compat)) 491 continue; 492 if (of_property_read_u32(child, "reg", &val)) { 493 ret = mxs_pinctrl_parse_group(pdev, child, 494 idxg++, NULL); 495 if (ret) 496 return ret; 497 continue; 498 } 499 500 if (strcmp(fn, child->name)) { 501 f = &soc->functions[idxf++]; 502 f->groups = devm_kzalloc(&pdev->dev, f->ngroups * 503 sizeof(*f->groups), 504 GFP_KERNEL); 505 if (!f->groups) 506 return -ENOMEM; 507 fn = child->name; 508 i = 0; 509 } 510 ret = mxs_pinctrl_parse_group(pdev, child, idxg++, 511 &f->groups[i++]); 512 if (ret) 513 return ret; 514 } 515 516 return 0; 517 } 518 519 int mxs_pinctrl_probe(struct platform_device *pdev, 520 struct mxs_pinctrl_soc_data *soc) 521 { 522 struct device_node *np = pdev->dev.of_node; 523 struct mxs_pinctrl_data *d; 524 int ret; 525 526 d = devm_kzalloc(&pdev->dev, sizeof(*d), GFP_KERNEL); 527 if (!d) 528 return -ENOMEM; 529 530 d->dev = &pdev->dev; 531 d->soc = soc; 532 533 d->base = of_iomap(np, 0); 534 if (!d->base) 535 return -EADDRNOTAVAIL; 536 537 mxs_pinctrl_desc.pins = d->soc->pins; 538 mxs_pinctrl_desc.npins = d->soc->npins; 539 mxs_pinctrl_desc.name = dev_name(&pdev->dev); 540 541 platform_set_drvdata(pdev, d); 542 543 ret = mxs_pinctrl_probe_dt(pdev, d); 544 if (ret) { 545 dev_err(&pdev->dev, "dt probe failed: %d\n", ret); 546 goto err; 547 } 548 549 d->pctl = pinctrl_register(&mxs_pinctrl_desc, &pdev->dev, d); 550 if (IS_ERR(d->pctl)) { 551 dev_err(&pdev->dev, "Couldn't register MXS pinctrl driver\n"); 552 ret = PTR_ERR(d->pctl); 553 goto err; 554 } 555 556 return 0; 557 558 err: 559 iounmap(d->base); 560 return ret; 561 } 562 EXPORT_SYMBOL_GPL(mxs_pinctrl_probe); 563