1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2016 Freescale Semiconductor, Inc. 4 * Copyright 2017-2018 NXP 5 * Dong Aisheng <aisheng.dong@nxp.com> 6 */ 7 8 #include <dt-bindings/pinctrl/pads-imx8qxp.h> 9 #include <linux/err.h> 10 #include <linux/firmware/imx/sci.h> 11 #include <linux/init.h> 12 #include <linux/io.h> 13 #include <linux/module.h> 14 #include <linux/of.h> 15 #include <linux/of_device.h> 16 #include <linux/pinctrl/pinctrl.h> 17 18 #include "pinctrl-imx.h" 19 20 static const struct pinctrl_pin_desc imx8qxp_pinctrl_pads[] = { 21 IMX_PINCTRL_PIN(IMX8QXP_PCIE_CTRL0_PERST_B), 22 IMX_PINCTRL_PIN(IMX8QXP_PCIE_CTRL0_CLKREQ_B), 23 IMX_PINCTRL_PIN(IMX8QXP_PCIE_CTRL0_WAKE_B), 24 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_PCIESEP), 25 IMX_PINCTRL_PIN(IMX8QXP_USB_SS3_TC0), 26 IMX_PINCTRL_PIN(IMX8QXP_USB_SS3_TC1), 27 IMX_PINCTRL_PIN(IMX8QXP_USB_SS3_TC2), 28 IMX_PINCTRL_PIN(IMX8QXP_USB_SS3_TC3), 29 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_3V3_USB3IO), 30 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_CLK), 31 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_CMD), 32 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA0), 33 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA1), 34 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA2), 35 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA3), 36 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_SD1FIX0), 37 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA4), 38 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA5), 39 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA6), 40 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_DATA7), 41 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_STROBE), 42 IMX_PINCTRL_PIN(IMX8QXP_EMMC0_RESET_B), 43 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_SD1FIX1), 44 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_RESET_B), 45 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_VSELECT), 46 IMX_PINCTRL_PIN(IMX8QXP_CTL_NAND_RE_P_N), 47 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_WP), 48 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_CD_B), 49 IMX_PINCTRL_PIN(IMX8QXP_CTL_NAND_DQS_P_N), 50 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_VSELSEP), 51 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_CLK), 52 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_CMD), 53 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_DATA0), 54 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_DATA1), 55 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_DATA2), 56 IMX_PINCTRL_PIN(IMX8QXP_USDHC1_DATA3), 57 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_VSEL3), 58 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXC), 59 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TX_CTL), 60 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXD0), 61 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXD1), 62 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXD2), 63 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_TXD3), 64 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0), 65 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXC), 66 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RX_CTL), 67 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXD0), 68 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXD1), 69 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXD2), 70 IMX_PINCTRL_PIN(IMX8QXP_ENET0_RGMII_RXD3), 71 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1), 72 IMX_PINCTRL_PIN(IMX8QXP_ENET0_REFCLK_125M_25M), 73 IMX_PINCTRL_PIN(IMX8QXP_ENET0_MDIO), 74 IMX_PINCTRL_PIN(IMX8QXP_ENET0_MDC), 75 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIOCT), 76 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_FSR), 77 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_FST), 78 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_SCKR), 79 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_SCKT), 80 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX0), 81 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX1), 82 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX2_RX3), 83 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX3_RX2), 84 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX4_RX1), 85 IMX_PINCTRL_PIN(IMX8QXP_ESAI0_TX5_RX0), 86 IMX_PINCTRL_PIN(IMX8QXP_SPDIF0_RX), 87 IMX_PINCTRL_PIN(IMX8QXP_SPDIF0_TX), 88 IMX_PINCTRL_PIN(IMX8QXP_SPDIF0_EXT_CLK), 89 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHB), 90 IMX_PINCTRL_PIN(IMX8QXP_SPI3_SCK), 91 IMX_PINCTRL_PIN(IMX8QXP_SPI3_SDO), 92 IMX_PINCTRL_PIN(IMX8QXP_SPI3_SDI), 93 IMX_PINCTRL_PIN(IMX8QXP_SPI3_CS0), 94 IMX_PINCTRL_PIN(IMX8QXP_SPI3_CS1), 95 IMX_PINCTRL_PIN(IMX8QXP_MCLK_IN1), 96 IMX_PINCTRL_PIN(IMX8QXP_MCLK_IN0), 97 IMX_PINCTRL_PIN(IMX8QXP_MCLK_OUT0), 98 IMX_PINCTRL_PIN(IMX8QXP_UART1_TX), 99 IMX_PINCTRL_PIN(IMX8QXP_UART1_RX), 100 IMX_PINCTRL_PIN(IMX8QXP_UART1_RTS_B), 101 IMX_PINCTRL_PIN(IMX8QXP_UART1_CTS_B), 102 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHK), 103 IMX_PINCTRL_PIN(IMX8QXP_SAI0_TXD), 104 IMX_PINCTRL_PIN(IMX8QXP_SAI0_TXC), 105 IMX_PINCTRL_PIN(IMX8QXP_SAI0_RXD), 106 IMX_PINCTRL_PIN(IMX8QXP_SAI0_TXFS), 107 IMX_PINCTRL_PIN(IMX8QXP_SAI1_RXD), 108 IMX_PINCTRL_PIN(IMX8QXP_SAI1_RXC), 109 IMX_PINCTRL_PIN(IMX8QXP_SAI1_RXFS), 110 IMX_PINCTRL_PIN(IMX8QXP_SPI2_CS0), 111 IMX_PINCTRL_PIN(IMX8QXP_SPI2_SDO), 112 IMX_PINCTRL_PIN(IMX8QXP_SPI2_SDI), 113 IMX_PINCTRL_PIN(IMX8QXP_SPI2_SCK), 114 IMX_PINCTRL_PIN(IMX8QXP_SPI0_SCK), 115 IMX_PINCTRL_PIN(IMX8QXP_SPI0_SDI), 116 IMX_PINCTRL_PIN(IMX8QXP_SPI0_SDO), 117 IMX_PINCTRL_PIN(IMX8QXP_SPI0_CS1), 118 IMX_PINCTRL_PIN(IMX8QXP_SPI0_CS0), 119 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHT), 120 IMX_PINCTRL_PIN(IMX8QXP_ADC_IN1), 121 IMX_PINCTRL_PIN(IMX8QXP_ADC_IN0), 122 IMX_PINCTRL_PIN(IMX8QXP_ADC_IN3), 123 IMX_PINCTRL_PIN(IMX8QXP_ADC_IN2), 124 IMX_PINCTRL_PIN(IMX8QXP_ADC_IN5), 125 IMX_PINCTRL_PIN(IMX8QXP_ADC_IN4), 126 IMX_PINCTRL_PIN(IMX8QXP_FLEXCAN0_RX), 127 IMX_PINCTRL_PIN(IMX8QXP_FLEXCAN0_TX), 128 IMX_PINCTRL_PIN(IMX8QXP_FLEXCAN1_RX), 129 IMX_PINCTRL_PIN(IMX8QXP_FLEXCAN1_TX), 130 IMX_PINCTRL_PIN(IMX8QXP_FLEXCAN2_RX), 131 IMX_PINCTRL_PIN(IMX8QXP_FLEXCAN2_TX), 132 IMX_PINCTRL_PIN(IMX8QXP_UART0_RX), 133 IMX_PINCTRL_PIN(IMX8QXP_UART0_TX), 134 IMX_PINCTRL_PIN(IMX8QXP_UART2_TX), 135 IMX_PINCTRL_PIN(IMX8QXP_UART2_RX), 136 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIOLH), 137 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI0_I2C0_SCL), 138 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI0_I2C0_SDA), 139 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI0_GPIO0_00), 140 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI0_GPIO0_01), 141 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI1_I2C0_SCL), 142 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI1_I2C0_SDA), 143 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI1_GPIO0_00), 144 IMX_PINCTRL_PIN(IMX8QXP_MIPI_DSI1_GPIO0_01), 145 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGPIO), 146 IMX_PINCTRL_PIN(IMX8QXP_JTAG_TRST_B), 147 IMX_PINCTRL_PIN(IMX8QXP_PMIC_I2C_SCL), 148 IMX_PINCTRL_PIN(IMX8QXP_PMIC_I2C_SDA), 149 IMX_PINCTRL_PIN(IMX8QXP_PMIC_INT_B), 150 IMX_PINCTRL_PIN(IMX8QXP_SCU_GPIO0_00), 151 IMX_PINCTRL_PIN(IMX8QXP_SCU_GPIO0_01), 152 IMX_PINCTRL_PIN(IMX8QXP_SCU_PMIC_STANDBY), 153 IMX_PINCTRL_PIN(IMX8QXP_SCU_BOOT_MODE0), 154 IMX_PINCTRL_PIN(IMX8QXP_SCU_BOOT_MODE1), 155 IMX_PINCTRL_PIN(IMX8QXP_SCU_BOOT_MODE2), 156 IMX_PINCTRL_PIN(IMX8QXP_SCU_BOOT_MODE3), 157 IMX_PINCTRL_PIN(IMX8QXP_CSI_D00), 158 IMX_PINCTRL_PIN(IMX8QXP_CSI_D01), 159 IMX_PINCTRL_PIN(IMX8QXP_CSI_D02), 160 IMX_PINCTRL_PIN(IMX8QXP_CSI_D03), 161 IMX_PINCTRL_PIN(IMX8QXP_CSI_D04), 162 IMX_PINCTRL_PIN(IMX8QXP_CSI_D05), 163 IMX_PINCTRL_PIN(IMX8QXP_CSI_D06), 164 IMX_PINCTRL_PIN(IMX8QXP_CSI_D07), 165 IMX_PINCTRL_PIN(IMX8QXP_CSI_HSYNC), 166 IMX_PINCTRL_PIN(IMX8QXP_CSI_VSYNC), 167 IMX_PINCTRL_PIN(IMX8QXP_CSI_PCLK), 168 IMX_PINCTRL_PIN(IMX8QXP_CSI_MCLK), 169 IMX_PINCTRL_PIN(IMX8QXP_CSI_EN), 170 IMX_PINCTRL_PIN(IMX8QXP_CSI_RESET), 171 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHD), 172 IMX_PINCTRL_PIN(IMX8QXP_MIPI_CSI0_MCLK_OUT), 173 IMX_PINCTRL_PIN(IMX8QXP_MIPI_CSI0_I2C0_SCL), 174 IMX_PINCTRL_PIN(IMX8QXP_MIPI_CSI0_I2C0_SDA), 175 IMX_PINCTRL_PIN(IMX8QXP_MIPI_CSI0_GPIO0_01), 176 IMX_PINCTRL_PIN(IMX8QXP_MIPI_CSI0_GPIO0_00), 177 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_DATA0), 178 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_DATA1), 179 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_DATA2), 180 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_DATA3), 181 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_DQS), 182 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_SS0_B), 183 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_SS1_B), 184 IMX_PINCTRL_PIN(IMX8QXP_QSPI0A_SCLK), 185 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_QSPI0A), 186 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_SCLK), 187 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_DATA0), 188 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_DATA1), 189 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_DATA2), 190 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_DATA3), 191 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_DQS), 192 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_SS0_B), 193 IMX_PINCTRL_PIN(IMX8QXP_QSPI0B_SS1_B), 194 IMX_PINCTRL_PIN(IMX8QXP_COMP_CTL_GPIO_1V8_3V3_QSPI0B), 195 }; 196 197 static const struct imx_pinctrl_soc_info imx8qxp_pinctrl_info = { 198 .pins = imx8qxp_pinctrl_pads, 199 .npins = ARRAY_SIZE(imx8qxp_pinctrl_pads), 200 .flags = IMX_USE_SCU, 201 .imx_pinconf_get = imx_pinconf_get_scu, 202 .imx_pinconf_set = imx_pinconf_set_scu, 203 .imx_pinctrl_parse_pin = imx_pinctrl_parse_pin_scu, 204 }; 205 206 static const struct of_device_id imx8qxp_pinctrl_of_match[] = { 207 { .compatible = "fsl,imx8qxp-iomuxc", }, 208 { /* sentinel */ } 209 }; 210 MODULE_DEVICE_TABLE(of, imx8qxp_pinctrl_of_match); 211 212 static int imx8qxp_pinctrl_probe(struct platform_device *pdev) 213 { 214 int ret; 215 216 ret = imx_pinctrl_sc_ipc_init(pdev); 217 if (ret) 218 return ret; 219 220 return imx_pinctrl_probe(pdev, &imx8qxp_pinctrl_info); 221 } 222 223 static struct platform_driver imx8qxp_pinctrl_driver = { 224 .driver = { 225 .name = "imx8qxp-pinctrl", 226 .of_match_table = imx8qxp_pinctrl_of_match, 227 .suppress_bind_attrs = true, 228 }, 229 .probe = imx8qxp_pinctrl_probe, 230 }; 231 232 static int __init imx8qxp_pinctrl_init(void) 233 { 234 return platform_driver_register(&imx8qxp_pinctrl_driver); 235 } 236 arch_initcall(imx8qxp_pinctrl_init); 237 238 MODULE_AUTHOR("Aisheng Dong <aisheng.dong@nxp.com>"); 239 MODULE_DESCRIPTION("NXP i.MX8QXP pinctrl driver"); 240 MODULE_LICENSE("GPL v2"); 241