1 /*
2  * Freescale imx6sx pinctrl driver
3  *
4  * Author: Anson Huang <Anson.Huang@freescale.com>
5  * Copyright (C) 2014 Freescale Semiconductor, Inc.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11 
12 #include <linux/err.h>
13 #include <linux/init.h>
14 #include <linux/io.h>
15 #include <linux/of.h>
16 #include <linux/of_device.h>
17 #include <linux/pinctrl/pinctrl.h>
18 
19 #include "pinctrl-imx.h"
20 
21 enum imx6sx_pads {
22 	MX6Sx_PAD_RESERVE0 = 0,
23 	MX6Sx_PAD_RESERVE1 = 1,
24 	MX6Sx_PAD_RESERVE2 = 2,
25 	MX6Sx_PAD_RESERVE3 = 3,
26 	MX6Sx_PAD_RESERVE4 = 4,
27 	MX6SX_PAD_GPIO1_IO00 = 5,
28 	MX6SX_PAD_GPIO1_IO01 = 6,
29 	MX6SX_PAD_GPIO1_IO02 = 7,
30 	MX6SX_PAD_GPIO1_IO03 = 8,
31 	MX6SX_PAD_GPIO1_IO04 = 9,
32 	MX6SX_PAD_GPIO1_IO05 = 10,
33 	MX6SX_PAD_GPIO1_IO06 = 11,
34 	MX6SX_PAD_GPIO1_IO07 = 12,
35 	MX6SX_PAD_GPIO1_IO08 = 13,
36 	MX6SX_PAD_GPIO1_IO09 = 14,
37 	MX6SX_PAD_GPIO1_IO10 = 15,
38 	MX6SX_PAD_GPIO1_IO11 = 16,
39 	MX6SX_PAD_GPIO1_IO12 = 17,
40 	MX6SX_PAD_GPIO1_IO13 = 18,
41 	MX6SX_PAD_CSI_DATA00 = 19,
42 	MX6SX_PAD_CSI_DATA01 = 20,
43 	MX6SX_PAD_CSI_DATA02 = 21,
44 	MX6SX_PAD_CSI_DATA03 = 22,
45 	MX6SX_PAD_CSI_DATA04 = 23,
46 	MX6SX_PAD_CSI_DATA05 = 24,
47 	MX6SX_PAD_CSI_DATA06 = 25,
48 	MX6SX_PAD_CSI_DATA07 = 26,
49 	MX6SX_PAD_CSI_HSYNC = 27,
50 	MX6SX_PAD_CSI_MCLK = 28,
51 	MX6SX_PAD_CSI_PIXCLK = 29,
52 	MX6SX_PAD_CSI_VSYNC = 30,
53 	MX6SX_PAD_ENET1_COL = 31,
54 	MX6SX_PAD_ENET1_CRS = 32,
55 	MX6SX_PAD_ENET1_MDC = 33,
56 	MX6SX_PAD_ENET1_MDIO = 34,
57 	MX6SX_PAD_ENET1_RX_CLK = 35,
58 	MX6SX_PAD_ENET1_TX_CLK = 36,
59 	MX6SX_PAD_ENET2_COL = 37,
60 	MX6SX_PAD_ENET2_CRS = 38,
61 	MX6SX_PAD_ENET2_RX_CLK = 39,
62 	MX6SX_PAD_ENET2_TX_CLK = 40,
63 	MX6SX_PAD_KEY_COL0 = 41,
64 	MX6SX_PAD_KEY_COL1 = 42,
65 	MX6SX_PAD_KEY_COL2 = 43,
66 	MX6SX_PAD_KEY_COL3 = 44,
67 	MX6SX_PAD_KEY_COL4 = 45,
68 	MX6SX_PAD_KEY_ROW0 = 46,
69 	MX6SX_PAD_KEY_ROW1 = 47,
70 	MX6SX_PAD_KEY_ROW2 = 48,
71 	MX6SX_PAD_KEY_ROW3 = 49,
72 	MX6SX_PAD_KEY_ROW4 = 50,
73 	MX6SX_PAD_LCD1_CLK = 51,
74 	MX6SX_PAD_LCD1_DATA00 = 52,
75 	MX6SX_PAD_LCD1_DATA01 = 53,
76 	MX6SX_PAD_LCD1_DATA02 = 54,
77 	MX6SX_PAD_LCD1_DATA03 = 55,
78 	MX6SX_PAD_LCD1_DATA04 = 56,
79 	MX6SX_PAD_LCD1_DATA05 = 57,
80 	MX6SX_PAD_LCD1_DATA06 = 58,
81 	MX6SX_PAD_LCD1_DATA07 = 59,
82 	MX6SX_PAD_LCD1_DATA08 = 60,
83 	MX6SX_PAD_LCD1_DATA09 = 61,
84 	MX6SX_PAD_LCD1_DATA10 = 62,
85 	MX6SX_PAD_LCD1_DATA11 = 63,
86 	MX6SX_PAD_LCD1_DATA12 = 64,
87 	MX6SX_PAD_LCD1_DATA13 = 65,
88 	MX6SX_PAD_LCD1_DATA14 = 66,
89 	MX6SX_PAD_LCD1_DATA15 = 67,
90 	MX6SX_PAD_LCD1_DATA16 = 68,
91 	MX6SX_PAD_LCD1_DATA17 = 69,
92 	MX6SX_PAD_LCD1_DATA18 = 70,
93 	MX6SX_PAD_LCD1_DATA19 = 71,
94 	MX6SX_PAD_LCD1_DATA20 = 72,
95 	MX6SX_PAD_LCD1_DATA21 = 73,
96 	MX6SX_PAD_LCD1_DATA22 = 74,
97 	MX6SX_PAD_LCD1_DATA23 = 75,
98 	MX6SX_PAD_LCD1_ENABLE = 76,
99 	MX6SX_PAD_LCD1_HSYNC = 77,
100 	MX6SX_PAD_LCD1_RESET = 78,
101 	MX6SX_PAD_LCD1_VSYNC = 79,
102 	MX6SX_PAD_NAND_ALE = 80,
103 	MX6SX_PAD_NAND_CE0_B = 81,
104 	MX6SX_PAD_NAND_CE1_B = 82,
105 	MX6SX_PAD_NAND_CLE = 83,
106 	MX6SX_PAD_NAND_DATA00 = 84 ,
107 	MX6SX_PAD_NAND_DATA01 = 85,
108 	MX6SX_PAD_NAND_DATA02 = 86,
109 	MX6SX_PAD_NAND_DATA03 = 87,
110 	MX6SX_PAD_NAND_DATA04 = 88,
111 	MX6SX_PAD_NAND_DATA05 = 89,
112 	MX6SX_PAD_NAND_DATA06 = 90,
113 	MX6SX_PAD_NAND_DATA07 = 91,
114 	MX6SX_PAD_NAND_RE_B = 92,
115 	MX6SX_PAD_NAND_READY_B = 93,
116 	MX6SX_PAD_NAND_WE_B = 94,
117 	MX6SX_PAD_NAND_WP_B = 95,
118 	MX6SX_PAD_QSPI1A_DATA0 = 96,
119 	MX6SX_PAD_QSPI1A_DATA1 = 97,
120 	MX6SX_PAD_QSPI1A_DATA2 = 98,
121 	MX6SX_PAD_QSPI1A_DATA3 = 99,
122 	MX6SX_PAD_QSPI1A_DQS = 100,
123 	MX6SX_PAD_QSPI1A_SCLK = 101,
124 	MX6SX_PAD_QSPI1A_SS0_B = 102,
125 	MX6SX_PAD_QSPI1A_SS1_B = 103,
126 	MX6SX_PAD_QSPI1B_DATA0 = 104,
127 	MX6SX_PAD_QSPI1B_DATA1 = 105,
128 	MX6SX_PAD_QSPI1B_DATA2 = 106,
129 	MX6SX_PAD_QSPI1B_DATA3 = 107,
130 	MX6SX_PAD_QSPI1B_DQS = 108,
131 	MX6SX_PAD_QSPI1B_SCLK = 109,
132 	MX6SX_PAD_QSPI1B_SS0_B = 110,
133 	MX6SX_PAD_QSPI1B_SS1_B = 111,
134 	MX6SX_PAD_RGMII1_RD0 = 112,
135 	MX6SX_PAD_RGMII1_RD1 = 113,
136 	MX6SX_PAD_RGMII1_RD2 = 114,
137 	MX6SX_PAD_RGMII1_RD3 = 115,
138 	MX6SX_PAD_RGMII1_RX_CTL = 116,
139 	MX6SX_PAD_RGMII1_RXC = 117,
140 	MX6SX_PAD_RGMII1_TD0 = 118,
141 	MX6SX_PAD_RGMII1_TD1 = 119,
142 	MX6SX_PAD_RGMII1_TD2 = 120,
143 	MX6SX_PAD_RGMII1_TD3 = 121,
144 	MX6SX_PAD_RGMII1_TX_CTL = 122,
145 	MX6SX_PAD_RGMII1_TXC = 123,
146 	MX6SX_PAD_RGMII2_RD0 = 124,
147 	MX6SX_PAD_RGMII2_RD1 = 125,
148 	MX6SX_PAD_RGMII2_RD2 = 126,
149 	MX6SX_PAD_RGMII2_RD3 = 127,
150 	MX6SX_PAD_RGMII2_RX_CTL = 128,
151 	MX6SX_PAD_RGMII2_RXC = 129,
152 	MX6SX_PAD_RGMII2_TD0 = 130,
153 	MX6SX_PAD_RGMII2_TD1 = 131,
154 	MX6SX_PAD_RGMII2_TD2 = 132,
155 	MX6SX_PAD_RGMII2_TD3 = 133,
156 	MX6SX_PAD_RGMII2_TX_CTL = 134,
157 	MX6SX_PAD_RGMII2_TXC = 135,
158 	MX6SX_PAD_SD1_CLK = 136,
159 	MX6SX_PAD_SD1_CMD = 137,
160 	MX6SX_PAD_SD1_DATA0 = 138,
161 	MX6SX_PAD_SD1_DATA1 = 139,
162 	MX6SX_PAD_SD1_DATA2 = 140,
163 	MX6SX_PAD_SD1_DATA3 = 141,
164 	MX6SX_PAD_SD2_CLK = 142,
165 	MX6SX_PAD_SD2_CMD = 143,
166 	MX6SX_PAD_SD2_DATA0 = 144,
167 	MX6SX_PAD_SD2_DATA1 = 145,
168 	MX6SX_PAD_SD2_DATA2 = 146,
169 	MX6SX_PAD_SD2_DATA3 = 147,
170 	MX6SX_PAD_SD3_CLK = 148,
171 	MX6SX_PAD_SD3_CMD = 149,
172 	MX6SX_PAD_SD3_DATA0 = 150,
173 	MX6SX_PAD_SD3_DATA1 = 151,
174 	MX6SX_PAD_SD3_DATA2 = 152,
175 	MX6SX_PAD_SD3_DATA3 = 153,
176 	MX6SX_PAD_SD3_DATA4 = 154,
177 	MX6SX_PAD_SD3_DATA5 = 155,
178 	MX6SX_PAD_SD3_DATA6 = 156,
179 	MX6SX_PAD_SD3_DATA7 = 157,
180 	MX6SX_PAD_SD4_CLK = 158,
181 	MX6SX_PAD_SD4_CMD = 159,
182 	MX6SX_PAD_SD4_DATA0 = 160,
183 	MX6SX_PAD_SD4_DATA1 = 161,
184 	MX6SX_PAD_SD4_DATA2 = 162,
185 	MX6SX_PAD_SD4_DATA3 = 163,
186 	MX6SX_PAD_SD4_DATA4 = 164,
187 	MX6SX_PAD_SD4_DATA5 = 165,
188 	MX6SX_PAD_SD4_DATA6 = 166,
189 	MX6SX_PAD_SD4_DATA7 = 167,
190 	MX6SX_PAD_SD4_RESET_B = 168,
191 	MX6SX_PAD_USB_H_DATA = 169,
192 	MX6SX_PAD_USB_H_STROBE = 170,
193 };
194 
195 /* Pad names for the pinmux subsystem */
196 static const struct pinctrl_pin_desc imx6sx_pinctrl_pads[] = {
197 	IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE0),
198 	IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE1),
199 	IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE2),
200 	IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE3),
201 	IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE4),
202 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO00),
203 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO01),
204 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO02),
205 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO03),
206 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO04),
207 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO05),
208 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO06),
209 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO07),
210 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO08),
211 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO09),
212 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO10),
213 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO11),
214 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO12),
215 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO13),
216 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA00),
217 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA01),
218 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA02),
219 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA03),
220 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA04),
221 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA05),
222 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA06),
223 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA07),
224 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_HSYNC),
225 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_MCLK),
226 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_PIXCLK),
227 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_VSYNC),
228 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_COL),
229 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_CRS),
230 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_MDC),
231 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_MDIO),
232 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_RX_CLK),
233 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_TX_CLK),
234 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_COL),
235 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_CRS),
236 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_RX_CLK),
237 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_TX_CLK),
238 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL0),
239 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL1),
240 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL2),
241 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL3),
242 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL4),
243 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW0),
244 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW1),
245 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW2),
246 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW3),
247 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW4),
248 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_CLK),
249 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA00),
250 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA01),
251 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA02),
252 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA03),
253 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA04),
254 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA05),
255 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA06),
256 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA07),
257 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA08),
258 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA09),
259 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA10),
260 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA11),
261 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA12),
262 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA13),
263 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA14),
264 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA15),
265 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA16),
266 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA17),
267 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA18),
268 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA19),
269 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA20),
270 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA21),
271 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA22),
272 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA23),
273 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_ENABLE),
274 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_HSYNC),
275 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_RESET),
276 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_VSYNC),
277 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_ALE),
278 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CE0_B),
279 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CE1_B),
280 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CLE),
281 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA00),
282 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA01),
283 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA02),
284 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA03),
285 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA04),
286 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA05),
287 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA06),
288 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA07),
289 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_RE_B),
290 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_READY_B),
291 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_WE_B),
292 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_WP_B),
293 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA0),
294 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA1),
295 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA2),
296 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA3),
297 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DQS),
298 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SCLK),
299 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SS0_B),
300 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SS1_B),
301 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA0),
302 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA1),
303 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA2),
304 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA3),
305 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DQS),
306 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SCLK),
307 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SS0_B),
308 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SS1_B),
309 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD0),
310 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD1),
311 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD2),
312 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD3),
313 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RX_CTL),
314 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RXC),
315 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD0),
316 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD1),
317 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD2),
318 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD3),
319 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TX_CTL),
320 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TXC),
321 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD0),
322 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD1),
323 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD2),
324 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD3),
325 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RX_CTL),
326 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RXC),
327 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD0),
328 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD1),
329 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD2),
330 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD3),
331 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TX_CTL),
332 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TXC),
333 	IMX_PINCTRL_PIN(MX6SX_PAD_SD1_CLK),
334 	IMX_PINCTRL_PIN(MX6SX_PAD_SD1_CMD),
335 	IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA0),
336 	IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA1),
337 	IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA2),
338 	IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA3),
339 	IMX_PINCTRL_PIN(MX6SX_PAD_SD2_CLK),
340 	IMX_PINCTRL_PIN(MX6SX_PAD_SD2_CMD),
341 	IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA0),
342 	IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA1),
343 	IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA2),
344 	IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA3),
345 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_CLK),
346 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_CMD),
347 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA0),
348 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA1),
349 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA2),
350 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA3),
351 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA4),
352 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA5),
353 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA6),
354 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA7),
355 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_CLK),
356 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_CMD),
357 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA0),
358 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA1),
359 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA2),
360 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA3),
361 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA4),
362 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA5),
363 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA6),
364 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA7),
365 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_RESET_B),
366 	IMX_PINCTRL_PIN(MX6SX_PAD_USB_H_DATA),
367 	IMX_PINCTRL_PIN(MX6SX_PAD_USB_H_STROBE),
368 };
369 
370 static struct imx_pinctrl_soc_info imx6sx_pinctrl_info = {
371 	.pins = imx6sx_pinctrl_pads,
372 	.npins = ARRAY_SIZE(imx6sx_pinctrl_pads),
373 	.gpr_compatible = "fsl,imx6sx-iomuxc-gpr",
374 };
375 
376 static const struct of_device_id imx6sx_pinctrl_of_match[] = {
377 	{ .compatible = "fsl,imx6sx-iomuxc", },
378 	{ /* sentinel */ }
379 };
380 
381 static int imx6sx_pinctrl_probe(struct platform_device *pdev)
382 {
383 	return imx_pinctrl_probe(pdev, &imx6sx_pinctrl_info);
384 }
385 
386 static struct platform_driver imx6sx_pinctrl_driver = {
387 	.driver = {
388 		.name = "imx6sx-pinctrl",
389 		.of_match_table = of_match_ptr(imx6sx_pinctrl_of_match),
390 	},
391 	.probe = imx6sx_pinctrl_probe,
392 };
393 
394 static int __init imx6sx_pinctrl_init(void)
395 {
396 	return platform_driver_register(&imx6sx_pinctrl_driver);
397 }
398 arch_initcall(imx6sx_pinctrl_init);
399