1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Freescale imx6sx pinctrl driver 4 // 5 // Author: Anson Huang <Anson.Huang@freescale.com> 6 // Copyright (C) 2014 Freescale Semiconductor, Inc. 7 8 #include <linux/err.h> 9 #include <linux/init.h> 10 #include <linux/io.h> 11 #include <linux/mod_devicetable.h> 12 #include <linux/platform_device.h> 13 #include <linux/pinctrl/pinctrl.h> 14 15 #include "pinctrl-imx.h" 16 17 enum imx6sx_pads { 18 MX6Sx_PAD_RESERVE0 = 0, 19 MX6Sx_PAD_RESERVE1 = 1, 20 MX6Sx_PAD_RESERVE2 = 2, 21 MX6Sx_PAD_RESERVE3 = 3, 22 MX6Sx_PAD_RESERVE4 = 4, 23 MX6SX_PAD_GPIO1_IO00 = 5, 24 MX6SX_PAD_GPIO1_IO01 = 6, 25 MX6SX_PAD_GPIO1_IO02 = 7, 26 MX6SX_PAD_GPIO1_IO03 = 8, 27 MX6SX_PAD_GPIO1_IO04 = 9, 28 MX6SX_PAD_GPIO1_IO05 = 10, 29 MX6SX_PAD_GPIO1_IO06 = 11, 30 MX6SX_PAD_GPIO1_IO07 = 12, 31 MX6SX_PAD_GPIO1_IO08 = 13, 32 MX6SX_PAD_GPIO1_IO09 = 14, 33 MX6SX_PAD_GPIO1_IO10 = 15, 34 MX6SX_PAD_GPIO1_IO11 = 16, 35 MX6SX_PAD_GPIO1_IO12 = 17, 36 MX6SX_PAD_GPIO1_IO13 = 18, 37 MX6SX_PAD_CSI_DATA00 = 19, 38 MX6SX_PAD_CSI_DATA01 = 20, 39 MX6SX_PAD_CSI_DATA02 = 21, 40 MX6SX_PAD_CSI_DATA03 = 22, 41 MX6SX_PAD_CSI_DATA04 = 23, 42 MX6SX_PAD_CSI_DATA05 = 24, 43 MX6SX_PAD_CSI_DATA06 = 25, 44 MX6SX_PAD_CSI_DATA07 = 26, 45 MX6SX_PAD_CSI_HSYNC = 27, 46 MX6SX_PAD_CSI_MCLK = 28, 47 MX6SX_PAD_CSI_PIXCLK = 29, 48 MX6SX_PAD_CSI_VSYNC = 30, 49 MX6SX_PAD_ENET1_COL = 31, 50 MX6SX_PAD_ENET1_CRS = 32, 51 MX6SX_PAD_ENET1_MDC = 33, 52 MX6SX_PAD_ENET1_MDIO = 34, 53 MX6SX_PAD_ENET1_RX_CLK = 35, 54 MX6SX_PAD_ENET1_TX_CLK = 36, 55 MX6SX_PAD_ENET2_COL = 37, 56 MX6SX_PAD_ENET2_CRS = 38, 57 MX6SX_PAD_ENET2_RX_CLK = 39, 58 MX6SX_PAD_ENET2_TX_CLK = 40, 59 MX6SX_PAD_KEY_COL0 = 41, 60 MX6SX_PAD_KEY_COL1 = 42, 61 MX6SX_PAD_KEY_COL2 = 43, 62 MX6SX_PAD_KEY_COL3 = 44, 63 MX6SX_PAD_KEY_COL4 = 45, 64 MX6SX_PAD_KEY_ROW0 = 46, 65 MX6SX_PAD_KEY_ROW1 = 47, 66 MX6SX_PAD_KEY_ROW2 = 48, 67 MX6SX_PAD_KEY_ROW3 = 49, 68 MX6SX_PAD_KEY_ROW4 = 50, 69 MX6SX_PAD_LCD1_CLK = 51, 70 MX6SX_PAD_LCD1_DATA00 = 52, 71 MX6SX_PAD_LCD1_DATA01 = 53, 72 MX6SX_PAD_LCD1_DATA02 = 54, 73 MX6SX_PAD_LCD1_DATA03 = 55, 74 MX6SX_PAD_LCD1_DATA04 = 56, 75 MX6SX_PAD_LCD1_DATA05 = 57, 76 MX6SX_PAD_LCD1_DATA06 = 58, 77 MX6SX_PAD_LCD1_DATA07 = 59, 78 MX6SX_PAD_LCD1_DATA08 = 60, 79 MX6SX_PAD_LCD1_DATA09 = 61, 80 MX6SX_PAD_LCD1_DATA10 = 62, 81 MX6SX_PAD_LCD1_DATA11 = 63, 82 MX6SX_PAD_LCD1_DATA12 = 64, 83 MX6SX_PAD_LCD1_DATA13 = 65, 84 MX6SX_PAD_LCD1_DATA14 = 66, 85 MX6SX_PAD_LCD1_DATA15 = 67, 86 MX6SX_PAD_LCD1_DATA16 = 68, 87 MX6SX_PAD_LCD1_DATA17 = 69, 88 MX6SX_PAD_LCD1_DATA18 = 70, 89 MX6SX_PAD_LCD1_DATA19 = 71, 90 MX6SX_PAD_LCD1_DATA20 = 72, 91 MX6SX_PAD_LCD1_DATA21 = 73, 92 MX6SX_PAD_LCD1_DATA22 = 74, 93 MX6SX_PAD_LCD1_DATA23 = 75, 94 MX6SX_PAD_LCD1_ENABLE = 76, 95 MX6SX_PAD_LCD1_HSYNC = 77, 96 MX6SX_PAD_LCD1_RESET = 78, 97 MX6SX_PAD_LCD1_VSYNC = 79, 98 MX6SX_PAD_NAND_ALE = 80, 99 MX6SX_PAD_NAND_CE0_B = 81, 100 MX6SX_PAD_NAND_CE1_B = 82, 101 MX6SX_PAD_NAND_CLE = 83, 102 MX6SX_PAD_NAND_DATA00 = 84 , 103 MX6SX_PAD_NAND_DATA01 = 85, 104 MX6SX_PAD_NAND_DATA02 = 86, 105 MX6SX_PAD_NAND_DATA03 = 87, 106 MX6SX_PAD_NAND_DATA04 = 88, 107 MX6SX_PAD_NAND_DATA05 = 89, 108 MX6SX_PAD_NAND_DATA06 = 90, 109 MX6SX_PAD_NAND_DATA07 = 91, 110 MX6SX_PAD_NAND_RE_B = 92, 111 MX6SX_PAD_NAND_READY_B = 93, 112 MX6SX_PAD_NAND_WE_B = 94, 113 MX6SX_PAD_NAND_WP_B = 95, 114 MX6SX_PAD_QSPI1A_DATA0 = 96, 115 MX6SX_PAD_QSPI1A_DATA1 = 97, 116 MX6SX_PAD_QSPI1A_DATA2 = 98, 117 MX6SX_PAD_QSPI1A_DATA3 = 99, 118 MX6SX_PAD_QSPI1A_DQS = 100, 119 MX6SX_PAD_QSPI1A_SCLK = 101, 120 MX6SX_PAD_QSPI1A_SS0_B = 102, 121 MX6SX_PAD_QSPI1A_SS1_B = 103, 122 MX6SX_PAD_QSPI1B_DATA0 = 104, 123 MX6SX_PAD_QSPI1B_DATA1 = 105, 124 MX6SX_PAD_QSPI1B_DATA2 = 106, 125 MX6SX_PAD_QSPI1B_DATA3 = 107, 126 MX6SX_PAD_QSPI1B_DQS = 108, 127 MX6SX_PAD_QSPI1B_SCLK = 109, 128 MX6SX_PAD_QSPI1B_SS0_B = 110, 129 MX6SX_PAD_QSPI1B_SS1_B = 111, 130 MX6SX_PAD_RGMII1_RD0 = 112, 131 MX6SX_PAD_RGMII1_RD1 = 113, 132 MX6SX_PAD_RGMII1_RD2 = 114, 133 MX6SX_PAD_RGMII1_RD3 = 115, 134 MX6SX_PAD_RGMII1_RX_CTL = 116, 135 MX6SX_PAD_RGMII1_RXC = 117, 136 MX6SX_PAD_RGMII1_TD0 = 118, 137 MX6SX_PAD_RGMII1_TD1 = 119, 138 MX6SX_PAD_RGMII1_TD2 = 120, 139 MX6SX_PAD_RGMII1_TD3 = 121, 140 MX6SX_PAD_RGMII1_TX_CTL = 122, 141 MX6SX_PAD_RGMII1_TXC = 123, 142 MX6SX_PAD_RGMII2_RD0 = 124, 143 MX6SX_PAD_RGMII2_RD1 = 125, 144 MX6SX_PAD_RGMII2_RD2 = 126, 145 MX6SX_PAD_RGMII2_RD3 = 127, 146 MX6SX_PAD_RGMII2_RX_CTL = 128, 147 MX6SX_PAD_RGMII2_RXC = 129, 148 MX6SX_PAD_RGMII2_TD0 = 130, 149 MX6SX_PAD_RGMII2_TD1 = 131, 150 MX6SX_PAD_RGMII2_TD2 = 132, 151 MX6SX_PAD_RGMII2_TD3 = 133, 152 MX6SX_PAD_RGMII2_TX_CTL = 134, 153 MX6SX_PAD_RGMII2_TXC = 135, 154 MX6SX_PAD_SD1_CLK = 136, 155 MX6SX_PAD_SD1_CMD = 137, 156 MX6SX_PAD_SD1_DATA0 = 138, 157 MX6SX_PAD_SD1_DATA1 = 139, 158 MX6SX_PAD_SD1_DATA2 = 140, 159 MX6SX_PAD_SD1_DATA3 = 141, 160 MX6SX_PAD_SD2_CLK = 142, 161 MX6SX_PAD_SD2_CMD = 143, 162 MX6SX_PAD_SD2_DATA0 = 144, 163 MX6SX_PAD_SD2_DATA1 = 145, 164 MX6SX_PAD_SD2_DATA2 = 146, 165 MX6SX_PAD_SD2_DATA3 = 147, 166 MX6SX_PAD_SD3_CLK = 148, 167 MX6SX_PAD_SD3_CMD = 149, 168 MX6SX_PAD_SD3_DATA0 = 150, 169 MX6SX_PAD_SD3_DATA1 = 151, 170 MX6SX_PAD_SD3_DATA2 = 152, 171 MX6SX_PAD_SD3_DATA3 = 153, 172 MX6SX_PAD_SD3_DATA4 = 154, 173 MX6SX_PAD_SD3_DATA5 = 155, 174 MX6SX_PAD_SD3_DATA6 = 156, 175 MX6SX_PAD_SD3_DATA7 = 157, 176 MX6SX_PAD_SD4_CLK = 158, 177 MX6SX_PAD_SD4_CMD = 159, 178 MX6SX_PAD_SD4_DATA0 = 160, 179 MX6SX_PAD_SD4_DATA1 = 161, 180 MX6SX_PAD_SD4_DATA2 = 162, 181 MX6SX_PAD_SD4_DATA3 = 163, 182 MX6SX_PAD_SD4_DATA4 = 164, 183 MX6SX_PAD_SD4_DATA5 = 165, 184 MX6SX_PAD_SD4_DATA6 = 166, 185 MX6SX_PAD_SD4_DATA7 = 167, 186 MX6SX_PAD_SD4_RESET_B = 168, 187 MX6SX_PAD_USB_H_DATA = 169, 188 MX6SX_PAD_USB_H_STROBE = 170, 189 }; 190 191 /* Pad names for the pinmux subsystem */ 192 static const struct pinctrl_pin_desc imx6sx_pinctrl_pads[] = { 193 IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE0), 194 IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE1), 195 IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE2), 196 IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE3), 197 IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE4), 198 IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO00), 199 IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO01), 200 IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO02), 201 IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO03), 202 IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO04), 203 IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO05), 204 IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO06), 205 IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO07), 206 IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO08), 207 IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO09), 208 IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO10), 209 IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO11), 210 IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO12), 211 IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO13), 212 IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA00), 213 IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA01), 214 IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA02), 215 IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA03), 216 IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA04), 217 IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA05), 218 IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA06), 219 IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA07), 220 IMX_PINCTRL_PIN(MX6SX_PAD_CSI_HSYNC), 221 IMX_PINCTRL_PIN(MX6SX_PAD_CSI_MCLK), 222 IMX_PINCTRL_PIN(MX6SX_PAD_CSI_PIXCLK), 223 IMX_PINCTRL_PIN(MX6SX_PAD_CSI_VSYNC), 224 IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_COL), 225 IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_CRS), 226 IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_MDC), 227 IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_MDIO), 228 IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_RX_CLK), 229 IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_TX_CLK), 230 IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_COL), 231 IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_CRS), 232 IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_RX_CLK), 233 IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_TX_CLK), 234 IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL0), 235 IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL1), 236 IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL2), 237 IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL3), 238 IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL4), 239 IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW0), 240 IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW1), 241 IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW2), 242 IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW3), 243 IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW4), 244 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_CLK), 245 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA00), 246 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA01), 247 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA02), 248 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA03), 249 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA04), 250 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA05), 251 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA06), 252 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA07), 253 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA08), 254 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA09), 255 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA10), 256 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA11), 257 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA12), 258 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA13), 259 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA14), 260 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA15), 261 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA16), 262 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA17), 263 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA18), 264 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA19), 265 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA20), 266 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA21), 267 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA22), 268 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA23), 269 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_ENABLE), 270 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_HSYNC), 271 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_RESET), 272 IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_VSYNC), 273 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_ALE), 274 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CE0_B), 275 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CE1_B), 276 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CLE), 277 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA00), 278 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA01), 279 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA02), 280 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA03), 281 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA04), 282 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA05), 283 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA06), 284 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA07), 285 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_RE_B), 286 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_READY_B), 287 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_WE_B), 288 IMX_PINCTRL_PIN(MX6SX_PAD_NAND_WP_B), 289 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA0), 290 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA1), 291 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA2), 292 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA3), 293 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DQS), 294 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SCLK), 295 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SS0_B), 296 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SS1_B), 297 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA0), 298 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA1), 299 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA2), 300 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA3), 301 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DQS), 302 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SCLK), 303 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SS0_B), 304 IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SS1_B), 305 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD0), 306 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD1), 307 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD2), 308 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD3), 309 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RX_CTL), 310 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RXC), 311 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD0), 312 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD1), 313 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD2), 314 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD3), 315 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TX_CTL), 316 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TXC), 317 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD0), 318 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD1), 319 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD2), 320 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD3), 321 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RX_CTL), 322 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RXC), 323 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD0), 324 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD1), 325 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD2), 326 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD3), 327 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TX_CTL), 328 IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TXC), 329 IMX_PINCTRL_PIN(MX6SX_PAD_SD1_CLK), 330 IMX_PINCTRL_PIN(MX6SX_PAD_SD1_CMD), 331 IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA0), 332 IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA1), 333 IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA2), 334 IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA3), 335 IMX_PINCTRL_PIN(MX6SX_PAD_SD2_CLK), 336 IMX_PINCTRL_PIN(MX6SX_PAD_SD2_CMD), 337 IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA0), 338 IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA1), 339 IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA2), 340 IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA3), 341 IMX_PINCTRL_PIN(MX6SX_PAD_SD3_CLK), 342 IMX_PINCTRL_PIN(MX6SX_PAD_SD3_CMD), 343 IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA0), 344 IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA1), 345 IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA2), 346 IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA3), 347 IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA4), 348 IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA5), 349 IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA6), 350 IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA7), 351 IMX_PINCTRL_PIN(MX6SX_PAD_SD4_CLK), 352 IMX_PINCTRL_PIN(MX6SX_PAD_SD4_CMD), 353 IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA0), 354 IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA1), 355 IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA2), 356 IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA3), 357 IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA4), 358 IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA5), 359 IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA6), 360 IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA7), 361 IMX_PINCTRL_PIN(MX6SX_PAD_SD4_RESET_B), 362 IMX_PINCTRL_PIN(MX6SX_PAD_USB_H_DATA), 363 IMX_PINCTRL_PIN(MX6SX_PAD_USB_H_STROBE), 364 }; 365 366 static const struct imx_pinctrl_soc_info imx6sx_pinctrl_info = { 367 .pins = imx6sx_pinctrl_pads, 368 .npins = ARRAY_SIZE(imx6sx_pinctrl_pads), 369 .gpr_compatible = "fsl,imx6sx-iomuxc-gpr", 370 }; 371 372 static const struct of_device_id imx6sx_pinctrl_of_match[] = { 373 { .compatible = "fsl,imx6sx-iomuxc", }, 374 { /* sentinel */ } 375 }; 376 377 static int imx6sx_pinctrl_probe(struct platform_device *pdev) 378 { 379 return imx_pinctrl_probe(pdev, &imx6sx_pinctrl_info); 380 } 381 382 static struct platform_driver imx6sx_pinctrl_driver = { 383 .driver = { 384 .name = "imx6sx-pinctrl", 385 .of_match_table = imx6sx_pinctrl_of_match, 386 .suppress_bind_attrs = true, 387 }, 388 .probe = imx6sx_pinctrl_probe, 389 }; 390 391 static int __init imx6sx_pinctrl_init(void) 392 { 393 return platform_driver_register(&imx6sx_pinctrl_driver); 394 } 395 arch_initcall(imx6sx_pinctrl_init); 396