1 /* 2 * imx6q pinctrl driver based on imx pinmux core 3 * 4 * Copyright (C) 2012 Freescale Semiconductor, Inc. 5 * Copyright (C) 2012 Linaro, Inc. 6 * 7 * Author: Dong Aisheng <dong.aisheng@linaro.org> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 */ 14 15 #include <linux/err.h> 16 #include <linux/init.h> 17 #include <linux/io.h> 18 #include <linux/of.h> 19 #include <linux/of_device.h> 20 #include <linux/pinctrl/pinctrl.h> 21 22 #include "pinctrl-imx.h" 23 24 enum imx6q_pads { 25 MX6Q_PAD_RESERVE0 = 0, 26 MX6Q_PAD_RESERVE1 = 1, 27 MX6Q_PAD_RESERVE2 = 2, 28 MX6Q_PAD_RESERVE3 = 3, 29 MX6Q_PAD_RESERVE4 = 4, 30 MX6Q_PAD_RESERVE5 = 5, 31 MX6Q_PAD_RESERVE6 = 6, 32 MX6Q_PAD_RESERVE7 = 7, 33 MX6Q_PAD_RESERVE8 = 8, 34 MX6Q_PAD_RESERVE9 = 9, 35 MX6Q_PAD_RESERVE10 = 10, 36 MX6Q_PAD_RESERVE11 = 11, 37 MX6Q_PAD_RESERVE12 = 12, 38 MX6Q_PAD_RESERVE13 = 13, 39 MX6Q_PAD_RESERVE14 = 14, 40 MX6Q_PAD_RESERVE15 = 15, 41 MX6Q_PAD_RESERVE16 = 16, 42 MX6Q_PAD_RESERVE17 = 17, 43 MX6Q_PAD_RESERVE18 = 18, 44 MX6Q_PAD_SD2_DAT1 = 19, 45 MX6Q_PAD_SD2_DAT2 = 20, 46 MX6Q_PAD_SD2_DAT0 = 21, 47 MX6Q_PAD_RGMII_TXC = 22, 48 MX6Q_PAD_RGMII_TD0 = 23, 49 MX6Q_PAD_RGMII_TD1 = 24, 50 MX6Q_PAD_RGMII_TD2 = 25, 51 MX6Q_PAD_RGMII_TD3 = 26, 52 MX6Q_PAD_RGMII_RX_CTL = 27, 53 MX6Q_PAD_RGMII_RD0 = 28, 54 MX6Q_PAD_RGMII_TX_CTL = 29, 55 MX6Q_PAD_RGMII_RD1 = 30, 56 MX6Q_PAD_RGMII_RD2 = 31, 57 MX6Q_PAD_RGMII_RD3 = 32, 58 MX6Q_PAD_RGMII_RXC = 33, 59 MX6Q_PAD_EIM_A25 = 34, 60 MX6Q_PAD_EIM_EB2 = 35, 61 MX6Q_PAD_EIM_D16 = 36, 62 MX6Q_PAD_EIM_D17 = 37, 63 MX6Q_PAD_EIM_D18 = 38, 64 MX6Q_PAD_EIM_D19 = 39, 65 MX6Q_PAD_EIM_D20 = 40, 66 MX6Q_PAD_EIM_D21 = 41, 67 MX6Q_PAD_EIM_D22 = 42, 68 MX6Q_PAD_EIM_D23 = 43, 69 MX6Q_PAD_EIM_EB3 = 44, 70 MX6Q_PAD_EIM_D24 = 45, 71 MX6Q_PAD_EIM_D25 = 46, 72 MX6Q_PAD_EIM_D26 = 47, 73 MX6Q_PAD_EIM_D27 = 48, 74 MX6Q_PAD_EIM_D28 = 49, 75 MX6Q_PAD_EIM_D29 = 50, 76 MX6Q_PAD_EIM_D30 = 51, 77 MX6Q_PAD_EIM_D31 = 52, 78 MX6Q_PAD_EIM_A24 = 53, 79 MX6Q_PAD_EIM_A23 = 54, 80 MX6Q_PAD_EIM_A22 = 55, 81 MX6Q_PAD_EIM_A21 = 56, 82 MX6Q_PAD_EIM_A20 = 57, 83 MX6Q_PAD_EIM_A19 = 58, 84 MX6Q_PAD_EIM_A18 = 59, 85 MX6Q_PAD_EIM_A17 = 60, 86 MX6Q_PAD_EIM_A16 = 61, 87 MX6Q_PAD_EIM_CS0 = 62, 88 MX6Q_PAD_EIM_CS1 = 63, 89 MX6Q_PAD_EIM_OE = 64, 90 MX6Q_PAD_EIM_RW = 65, 91 MX6Q_PAD_EIM_LBA = 66, 92 MX6Q_PAD_EIM_EB0 = 67, 93 MX6Q_PAD_EIM_EB1 = 68, 94 MX6Q_PAD_EIM_DA0 = 69, 95 MX6Q_PAD_EIM_DA1 = 70, 96 MX6Q_PAD_EIM_DA2 = 71, 97 MX6Q_PAD_EIM_DA3 = 72, 98 MX6Q_PAD_EIM_DA4 = 73, 99 MX6Q_PAD_EIM_DA5 = 74, 100 MX6Q_PAD_EIM_DA6 = 75, 101 MX6Q_PAD_EIM_DA7 = 76, 102 MX6Q_PAD_EIM_DA8 = 77, 103 MX6Q_PAD_EIM_DA9 = 78, 104 MX6Q_PAD_EIM_DA10 = 79, 105 MX6Q_PAD_EIM_DA11 = 80, 106 MX6Q_PAD_EIM_DA12 = 81, 107 MX6Q_PAD_EIM_DA13 = 82, 108 MX6Q_PAD_EIM_DA14 = 83, 109 MX6Q_PAD_EIM_DA15 = 84, 110 MX6Q_PAD_EIM_WAIT = 85, 111 MX6Q_PAD_EIM_BCLK = 86, 112 MX6Q_PAD_DI0_DISP_CLK = 87, 113 MX6Q_PAD_DI0_PIN15 = 88, 114 MX6Q_PAD_DI0_PIN2 = 89, 115 MX6Q_PAD_DI0_PIN3 = 90, 116 MX6Q_PAD_DI0_PIN4 = 91, 117 MX6Q_PAD_DISP0_DAT0 = 92, 118 MX6Q_PAD_DISP0_DAT1 = 93, 119 MX6Q_PAD_DISP0_DAT2 = 94, 120 MX6Q_PAD_DISP0_DAT3 = 95, 121 MX6Q_PAD_DISP0_DAT4 = 96, 122 MX6Q_PAD_DISP0_DAT5 = 97, 123 MX6Q_PAD_DISP0_DAT6 = 98, 124 MX6Q_PAD_DISP0_DAT7 = 99, 125 MX6Q_PAD_DISP0_DAT8 = 100, 126 MX6Q_PAD_DISP0_DAT9 = 101, 127 MX6Q_PAD_DISP0_DAT10 = 102, 128 MX6Q_PAD_DISP0_DAT11 = 103, 129 MX6Q_PAD_DISP0_DAT12 = 104, 130 MX6Q_PAD_DISP0_DAT13 = 105, 131 MX6Q_PAD_DISP0_DAT14 = 106, 132 MX6Q_PAD_DISP0_DAT15 = 107, 133 MX6Q_PAD_DISP0_DAT16 = 108, 134 MX6Q_PAD_DISP0_DAT17 = 109, 135 MX6Q_PAD_DISP0_DAT18 = 110, 136 MX6Q_PAD_DISP0_DAT19 = 111, 137 MX6Q_PAD_DISP0_DAT20 = 112, 138 MX6Q_PAD_DISP0_DAT21 = 113, 139 MX6Q_PAD_DISP0_DAT22 = 114, 140 MX6Q_PAD_DISP0_DAT23 = 115, 141 MX6Q_PAD_ENET_MDIO = 116, 142 MX6Q_PAD_ENET_REF_CLK = 117, 143 MX6Q_PAD_ENET_RX_ER = 118, 144 MX6Q_PAD_ENET_CRS_DV = 119, 145 MX6Q_PAD_ENET_RXD1 = 120, 146 MX6Q_PAD_ENET_RXD0 = 121, 147 MX6Q_PAD_ENET_TX_EN = 122, 148 MX6Q_PAD_ENET_TXD1 = 123, 149 MX6Q_PAD_ENET_TXD0 = 124, 150 MX6Q_PAD_ENET_MDC = 125, 151 MX6Q_PAD_KEY_COL0 = 126, 152 MX6Q_PAD_KEY_ROW0 = 127, 153 MX6Q_PAD_KEY_COL1 = 128, 154 MX6Q_PAD_KEY_ROW1 = 129, 155 MX6Q_PAD_KEY_COL2 = 130, 156 MX6Q_PAD_KEY_ROW2 = 131, 157 MX6Q_PAD_KEY_COL3 = 132, 158 MX6Q_PAD_KEY_ROW3 = 133, 159 MX6Q_PAD_KEY_COL4 = 134, 160 MX6Q_PAD_KEY_ROW4 = 135, 161 MX6Q_PAD_GPIO_0 = 136, 162 MX6Q_PAD_GPIO_1 = 137, 163 MX6Q_PAD_GPIO_9 = 138, 164 MX6Q_PAD_GPIO_3 = 139, 165 MX6Q_PAD_GPIO_6 = 140, 166 MX6Q_PAD_GPIO_2 = 141, 167 MX6Q_PAD_GPIO_4 = 142, 168 MX6Q_PAD_GPIO_5 = 143, 169 MX6Q_PAD_GPIO_7 = 144, 170 MX6Q_PAD_GPIO_8 = 145, 171 MX6Q_PAD_GPIO_16 = 146, 172 MX6Q_PAD_GPIO_17 = 147, 173 MX6Q_PAD_GPIO_18 = 148, 174 MX6Q_PAD_GPIO_19 = 149, 175 MX6Q_PAD_CSI0_PIXCLK = 150, 176 MX6Q_PAD_CSI0_MCLK = 151, 177 MX6Q_PAD_CSI0_DATA_EN = 152, 178 MX6Q_PAD_CSI0_VSYNC = 153, 179 MX6Q_PAD_CSI0_DAT4 = 154, 180 MX6Q_PAD_CSI0_DAT5 = 155, 181 MX6Q_PAD_CSI0_DAT6 = 156, 182 MX6Q_PAD_CSI0_DAT7 = 157, 183 MX6Q_PAD_CSI0_DAT8 = 158, 184 MX6Q_PAD_CSI0_DAT9 = 159, 185 MX6Q_PAD_CSI0_DAT10 = 160, 186 MX6Q_PAD_CSI0_DAT11 = 161, 187 MX6Q_PAD_CSI0_DAT12 = 162, 188 MX6Q_PAD_CSI0_DAT13 = 163, 189 MX6Q_PAD_CSI0_DAT14 = 164, 190 MX6Q_PAD_CSI0_DAT15 = 165, 191 MX6Q_PAD_CSI0_DAT16 = 166, 192 MX6Q_PAD_CSI0_DAT17 = 167, 193 MX6Q_PAD_CSI0_DAT18 = 168, 194 MX6Q_PAD_CSI0_DAT19 = 169, 195 MX6Q_PAD_SD3_DAT7 = 170, 196 MX6Q_PAD_SD3_DAT6 = 171, 197 MX6Q_PAD_SD3_DAT5 = 172, 198 MX6Q_PAD_SD3_DAT4 = 173, 199 MX6Q_PAD_SD3_CMD = 174, 200 MX6Q_PAD_SD3_CLK = 175, 201 MX6Q_PAD_SD3_DAT0 = 176, 202 MX6Q_PAD_SD3_DAT1 = 177, 203 MX6Q_PAD_SD3_DAT2 = 178, 204 MX6Q_PAD_SD3_DAT3 = 179, 205 MX6Q_PAD_SD3_RST = 180, 206 MX6Q_PAD_NANDF_CLE = 181, 207 MX6Q_PAD_NANDF_ALE = 182, 208 MX6Q_PAD_NANDF_WP_B = 183, 209 MX6Q_PAD_NANDF_RB0 = 184, 210 MX6Q_PAD_NANDF_CS0 = 185, 211 MX6Q_PAD_NANDF_CS1 = 186, 212 MX6Q_PAD_NANDF_CS2 = 187, 213 MX6Q_PAD_NANDF_CS3 = 188, 214 MX6Q_PAD_SD4_CMD = 189, 215 MX6Q_PAD_SD4_CLK = 190, 216 MX6Q_PAD_NANDF_D0 = 191, 217 MX6Q_PAD_NANDF_D1 = 192, 218 MX6Q_PAD_NANDF_D2 = 193, 219 MX6Q_PAD_NANDF_D3 = 194, 220 MX6Q_PAD_NANDF_D4 = 195, 221 MX6Q_PAD_NANDF_D5 = 196, 222 MX6Q_PAD_NANDF_D6 = 197, 223 MX6Q_PAD_NANDF_D7 = 198, 224 MX6Q_PAD_SD4_DAT0 = 199, 225 MX6Q_PAD_SD4_DAT1 = 200, 226 MX6Q_PAD_SD4_DAT2 = 201, 227 MX6Q_PAD_SD4_DAT3 = 202, 228 MX6Q_PAD_SD4_DAT4 = 203, 229 MX6Q_PAD_SD4_DAT5 = 204, 230 MX6Q_PAD_SD4_DAT6 = 205, 231 MX6Q_PAD_SD4_DAT7 = 206, 232 MX6Q_PAD_SD1_DAT1 = 207, 233 MX6Q_PAD_SD1_DAT0 = 208, 234 MX6Q_PAD_SD1_DAT3 = 209, 235 MX6Q_PAD_SD1_CMD = 210, 236 MX6Q_PAD_SD1_DAT2 = 211, 237 MX6Q_PAD_SD1_CLK = 212, 238 MX6Q_PAD_SD2_CLK = 213, 239 MX6Q_PAD_SD2_CMD = 214, 240 MX6Q_PAD_SD2_DAT3 = 215, 241 }; 242 243 /* Pad names for the pinmux subsystem */ 244 static const struct pinctrl_pin_desc imx6q_pinctrl_pads[] = { 245 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE0), 246 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE1), 247 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE2), 248 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE3), 249 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE4), 250 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE5), 251 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE6), 252 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE7), 253 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE8), 254 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE9), 255 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE10), 256 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE11), 257 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE12), 258 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE13), 259 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE14), 260 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE15), 261 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE16), 262 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE17), 263 IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE18), 264 IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT1), 265 IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT2), 266 IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT0), 267 IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TXC), 268 IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD0), 269 IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD1), 270 IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD2), 271 IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TD3), 272 IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RX_CTL), 273 IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD0), 274 IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_TX_CTL), 275 IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD1), 276 IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD2), 277 IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RD3), 278 IMX_PINCTRL_PIN(MX6Q_PAD_RGMII_RXC), 279 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A25), 280 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB2), 281 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D16), 282 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D17), 283 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D18), 284 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D19), 285 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D20), 286 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D21), 287 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D22), 288 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D23), 289 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB3), 290 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D24), 291 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D25), 292 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D26), 293 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D27), 294 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D28), 295 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D29), 296 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D30), 297 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_D31), 298 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A24), 299 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A23), 300 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A22), 301 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A21), 302 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A20), 303 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A19), 304 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A18), 305 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A17), 306 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_A16), 307 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_CS0), 308 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_CS1), 309 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_OE), 310 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_RW), 311 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_LBA), 312 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB0), 313 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_EB1), 314 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA0), 315 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA1), 316 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA2), 317 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA3), 318 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA4), 319 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA5), 320 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA6), 321 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA7), 322 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA8), 323 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA9), 324 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA10), 325 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA11), 326 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA12), 327 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA13), 328 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA14), 329 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_DA15), 330 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_WAIT), 331 IMX_PINCTRL_PIN(MX6Q_PAD_EIM_BCLK), 332 IMX_PINCTRL_PIN(MX6Q_PAD_DI0_DISP_CLK), 333 IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN15), 334 IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN2), 335 IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN3), 336 IMX_PINCTRL_PIN(MX6Q_PAD_DI0_PIN4), 337 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT0), 338 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT1), 339 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT2), 340 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT3), 341 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT4), 342 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT5), 343 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT6), 344 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT7), 345 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT8), 346 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT9), 347 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT10), 348 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT11), 349 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT12), 350 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT13), 351 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT14), 352 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT15), 353 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT16), 354 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT17), 355 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT18), 356 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT19), 357 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT20), 358 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT21), 359 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT22), 360 IMX_PINCTRL_PIN(MX6Q_PAD_DISP0_DAT23), 361 IMX_PINCTRL_PIN(MX6Q_PAD_ENET_MDIO), 362 IMX_PINCTRL_PIN(MX6Q_PAD_ENET_REF_CLK), 363 IMX_PINCTRL_PIN(MX6Q_PAD_ENET_RX_ER), 364 IMX_PINCTRL_PIN(MX6Q_PAD_ENET_CRS_DV), 365 IMX_PINCTRL_PIN(MX6Q_PAD_ENET_RXD1), 366 IMX_PINCTRL_PIN(MX6Q_PAD_ENET_RXD0), 367 IMX_PINCTRL_PIN(MX6Q_PAD_ENET_TX_EN), 368 IMX_PINCTRL_PIN(MX6Q_PAD_ENET_TXD1), 369 IMX_PINCTRL_PIN(MX6Q_PAD_ENET_TXD0), 370 IMX_PINCTRL_PIN(MX6Q_PAD_ENET_MDC), 371 IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL0), 372 IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW0), 373 IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL1), 374 IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW1), 375 IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL2), 376 IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW2), 377 IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL3), 378 IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW3), 379 IMX_PINCTRL_PIN(MX6Q_PAD_KEY_COL4), 380 IMX_PINCTRL_PIN(MX6Q_PAD_KEY_ROW4), 381 IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_0), 382 IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_1), 383 IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_9), 384 IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_3), 385 IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_6), 386 IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_2), 387 IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_4), 388 IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_5), 389 IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_7), 390 IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_8), 391 IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_16), 392 IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_17), 393 IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_18), 394 IMX_PINCTRL_PIN(MX6Q_PAD_GPIO_19), 395 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_PIXCLK), 396 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_MCLK), 397 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DATA_EN), 398 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_VSYNC), 399 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT4), 400 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT5), 401 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT6), 402 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT7), 403 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT8), 404 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT9), 405 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT10), 406 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT11), 407 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT12), 408 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT13), 409 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT14), 410 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT15), 411 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT16), 412 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT17), 413 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT18), 414 IMX_PINCTRL_PIN(MX6Q_PAD_CSI0_DAT19), 415 IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT7), 416 IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT6), 417 IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT5), 418 IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT4), 419 IMX_PINCTRL_PIN(MX6Q_PAD_SD3_CMD), 420 IMX_PINCTRL_PIN(MX6Q_PAD_SD3_CLK), 421 IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT0), 422 IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT1), 423 IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT2), 424 IMX_PINCTRL_PIN(MX6Q_PAD_SD3_DAT3), 425 IMX_PINCTRL_PIN(MX6Q_PAD_SD3_RST), 426 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CLE), 427 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_ALE), 428 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_WP_B), 429 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_RB0), 430 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS0), 431 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS1), 432 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS2), 433 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_CS3), 434 IMX_PINCTRL_PIN(MX6Q_PAD_SD4_CMD), 435 IMX_PINCTRL_PIN(MX6Q_PAD_SD4_CLK), 436 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D0), 437 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D1), 438 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D2), 439 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D3), 440 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D4), 441 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D5), 442 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D6), 443 IMX_PINCTRL_PIN(MX6Q_PAD_NANDF_D7), 444 IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT0), 445 IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT1), 446 IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT2), 447 IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT3), 448 IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT4), 449 IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT5), 450 IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT6), 451 IMX_PINCTRL_PIN(MX6Q_PAD_SD4_DAT7), 452 IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT1), 453 IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT0), 454 IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT3), 455 IMX_PINCTRL_PIN(MX6Q_PAD_SD1_CMD), 456 IMX_PINCTRL_PIN(MX6Q_PAD_SD1_DAT2), 457 IMX_PINCTRL_PIN(MX6Q_PAD_SD1_CLK), 458 IMX_PINCTRL_PIN(MX6Q_PAD_SD2_CLK), 459 IMX_PINCTRL_PIN(MX6Q_PAD_SD2_CMD), 460 IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT3), 461 }; 462 463 static const struct imx_pinctrl_soc_info imx6q_pinctrl_info = { 464 .pins = imx6q_pinctrl_pads, 465 .npins = ARRAY_SIZE(imx6q_pinctrl_pads), 466 .gpr_compatible = "fsl,imx6q-iomuxc-gpr", 467 }; 468 469 static const struct of_device_id imx6q_pinctrl_of_match[] = { 470 { .compatible = "fsl,imx6q-iomuxc", }, 471 { /* sentinel */ } 472 }; 473 474 static int imx6q_pinctrl_probe(struct platform_device *pdev) 475 { 476 return imx_pinctrl_probe(pdev, &imx6q_pinctrl_info); 477 } 478 479 static struct platform_driver imx6q_pinctrl_driver = { 480 .driver = { 481 .name = "imx6q-pinctrl", 482 .of_match_table = imx6q_pinctrl_of_match, 483 }, 484 .probe = imx6q_pinctrl_probe, 485 }; 486 487 static int __init imx6q_pinctrl_init(void) 488 { 489 return platform_driver_register(&imx6q_pinctrl_driver); 490 } 491 arch_initcall(imx6q_pinctrl_init); 492