1 /* 2 * Freescale imx6dl pinctrl driver 3 * 4 * Author: Shawn Guo <shawn.guo@linaro.org> 5 * Copyright (C) 2013 Freescale Semiconductor, Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <linux/err.h> 13 #include <linux/init.h> 14 #include <linux/io.h> 15 #include <linux/of.h> 16 #include <linux/of_device.h> 17 #include <linux/pinctrl/pinctrl.h> 18 19 #include "pinctrl-imx.h" 20 21 enum imx6dl_pads { 22 MX6DL_PAD_RESERVE0 = 0, 23 MX6DL_PAD_RESERVE1 = 1, 24 MX6DL_PAD_RESERVE2 = 2, 25 MX6DL_PAD_RESERVE3 = 3, 26 MX6DL_PAD_RESERVE4 = 4, 27 MX6DL_PAD_RESERVE5 = 5, 28 MX6DL_PAD_RESERVE6 = 6, 29 MX6DL_PAD_RESERVE7 = 7, 30 MX6DL_PAD_RESERVE8 = 8, 31 MX6DL_PAD_RESERVE9 = 9, 32 MX6DL_PAD_RESERVE10 = 10, 33 MX6DL_PAD_RESERVE11 = 11, 34 MX6DL_PAD_RESERVE12 = 12, 35 MX6DL_PAD_RESERVE13 = 13, 36 MX6DL_PAD_RESERVE14 = 14, 37 MX6DL_PAD_RESERVE15 = 15, 38 MX6DL_PAD_RESERVE16 = 16, 39 MX6DL_PAD_RESERVE17 = 17, 40 MX6DL_PAD_RESERVE18 = 18, 41 MX6DL_PAD_CSI0_DAT10 = 19, 42 MX6DL_PAD_CSI0_DAT11 = 20, 43 MX6DL_PAD_CSI0_DAT12 = 21, 44 MX6DL_PAD_CSI0_DAT13 = 22, 45 MX6DL_PAD_CSI0_DAT14 = 23, 46 MX6DL_PAD_CSI0_DAT15 = 24, 47 MX6DL_PAD_CSI0_DAT16 = 25, 48 MX6DL_PAD_CSI0_DAT17 = 26, 49 MX6DL_PAD_CSI0_DAT18 = 27, 50 MX6DL_PAD_CSI0_DAT19 = 28, 51 MX6DL_PAD_CSI0_DAT4 = 29, 52 MX6DL_PAD_CSI0_DAT5 = 30, 53 MX6DL_PAD_CSI0_DAT6 = 31, 54 MX6DL_PAD_CSI0_DAT7 = 32, 55 MX6DL_PAD_CSI0_DAT8 = 33, 56 MX6DL_PAD_CSI0_DAT9 = 34, 57 MX6DL_PAD_CSI0_DATA_EN = 35, 58 MX6DL_PAD_CSI0_MCLK = 36, 59 MX6DL_PAD_CSI0_PIXCLK = 37, 60 MX6DL_PAD_CSI0_VSYNC = 38, 61 MX6DL_PAD_DI0_DISP_CLK = 39, 62 MX6DL_PAD_DI0_PIN15 = 40, 63 MX6DL_PAD_DI0_PIN2 = 41, 64 MX6DL_PAD_DI0_PIN3 = 42, 65 MX6DL_PAD_DI0_PIN4 = 43, 66 MX6DL_PAD_DISP0_DAT0 = 44, 67 MX6DL_PAD_DISP0_DAT1 = 45, 68 MX6DL_PAD_DISP0_DAT10 = 46, 69 MX6DL_PAD_DISP0_DAT11 = 47, 70 MX6DL_PAD_DISP0_DAT12 = 48, 71 MX6DL_PAD_DISP0_DAT13 = 49, 72 MX6DL_PAD_DISP0_DAT14 = 50, 73 MX6DL_PAD_DISP0_DAT15 = 51, 74 MX6DL_PAD_DISP0_DAT16 = 52, 75 MX6DL_PAD_DISP0_DAT17 = 53, 76 MX6DL_PAD_DISP0_DAT18 = 54, 77 MX6DL_PAD_DISP0_DAT19 = 55, 78 MX6DL_PAD_DISP0_DAT2 = 56, 79 MX6DL_PAD_DISP0_DAT20 = 57, 80 MX6DL_PAD_DISP0_DAT21 = 58, 81 MX6DL_PAD_DISP0_DAT22 = 59, 82 MX6DL_PAD_DISP0_DAT23 = 60, 83 MX6DL_PAD_DISP0_DAT3 = 61, 84 MX6DL_PAD_DISP0_DAT4 = 62, 85 MX6DL_PAD_DISP0_DAT5 = 63, 86 MX6DL_PAD_DISP0_DAT6 = 64, 87 MX6DL_PAD_DISP0_DAT7 = 65, 88 MX6DL_PAD_DISP0_DAT8 = 66, 89 MX6DL_PAD_DISP0_DAT9 = 67, 90 MX6DL_PAD_EIM_A16 = 68, 91 MX6DL_PAD_EIM_A17 = 69, 92 MX6DL_PAD_EIM_A18 = 70, 93 MX6DL_PAD_EIM_A19 = 71, 94 MX6DL_PAD_EIM_A20 = 72, 95 MX6DL_PAD_EIM_A21 = 73, 96 MX6DL_PAD_EIM_A22 = 74, 97 MX6DL_PAD_EIM_A23 = 75, 98 MX6DL_PAD_EIM_A24 = 76, 99 MX6DL_PAD_EIM_A25 = 77, 100 MX6DL_PAD_EIM_BCLK = 78, 101 MX6DL_PAD_EIM_CS0 = 79, 102 MX6DL_PAD_EIM_CS1 = 80, 103 MX6DL_PAD_EIM_D16 = 81, 104 MX6DL_PAD_EIM_D17 = 82, 105 MX6DL_PAD_EIM_D18 = 83, 106 MX6DL_PAD_EIM_D19 = 84, 107 MX6DL_PAD_EIM_D20 = 85, 108 MX6DL_PAD_EIM_D21 = 86, 109 MX6DL_PAD_EIM_D22 = 87, 110 MX6DL_PAD_EIM_D23 = 88, 111 MX6DL_PAD_EIM_D24 = 89, 112 MX6DL_PAD_EIM_D25 = 90, 113 MX6DL_PAD_EIM_D26 = 91, 114 MX6DL_PAD_EIM_D27 = 92, 115 MX6DL_PAD_EIM_D28 = 93, 116 MX6DL_PAD_EIM_D29 = 94, 117 MX6DL_PAD_EIM_D30 = 95, 118 MX6DL_PAD_EIM_D31 = 96, 119 MX6DL_PAD_EIM_DA0 = 97, 120 MX6DL_PAD_EIM_DA1 = 98, 121 MX6DL_PAD_EIM_DA10 = 99, 122 MX6DL_PAD_EIM_DA11 = 100, 123 MX6DL_PAD_EIM_DA12 = 101, 124 MX6DL_PAD_EIM_DA13 = 102, 125 MX6DL_PAD_EIM_DA14 = 103, 126 MX6DL_PAD_EIM_DA15 = 104, 127 MX6DL_PAD_EIM_DA2 = 105, 128 MX6DL_PAD_EIM_DA3 = 106, 129 MX6DL_PAD_EIM_DA4 = 107, 130 MX6DL_PAD_EIM_DA5 = 108, 131 MX6DL_PAD_EIM_DA6 = 109, 132 MX6DL_PAD_EIM_DA7 = 110, 133 MX6DL_PAD_EIM_DA8 = 111, 134 MX6DL_PAD_EIM_DA9 = 112, 135 MX6DL_PAD_EIM_EB0 = 113, 136 MX6DL_PAD_EIM_EB1 = 114, 137 MX6DL_PAD_EIM_EB2 = 115, 138 MX6DL_PAD_EIM_EB3 = 116, 139 MX6DL_PAD_EIM_LBA = 117, 140 MX6DL_PAD_EIM_OE = 118, 141 MX6DL_PAD_EIM_RW = 119, 142 MX6DL_PAD_EIM_WAIT = 120, 143 MX6DL_PAD_ENET_CRS_DV = 121, 144 MX6DL_PAD_ENET_MDC = 122, 145 MX6DL_PAD_ENET_MDIO = 123, 146 MX6DL_PAD_ENET_REF_CLK = 124, 147 MX6DL_PAD_ENET_RX_ER = 125, 148 MX6DL_PAD_ENET_RXD0 = 126, 149 MX6DL_PAD_ENET_RXD1 = 127, 150 MX6DL_PAD_ENET_TX_EN = 128, 151 MX6DL_PAD_ENET_TXD0 = 129, 152 MX6DL_PAD_ENET_TXD1 = 130, 153 MX6DL_PAD_GPIO_0 = 131, 154 MX6DL_PAD_GPIO_1 = 132, 155 MX6DL_PAD_GPIO_16 = 133, 156 MX6DL_PAD_GPIO_17 = 134, 157 MX6DL_PAD_GPIO_18 = 135, 158 MX6DL_PAD_GPIO_19 = 136, 159 MX6DL_PAD_GPIO_2 = 137, 160 MX6DL_PAD_GPIO_3 = 138, 161 MX6DL_PAD_GPIO_4 = 139, 162 MX6DL_PAD_GPIO_5 = 140, 163 MX6DL_PAD_GPIO_6 = 141, 164 MX6DL_PAD_GPIO_7 = 142, 165 MX6DL_PAD_GPIO_8 = 143, 166 MX6DL_PAD_GPIO_9 = 144, 167 MX6DL_PAD_KEY_COL0 = 145, 168 MX6DL_PAD_KEY_COL1 = 146, 169 MX6DL_PAD_KEY_COL2 = 147, 170 MX6DL_PAD_KEY_COL3 = 148, 171 MX6DL_PAD_KEY_COL4 = 149, 172 MX6DL_PAD_KEY_ROW0 = 150, 173 MX6DL_PAD_KEY_ROW1 = 151, 174 MX6DL_PAD_KEY_ROW2 = 152, 175 MX6DL_PAD_KEY_ROW3 = 153, 176 MX6DL_PAD_KEY_ROW4 = 154, 177 MX6DL_PAD_NANDF_ALE = 155, 178 MX6DL_PAD_NANDF_CLE = 156, 179 MX6DL_PAD_NANDF_CS0 = 157, 180 MX6DL_PAD_NANDF_CS1 = 158, 181 MX6DL_PAD_NANDF_CS2 = 159, 182 MX6DL_PAD_NANDF_CS3 = 160, 183 MX6DL_PAD_NANDF_D0 = 161, 184 MX6DL_PAD_NANDF_D1 = 162, 185 MX6DL_PAD_NANDF_D2 = 163, 186 MX6DL_PAD_NANDF_D3 = 164, 187 MX6DL_PAD_NANDF_D4 = 165, 188 MX6DL_PAD_NANDF_D5 = 166, 189 MX6DL_PAD_NANDF_D6 = 167, 190 MX6DL_PAD_NANDF_D7 = 168, 191 MX6DL_PAD_NANDF_RB0 = 169, 192 MX6DL_PAD_NANDF_WP_B = 170, 193 MX6DL_PAD_RGMII_RD0 = 171, 194 MX6DL_PAD_RGMII_RD1 = 172, 195 MX6DL_PAD_RGMII_RD2 = 173, 196 MX6DL_PAD_RGMII_RD3 = 174, 197 MX6DL_PAD_RGMII_RX_CTL = 175, 198 MX6DL_PAD_RGMII_RXC = 176, 199 MX6DL_PAD_RGMII_TD0 = 177, 200 MX6DL_PAD_RGMII_TD1 = 178, 201 MX6DL_PAD_RGMII_TD2 = 179, 202 MX6DL_PAD_RGMII_TD3 = 180, 203 MX6DL_PAD_RGMII_TX_CTL = 181, 204 MX6DL_PAD_RGMII_TXC = 182, 205 MX6DL_PAD_SD1_CLK = 183, 206 MX6DL_PAD_SD1_CMD = 184, 207 MX6DL_PAD_SD1_DAT0 = 185, 208 MX6DL_PAD_SD1_DAT1 = 186, 209 MX6DL_PAD_SD1_DAT2 = 187, 210 MX6DL_PAD_SD1_DAT3 = 188, 211 MX6DL_PAD_SD2_CLK = 189, 212 MX6DL_PAD_SD2_CMD = 190, 213 MX6DL_PAD_SD2_DAT0 = 191, 214 MX6DL_PAD_SD2_DAT1 = 192, 215 MX6DL_PAD_SD2_DAT2 = 193, 216 MX6DL_PAD_SD2_DAT3 = 194, 217 MX6DL_PAD_SD3_CLK = 195, 218 MX6DL_PAD_SD3_CMD = 196, 219 MX6DL_PAD_SD3_DAT0 = 197, 220 MX6DL_PAD_SD3_DAT1 = 198, 221 MX6DL_PAD_SD3_DAT2 = 199, 222 MX6DL_PAD_SD3_DAT3 = 200, 223 MX6DL_PAD_SD3_DAT4 = 201, 224 MX6DL_PAD_SD3_DAT5 = 202, 225 MX6DL_PAD_SD3_DAT6 = 203, 226 MX6DL_PAD_SD3_DAT7 = 204, 227 MX6DL_PAD_SD3_RST = 205, 228 MX6DL_PAD_SD4_CLK = 206, 229 MX6DL_PAD_SD4_CMD = 207, 230 MX6DL_PAD_SD4_DAT0 = 208, 231 MX6DL_PAD_SD4_DAT1 = 209, 232 MX6DL_PAD_SD4_DAT2 = 210, 233 MX6DL_PAD_SD4_DAT3 = 211, 234 MX6DL_PAD_SD4_DAT4 = 212, 235 MX6DL_PAD_SD4_DAT5 = 213, 236 MX6DL_PAD_SD4_DAT6 = 214, 237 MX6DL_PAD_SD4_DAT7 = 215, 238 }; 239 240 /* Pad names for the pinmux subsystem */ 241 static const struct pinctrl_pin_desc imx6dl_pinctrl_pads[] = { 242 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE0), 243 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE1), 244 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE2), 245 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE3), 246 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE4), 247 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE5), 248 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE6), 249 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE7), 250 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE8), 251 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE9), 252 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE10), 253 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE11), 254 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE12), 255 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE13), 256 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE14), 257 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE15), 258 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE16), 259 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE17), 260 IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE18), 261 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT10), 262 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT11), 263 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT12), 264 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT13), 265 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT14), 266 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT15), 267 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT16), 268 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT17), 269 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT18), 270 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT19), 271 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT4), 272 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT5), 273 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT6), 274 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT7), 275 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT8), 276 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT9), 277 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DATA_EN), 278 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_MCLK), 279 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_PIXCLK), 280 IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_VSYNC), 281 IMX_PINCTRL_PIN(MX6DL_PAD_DI0_DISP_CLK), 282 IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN15), 283 IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN2), 284 IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN3), 285 IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN4), 286 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT0), 287 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT1), 288 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT10), 289 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT11), 290 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT12), 291 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT13), 292 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT14), 293 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT15), 294 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT16), 295 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT17), 296 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT18), 297 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT19), 298 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT2), 299 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT20), 300 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT21), 301 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT22), 302 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT23), 303 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT3), 304 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT4), 305 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT5), 306 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT6), 307 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT7), 308 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT8), 309 IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT9), 310 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A16), 311 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A17), 312 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A18), 313 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A19), 314 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A20), 315 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A21), 316 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A22), 317 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A23), 318 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A24), 319 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A25), 320 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_BCLK), 321 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_CS0), 322 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_CS1), 323 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D16), 324 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D17), 325 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D18), 326 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D19), 327 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D20), 328 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D21), 329 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D22), 330 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D23), 331 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D24), 332 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D25), 333 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D26), 334 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D27), 335 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D28), 336 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D29), 337 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D30), 338 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D31), 339 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA0), 340 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA1), 341 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA10), 342 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA11), 343 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA12), 344 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA13), 345 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA14), 346 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA15), 347 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA2), 348 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA3), 349 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA4), 350 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA5), 351 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA6), 352 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA7), 353 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA8), 354 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA9), 355 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB0), 356 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB1), 357 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB2), 358 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB3), 359 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_LBA), 360 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_OE), 361 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_RW), 362 IMX_PINCTRL_PIN(MX6DL_PAD_EIM_WAIT), 363 IMX_PINCTRL_PIN(MX6DL_PAD_ENET_CRS_DV), 364 IMX_PINCTRL_PIN(MX6DL_PAD_ENET_MDC), 365 IMX_PINCTRL_PIN(MX6DL_PAD_ENET_MDIO), 366 IMX_PINCTRL_PIN(MX6DL_PAD_ENET_REF_CLK), 367 IMX_PINCTRL_PIN(MX6DL_PAD_ENET_RX_ER), 368 IMX_PINCTRL_PIN(MX6DL_PAD_ENET_RXD0), 369 IMX_PINCTRL_PIN(MX6DL_PAD_ENET_RXD1), 370 IMX_PINCTRL_PIN(MX6DL_PAD_ENET_TX_EN), 371 IMX_PINCTRL_PIN(MX6DL_PAD_ENET_TXD0), 372 IMX_PINCTRL_PIN(MX6DL_PAD_ENET_TXD1), 373 IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_0), 374 IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_1), 375 IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_16), 376 IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_17), 377 IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_18), 378 IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_19), 379 IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_2), 380 IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_3), 381 IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_4), 382 IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_5), 383 IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_6), 384 IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_7), 385 IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_8), 386 IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_9), 387 IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL0), 388 IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL1), 389 IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL2), 390 IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL3), 391 IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL4), 392 IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW0), 393 IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW1), 394 IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW2), 395 IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW3), 396 IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW4), 397 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_ALE), 398 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CLE), 399 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS0), 400 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS1), 401 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS2), 402 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS3), 403 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D0), 404 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D1), 405 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D2), 406 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D3), 407 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D4), 408 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D5), 409 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D6), 410 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D7), 411 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_RB0), 412 IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_WP_B), 413 IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD0), 414 IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD1), 415 IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD2), 416 IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD3), 417 IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RX_CTL), 418 IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RXC), 419 IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD0), 420 IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD1), 421 IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD2), 422 IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD3), 423 IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TX_CTL), 424 IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TXC), 425 IMX_PINCTRL_PIN(MX6DL_PAD_SD1_CLK), 426 IMX_PINCTRL_PIN(MX6DL_PAD_SD1_CMD), 427 IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT0), 428 IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT1), 429 IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT2), 430 IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT3), 431 IMX_PINCTRL_PIN(MX6DL_PAD_SD2_CLK), 432 IMX_PINCTRL_PIN(MX6DL_PAD_SD2_CMD), 433 IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT0), 434 IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT1), 435 IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT2), 436 IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT3), 437 IMX_PINCTRL_PIN(MX6DL_PAD_SD3_CLK), 438 IMX_PINCTRL_PIN(MX6DL_PAD_SD3_CMD), 439 IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT0), 440 IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT1), 441 IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT2), 442 IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT3), 443 IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT4), 444 IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT5), 445 IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT6), 446 IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT7), 447 IMX_PINCTRL_PIN(MX6DL_PAD_SD3_RST), 448 IMX_PINCTRL_PIN(MX6DL_PAD_SD4_CLK), 449 IMX_PINCTRL_PIN(MX6DL_PAD_SD4_CMD), 450 IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT0), 451 IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT1), 452 IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT2), 453 IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT3), 454 IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT4), 455 IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT5), 456 IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT6), 457 IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT7), 458 }; 459 460 static const struct imx_pinctrl_soc_info imx6dl_pinctrl_info = { 461 .pins = imx6dl_pinctrl_pads, 462 .npins = ARRAY_SIZE(imx6dl_pinctrl_pads), 463 .gpr_compatible = "fsl,imx6q-iomuxc-gpr", 464 }; 465 466 static const struct of_device_id imx6dl_pinctrl_of_match[] = { 467 { .compatible = "fsl,imx6dl-iomuxc", }, 468 { /* sentinel */ } 469 }; 470 471 static int imx6dl_pinctrl_probe(struct platform_device *pdev) 472 { 473 return imx_pinctrl_probe(pdev, &imx6dl_pinctrl_info); 474 } 475 476 static struct platform_driver imx6dl_pinctrl_driver = { 477 .driver = { 478 .name = "imx6dl-pinctrl", 479 .of_match_table = imx6dl_pinctrl_of_match, 480 }, 481 .probe = imx6dl_pinctrl_probe, 482 }; 483 484 static int __init imx6dl_pinctrl_init(void) 485 { 486 return platform_driver_register(&imx6dl_pinctrl_driver); 487 } 488 arch_initcall(imx6dl_pinctrl_init); 489