1 /* 2 * imx27 pinctrl driver based on imx pinmux core 3 * 4 * Copyright (C) 2013 Pengutronix 5 * 6 * Author: Markus Pargmann <mpa@pengutronix.de> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 */ 13 14 #include <linux/err.h> 15 #include <linux/init.h> 16 #include <linux/io.h> 17 #include <linux/of.h> 18 #include <linux/of_device.h> 19 #include <linux/pinctrl/pinctrl.h> 20 21 #include "pinctrl-imx1.h" 22 23 #define PAD_ID(port, pin) (port*32 + pin) 24 #define PA 0 25 #define PB 1 26 #define PC 2 27 #define PD 3 28 #define PE 4 29 #define PF 5 30 31 enum imx27_pads { 32 MX27_PAD_USBH2_CLK = PAD_ID(PA, 0), 33 MX27_PAD_USBH2_DIR = PAD_ID(PA, 1), 34 MX27_PAD_USBH2_DATA7 = PAD_ID(PA, 2), 35 MX27_PAD_USBH2_NXT = PAD_ID(PA, 3), 36 MX27_PAD_USBH2_STP = PAD_ID(PA, 4), 37 MX27_PAD_LSCLK = PAD_ID(PA, 5), 38 MX27_PAD_LD0 = PAD_ID(PA, 6), 39 MX27_PAD_LD1 = PAD_ID(PA, 7), 40 MX27_PAD_LD2 = PAD_ID(PA, 8), 41 MX27_PAD_LD3 = PAD_ID(PA, 9), 42 MX27_PAD_LD4 = PAD_ID(PA, 10), 43 MX27_PAD_LD5 = PAD_ID(PA, 11), 44 MX27_PAD_LD6 = PAD_ID(PA, 12), 45 MX27_PAD_LD7 = PAD_ID(PA, 13), 46 MX27_PAD_LD8 = PAD_ID(PA, 14), 47 MX27_PAD_LD9 = PAD_ID(PA, 15), 48 MX27_PAD_LD10 = PAD_ID(PA, 16), 49 MX27_PAD_LD11 = PAD_ID(PA, 17), 50 MX27_PAD_LD12 = PAD_ID(PA, 18), 51 MX27_PAD_LD13 = PAD_ID(PA, 19), 52 MX27_PAD_LD14 = PAD_ID(PA, 20), 53 MX27_PAD_LD15 = PAD_ID(PA, 21), 54 MX27_PAD_LD16 = PAD_ID(PA, 22), 55 MX27_PAD_LD17 = PAD_ID(PA, 23), 56 MX27_PAD_REV = PAD_ID(PA, 24), 57 MX27_PAD_CLS = PAD_ID(PA, 25), 58 MX27_PAD_PS = PAD_ID(PA, 26), 59 MX27_PAD_SPL_SPR = PAD_ID(PA, 27), 60 MX27_PAD_HSYNC = PAD_ID(PA, 28), 61 MX27_PAD_VSYNC = PAD_ID(PA, 29), 62 MX27_PAD_CONTRAST = PAD_ID(PA, 30), 63 MX27_PAD_OE_ACD = PAD_ID(PA, 31), 64 65 MX27_PAD_SD2_D0 = PAD_ID(PB, 4), 66 MX27_PAD_SD2_D1 = PAD_ID(PB, 5), 67 MX27_PAD_SD2_D2 = PAD_ID(PB, 6), 68 MX27_PAD_SD2_D3 = PAD_ID(PB, 7), 69 MX27_PAD_SD2_CMD = PAD_ID(PB, 8), 70 MX27_PAD_SD2_CLK = PAD_ID(PB, 9), 71 MX27_PAD_CSI_D0 = PAD_ID(PB, 10), 72 MX27_PAD_CSI_D1 = PAD_ID(PB, 11), 73 MX27_PAD_CSI_D2 = PAD_ID(PB, 12), 74 MX27_PAD_CSI_D3 = PAD_ID(PB, 13), 75 MX27_PAD_CSI_D4 = PAD_ID(PB, 14), 76 MX27_PAD_CSI_MCLK = PAD_ID(PB, 15), 77 MX27_PAD_CSI_PIXCLK = PAD_ID(PB, 16), 78 MX27_PAD_CSI_D5 = PAD_ID(PB, 17), 79 MX27_PAD_CSI_D6 = PAD_ID(PB, 18), 80 MX27_PAD_CSI_D7 = PAD_ID(PB, 19), 81 MX27_PAD_CSI_VSYNC = PAD_ID(PB, 20), 82 MX27_PAD_CSI_HSYNC = PAD_ID(PB, 21), 83 MX27_PAD_USBH1_SUSP = PAD_ID(PB, 22), 84 MX27_PAD_USB_PWR = PAD_ID(PB, 23), 85 MX27_PAD_USB_OC_B = PAD_ID(PB, 24), 86 MX27_PAD_USBH1_RCV = PAD_ID(PB, 25), 87 MX27_PAD_USBH1_FS = PAD_ID(PB, 26), 88 MX27_PAD_USBH1_OE_B = PAD_ID(PB, 27), 89 MX27_PAD_USBH1_TXDM = PAD_ID(PB, 28), 90 MX27_PAD_USBH1_TXDP = PAD_ID(PB, 29), 91 MX27_PAD_USBH1_RXDM = PAD_ID(PB, 30), 92 MX27_PAD_USBH1_RXDP = PAD_ID(PB, 31), 93 94 MX27_PAD_I2C2_SDA = PAD_ID(PC, 5), 95 MX27_PAD_I2C2_SCL = PAD_ID(PC, 6), 96 MX27_PAD_USBOTG_DATA5 = PAD_ID(PC, 7), 97 MX27_PAD_USBOTG_DATA6 = PAD_ID(PC, 8), 98 MX27_PAD_USBOTG_DATA0 = PAD_ID(PC, 9), 99 MX27_PAD_USBOTG_DATA2 = PAD_ID(PC, 10), 100 MX27_PAD_USBOTG_DATA1 = PAD_ID(PC, 11), 101 MX27_PAD_USBOTG_DATA4 = PAD_ID(PC, 12), 102 MX27_PAD_USBOTG_DATA3 = PAD_ID(PC, 13), 103 MX27_PAD_TOUT = PAD_ID(PC, 14), 104 MX27_PAD_TIN = PAD_ID(PC, 15), 105 MX27_PAD_SSI4_FS = PAD_ID(PC, 16), 106 MX27_PAD_SSI4_RXDAT = PAD_ID(PC, 17), 107 MX27_PAD_SSI4_TXDAT = PAD_ID(PC, 18), 108 MX27_PAD_SSI4_CLK = PAD_ID(PC, 19), 109 MX27_PAD_SSI1_FS = PAD_ID(PC, 20), 110 MX27_PAD_SSI1_RXDAT = PAD_ID(PC, 21), 111 MX27_PAD_SSI1_TXDAT = PAD_ID(PC, 22), 112 MX27_PAD_SSI1_CLK = PAD_ID(PC, 23), 113 MX27_PAD_SSI2_FS = PAD_ID(PC, 24), 114 MX27_PAD_SSI2_RXDAT = PAD_ID(PC, 25), 115 MX27_PAD_SSI2_TXDAT = PAD_ID(PC, 26), 116 MX27_PAD_SSI2_CLK = PAD_ID(PC, 27), 117 MX27_PAD_SSI3_FS = PAD_ID(PC, 28), 118 MX27_PAD_SSI3_RXDAT = PAD_ID(PC, 29), 119 MX27_PAD_SSI3_TXDAT = PAD_ID(PC, 30), 120 MX27_PAD_SSI3_CLK = PAD_ID(PC, 31), 121 122 MX27_PAD_SD3_CMD = PAD_ID(PD, 0), 123 MX27_PAD_SD3_CLK = PAD_ID(PD, 1), 124 MX27_PAD_ATA_DATA0 = PAD_ID(PD, 2), 125 MX27_PAD_ATA_DATA1 = PAD_ID(PD, 3), 126 MX27_PAD_ATA_DATA2 = PAD_ID(PD, 4), 127 MX27_PAD_ATA_DATA3 = PAD_ID(PD, 5), 128 MX27_PAD_ATA_DATA4 = PAD_ID(PD, 6), 129 MX27_PAD_ATA_DATA5 = PAD_ID(PD, 7), 130 MX27_PAD_ATA_DATA6 = PAD_ID(PD, 8), 131 MX27_PAD_ATA_DATA7 = PAD_ID(PD, 9), 132 MX27_PAD_ATA_DATA8 = PAD_ID(PD, 10), 133 MX27_PAD_ATA_DATA9 = PAD_ID(PD, 11), 134 MX27_PAD_ATA_DATA10 = PAD_ID(PD, 12), 135 MX27_PAD_ATA_DATA11 = PAD_ID(PD, 13), 136 MX27_PAD_ATA_DATA12 = PAD_ID(PD, 14), 137 MX27_PAD_ATA_DATA13 = PAD_ID(PD, 15), 138 MX27_PAD_ATA_DATA14 = PAD_ID(PD, 16), 139 MX27_PAD_I2C_DATA = PAD_ID(PD, 17), 140 MX27_PAD_I2C_CLK = PAD_ID(PD, 18), 141 MX27_PAD_CSPI2_SS2 = PAD_ID(PD, 19), 142 MX27_PAD_CSPI2_SS1 = PAD_ID(PD, 20), 143 MX27_PAD_CSPI2_SS0 = PAD_ID(PD, 21), 144 MX27_PAD_CSPI2_SCLK = PAD_ID(PD, 22), 145 MX27_PAD_CSPI2_MISO = PAD_ID(PD, 23), 146 MX27_PAD_CSPI2_MOSI = PAD_ID(PD, 24), 147 MX27_PAD_CSPI1_RDY = PAD_ID(PD, 25), 148 MX27_PAD_CSPI1_SS2 = PAD_ID(PD, 26), 149 MX27_PAD_CSPI1_SS1 = PAD_ID(PD, 27), 150 MX27_PAD_CSPI1_SS0 = PAD_ID(PD, 28), 151 MX27_PAD_CSPI1_SCLK = PAD_ID(PD, 29), 152 MX27_PAD_CSPI1_MISO = PAD_ID(PD, 30), 153 MX27_PAD_CSPI1_MOSI = PAD_ID(PD, 31), 154 155 MX27_PAD_USBOTG_NXT = PAD_ID(PE, 0), 156 MX27_PAD_USBOTG_STP = PAD_ID(PE, 1), 157 MX27_PAD_USBOTG_DIR = PAD_ID(PE, 2), 158 MX27_PAD_UART2_CTS = PAD_ID(PE, 3), 159 MX27_PAD_UART2_RTS = PAD_ID(PE, 4), 160 MX27_PAD_PWMO = PAD_ID(PE, 5), 161 MX27_PAD_UART2_TXD = PAD_ID(PE, 6), 162 MX27_PAD_UART2_RXD = PAD_ID(PE, 7), 163 MX27_PAD_UART3_TXD = PAD_ID(PE, 8), 164 MX27_PAD_UART3_RXD = PAD_ID(PE, 9), 165 MX27_PAD_UART3_CTS = PAD_ID(PE, 10), 166 MX27_PAD_UART3_RTS = PAD_ID(PE, 11), 167 MX27_PAD_UART1_TXD = PAD_ID(PE, 12), 168 MX27_PAD_UART1_RXD = PAD_ID(PE, 13), 169 MX27_PAD_UART1_CTS = PAD_ID(PE, 14), 170 MX27_PAD_UART1_RTS = PAD_ID(PE, 15), 171 MX27_PAD_RTCK = PAD_ID(PE, 16), 172 MX27_PAD_RESET_OUT_B = PAD_ID(PE, 17), 173 MX27_PAD_SD1_D0 = PAD_ID(PE, 18), 174 MX27_PAD_SD1_D1 = PAD_ID(PE, 19), 175 MX27_PAD_SD1_D2 = PAD_ID(PE, 20), 176 MX27_PAD_SD1_D3 = PAD_ID(PE, 21), 177 MX27_PAD_SD1_CMD = PAD_ID(PE, 22), 178 MX27_PAD_SD1_CLK = PAD_ID(PE, 23), 179 MX27_PAD_USBOTG_CLK = PAD_ID(PE, 24), 180 MX27_PAD_USBOTG_DATA7 = PAD_ID(PE, 25), 181 182 MX27_PAD_NFRB = PAD_ID(PF, 0), 183 MX27_PAD_NFCLE = PAD_ID(PF, 1), 184 MX27_PAD_NFWP_B = PAD_ID(PF, 2), 185 MX27_PAD_NFCE_B = PAD_ID(PF, 3), 186 MX27_PAD_NFALE = PAD_ID(PF, 4), 187 MX27_PAD_NFRE_B = PAD_ID(PF, 5), 188 MX27_PAD_NFWE_B = PAD_ID(PF, 6), 189 MX27_PAD_PC_POE = PAD_ID(PF, 7), 190 MX27_PAD_PC_RW_B = PAD_ID(PF, 8), 191 MX27_PAD_IOIS16 = PAD_ID(PF, 9), 192 MX27_PAD_PC_RST = PAD_ID(PF, 10), 193 MX27_PAD_PC_BVD2 = PAD_ID(PF, 11), 194 MX27_PAD_PC_BVD1 = PAD_ID(PF, 12), 195 MX27_PAD_PC_VS2 = PAD_ID(PF, 13), 196 MX27_PAD_PC_VS1 = PAD_ID(PF, 14), 197 MX27_PAD_CLKO = PAD_ID(PF, 15), 198 MX27_PAD_PC_PWRON = PAD_ID(PF, 16), 199 MX27_PAD_PC_READY = PAD_ID(PF, 17), 200 MX27_PAD_PC_WAIT_B = PAD_ID(PF, 18), 201 MX27_PAD_PC_CD2_B = PAD_ID(PF, 19), 202 MX27_PAD_PC_CD1_B = PAD_ID(PF, 20), 203 MX27_PAD_CS4_B = PAD_ID(PF, 21), 204 MX27_PAD_CS5_B = PAD_ID(PF, 22), 205 MX27_PAD_ATA_DATA15 = PAD_ID(PF, 23), 206 }; 207 208 /* Pad names for the pinmux subsystem */ 209 static const struct pinctrl_pin_desc imx27_pinctrl_pads[] = { 210 IMX_PINCTRL_PIN(MX27_PAD_USBH2_CLK), 211 IMX_PINCTRL_PIN(MX27_PAD_USBH2_DIR), 212 IMX_PINCTRL_PIN(MX27_PAD_USBH2_DATA7), 213 IMX_PINCTRL_PIN(MX27_PAD_USBH2_NXT), 214 IMX_PINCTRL_PIN(MX27_PAD_USBH2_STP), 215 IMX_PINCTRL_PIN(MX27_PAD_LSCLK), 216 IMX_PINCTRL_PIN(MX27_PAD_LD0), 217 IMX_PINCTRL_PIN(MX27_PAD_LD1), 218 IMX_PINCTRL_PIN(MX27_PAD_LD2), 219 IMX_PINCTRL_PIN(MX27_PAD_LD3), 220 IMX_PINCTRL_PIN(MX27_PAD_LD4), 221 IMX_PINCTRL_PIN(MX27_PAD_LD5), 222 IMX_PINCTRL_PIN(MX27_PAD_LD6), 223 IMX_PINCTRL_PIN(MX27_PAD_LD7), 224 IMX_PINCTRL_PIN(MX27_PAD_LD8), 225 IMX_PINCTRL_PIN(MX27_PAD_LD9), 226 IMX_PINCTRL_PIN(MX27_PAD_LD10), 227 IMX_PINCTRL_PIN(MX27_PAD_LD11), 228 IMX_PINCTRL_PIN(MX27_PAD_LD12), 229 IMX_PINCTRL_PIN(MX27_PAD_LD13), 230 IMX_PINCTRL_PIN(MX27_PAD_LD14), 231 IMX_PINCTRL_PIN(MX27_PAD_LD15), 232 IMX_PINCTRL_PIN(MX27_PAD_LD16), 233 IMX_PINCTRL_PIN(MX27_PAD_LD17), 234 IMX_PINCTRL_PIN(MX27_PAD_REV), 235 IMX_PINCTRL_PIN(MX27_PAD_CLS), 236 IMX_PINCTRL_PIN(MX27_PAD_PS), 237 IMX_PINCTRL_PIN(MX27_PAD_SPL_SPR), 238 IMX_PINCTRL_PIN(MX27_PAD_HSYNC), 239 IMX_PINCTRL_PIN(MX27_PAD_VSYNC), 240 IMX_PINCTRL_PIN(MX27_PAD_CONTRAST), 241 IMX_PINCTRL_PIN(MX27_PAD_OE_ACD), 242 243 IMX_PINCTRL_PIN(MX27_PAD_SD2_D0), 244 IMX_PINCTRL_PIN(MX27_PAD_SD2_D1), 245 IMX_PINCTRL_PIN(MX27_PAD_SD2_D2), 246 IMX_PINCTRL_PIN(MX27_PAD_SD2_D3), 247 IMX_PINCTRL_PIN(MX27_PAD_SD2_CMD), 248 IMX_PINCTRL_PIN(MX27_PAD_SD2_CLK), 249 IMX_PINCTRL_PIN(MX27_PAD_CSI_D0), 250 IMX_PINCTRL_PIN(MX27_PAD_CSI_D1), 251 IMX_PINCTRL_PIN(MX27_PAD_CSI_D2), 252 IMX_PINCTRL_PIN(MX27_PAD_CSI_D3), 253 IMX_PINCTRL_PIN(MX27_PAD_CSI_D4), 254 IMX_PINCTRL_PIN(MX27_PAD_CSI_MCLK), 255 IMX_PINCTRL_PIN(MX27_PAD_CSI_PIXCLK), 256 IMX_PINCTRL_PIN(MX27_PAD_CSI_D5), 257 IMX_PINCTRL_PIN(MX27_PAD_CSI_D6), 258 IMX_PINCTRL_PIN(MX27_PAD_CSI_D7), 259 IMX_PINCTRL_PIN(MX27_PAD_CSI_VSYNC), 260 IMX_PINCTRL_PIN(MX27_PAD_CSI_HSYNC), 261 IMX_PINCTRL_PIN(MX27_PAD_USBH1_SUSP), 262 IMX_PINCTRL_PIN(MX27_PAD_USB_PWR), 263 IMX_PINCTRL_PIN(MX27_PAD_USB_OC_B), 264 IMX_PINCTRL_PIN(MX27_PAD_USBH1_RCV), 265 IMX_PINCTRL_PIN(MX27_PAD_USBH1_FS), 266 IMX_PINCTRL_PIN(MX27_PAD_USBH1_OE_B), 267 IMX_PINCTRL_PIN(MX27_PAD_USBH1_TXDM), 268 IMX_PINCTRL_PIN(MX27_PAD_USBH1_TXDP), 269 IMX_PINCTRL_PIN(MX27_PAD_USBH1_RXDM), 270 IMX_PINCTRL_PIN(MX27_PAD_USBH1_RXDP), 271 272 IMX_PINCTRL_PIN(MX27_PAD_I2C2_SDA), 273 IMX_PINCTRL_PIN(MX27_PAD_I2C2_SCL), 274 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA5), 275 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA6), 276 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA0), 277 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA2), 278 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA1), 279 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA4), 280 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA3), 281 IMX_PINCTRL_PIN(MX27_PAD_TOUT), 282 IMX_PINCTRL_PIN(MX27_PAD_TIN), 283 IMX_PINCTRL_PIN(MX27_PAD_SSI4_FS), 284 IMX_PINCTRL_PIN(MX27_PAD_SSI4_RXDAT), 285 IMX_PINCTRL_PIN(MX27_PAD_SSI4_TXDAT), 286 IMX_PINCTRL_PIN(MX27_PAD_SSI4_CLK), 287 IMX_PINCTRL_PIN(MX27_PAD_SSI1_FS), 288 IMX_PINCTRL_PIN(MX27_PAD_SSI1_RXDAT), 289 IMX_PINCTRL_PIN(MX27_PAD_SSI1_TXDAT), 290 IMX_PINCTRL_PIN(MX27_PAD_SSI1_CLK), 291 IMX_PINCTRL_PIN(MX27_PAD_SSI2_FS), 292 IMX_PINCTRL_PIN(MX27_PAD_SSI2_RXDAT), 293 IMX_PINCTRL_PIN(MX27_PAD_SSI2_TXDAT), 294 IMX_PINCTRL_PIN(MX27_PAD_SSI2_CLK), 295 IMX_PINCTRL_PIN(MX27_PAD_SSI3_FS), 296 IMX_PINCTRL_PIN(MX27_PAD_SSI3_RXDAT), 297 IMX_PINCTRL_PIN(MX27_PAD_SSI3_TXDAT), 298 IMX_PINCTRL_PIN(MX27_PAD_SSI3_CLK), 299 300 IMX_PINCTRL_PIN(MX27_PAD_SD3_CMD), 301 IMX_PINCTRL_PIN(MX27_PAD_SD3_CLK), 302 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA0), 303 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA1), 304 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA2), 305 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA3), 306 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA4), 307 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA5), 308 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA6), 309 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA7), 310 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA8), 311 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA9), 312 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA10), 313 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA11), 314 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA12), 315 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA13), 316 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA14), 317 IMX_PINCTRL_PIN(MX27_PAD_I2C_DATA), 318 IMX_PINCTRL_PIN(MX27_PAD_I2C_CLK), 319 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS2), 320 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS1), 321 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS0), 322 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SCLK), 323 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_MISO), 324 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_MOSI), 325 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_RDY), 326 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS2), 327 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS1), 328 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS0), 329 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SCLK), 330 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_MISO), 331 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_MOSI), 332 333 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_NXT), 334 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_STP), 335 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DIR), 336 IMX_PINCTRL_PIN(MX27_PAD_UART2_CTS), 337 IMX_PINCTRL_PIN(MX27_PAD_UART2_RTS), 338 IMX_PINCTRL_PIN(MX27_PAD_PWMO), 339 IMX_PINCTRL_PIN(MX27_PAD_UART2_TXD), 340 IMX_PINCTRL_PIN(MX27_PAD_UART2_RXD), 341 IMX_PINCTRL_PIN(MX27_PAD_UART3_TXD), 342 IMX_PINCTRL_PIN(MX27_PAD_UART3_RXD), 343 IMX_PINCTRL_PIN(MX27_PAD_UART3_CTS), 344 IMX_PINCTRL_PIN(MX27_PAD_UART3_RTS), 345 IMX_PINCTRL_PIN(MX27_PAD_UART1_TXD), 346 IMX_PINCTRL_PIN(MX27_PAD_UART1_RXD), 347 IMX_PINCTRL_PIN(MX27_PAD_UART1_CTS), 348 IMX_PINCTRL_PIN(MX27_PAD_UART1_RTS), 349 IMX_PINCTRL_PIN(MX27_PAD_RTCK), 350 IMX_PINCTRL_PIN(MX27_PAD_RESET_OUT_B), 351 IMX_PINCTRL_PIN(MX27_PAD_SD1_D0), 352 IMX_PINCTRL_PIN(MX27_PAD_SD1_D1), 353 IMX_PINCTRL_PIN(MX27_PAD_SD1_D2), 354 IMX_PINCTRL_PIN(MX27_PAD_SD1_D3), 355 IMX_PINCTRL_PIN(MX27_PAD_SD1_CMD), 356 IMX_PINCTRL_PIN(MX27_PAD_SD1_CLK), 357 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_CLK), 358 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA7), 359 360 IMX_PINCTRL_PIN(MX27_PAD_NFRB), 361 IMX_PINCTRL_PIN(MX27_PAD_NFCLE), 362 IMX_PINCTRL_PIN(MX27_PAD_NFWP_B), 363 IMX_PINCTRL_PIN(MX27_PAD_NFCE_B), 364 IMX_PINCTRL_PIN(MX27_PAD_NFALE), 365 IMX_PINCTRL_PIN(MX27_PAD_NFRE_B), 366 IMX_PINCTRL_PIN(MX27_PAD_NFWE_B), 367 IMX_PINCTRL_PIN(MX27_PAD_PC_POE), 368 IMX_PINCTRL_PIN(MX27_PAD_PC_RW_B), 369 IMX_PINCTRL_PIN(MX27_PAD_IOIS16), 370 IMX_PINCTRL_PIN(MX27_PAD_PC_RST), 371 IMX_PINCTRL_PIN(MX27_PAD_PC_BVD2), 372 IMX_PINCTRL_PIN(MX27_PAD_PC_BVD1), 373 IMX_PINCTRL_PIN(MX27_PAD_PC_VS2), 374 IMX_PINCTRL_PIN(MX27_PAD_PC_VS1), 375 IMX_PINCTRL_PIN(MX27_PAD_CLKO), 376 IMX_PINCTRL_PIN(MX27_PAD_PC_PWRON), 377 IMX_PINCTRL_PIN(MX27_PAD_PC_READY), 378 IMX_PINCTRL_PIN(MX27_PAD_PC_WAIT_B), 379 IMX_PINCTRL_PIN(MX27_PAD_PC_CD2_B), 380 IMX_PINCTRL_PIN(MX27_PAD_PC_CD1_B), 381 IMX_PINCTRL_PIN(MX27_PAD_CS4_B), 382 IMX_PINCTRL_PIN(MX27_PAD_CS5_B), 383 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA15), 384 }; 385 386 static struct imx1_pinctrl_soc_info imx27_pinctrl_info = { 387 .pins = imx27_pinctrl_pads, 388 .npins = ARRAY_SIZE(imx27_pinctrl_pads), 389 }; 390 391 static const struct of_device_id imx27_pinctrl_of_match[] = { 392 { .compatible = "fsl,imx27-iomuxc", }, 393 { /* sentinel */ } 394 }; 395 396 static int imx27_pinctrl_probe(struct platform_device *pdev) 397 { 398 return imx1_pinctrl_core_probe(pdev, &imx27_pinctrl_info); 399 } 400 401 static struct platform_driver imx27_pinctrl_driver = { 402 .driver = { 403 .name = "imx27-pinctrl", 404 .of_match_table = of_match_ptr(imx27_pinctrl_of_match), 405 }, 406 .probe = imx27_pinctrl_probe, 407 }; 408 409 static int __init imx27_pinctrl_init(void) 410 { 411 return platform_driver_register(&imx27_pinctrl_driver); 412 } 413 arch_initcall(imx27_pinctrl_init); 414