1 /*
2  * imx25 pinctrl driver.
3  *
4  * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
5  *
6  * This driver was mostly copied from the imx51 pinctrl driver which has:
7  *
8  * Copyright (C) 2012 Freescale Semiconductor, Inc.
9  * Copyright (C) 2012 Linaro, Inc.
10  *
11  * Author: Denis Carikli <denis@eukrea.com>
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License version 2 as published
15  * by the Free Software Foundation.
16  */
17 
18 #include <linux/err.h>
19 #include <linux/init.h>
20 #include <linux/io.h>
21 #include <linux/of.h>
22 #include <linux/of_device.h>
23 #include <linux/pinctrl/pinctrl.h>
24 
25 #include "pinctrl-imx.h"
26 
27 enum imx25_pads {
28 	MX25_PAD_RESERVE0 = 0,
29 	MX25_PAD_RESERVE1 = 1,
30 	MX25_PAD_A10 = 2,
31 	MX25_PAD_A13 = 3,
32 	MX25_PAD_A14 = 4,
33 	MX25_PAD_A15 = 5,
34 	MX25_PAD_A16 = 6,
35 	MX25_PAD_A17 = 7,
36 	MX25_PAD_A18 = 8,
37 	MX25_PAD_A19 = 9,
38 	MX25_PAD_A20 = 10,
39 	MX25_PAD_A21 = 11,
40 	MX25_PAD_A22 = 12,
41 	MX25_PAD_A23 = 13,
42 	MX25_PAD_A24 = 14,
43 	MX25_PAD_A25 = 15,
44 	MX25_PAD_EB0 = 16,
45 	MX25_PAD_EB1 = 17,
46 	MX25_PAD_OE = 18,
47 	MX25_PAD_CS0 = 19,
48 	MX25_PAD_CS1 = 20,
49 	MX25_PAD_CS4 = 21,
50 	MX25_PAD_CS5 = 22,
51 	MX25_PAD_NF_CE0 = 23,
52 	MX25_PAD_ECB = 24,
53 	MX25_PAD_LBA = 25,
54 	MX25_PAD_BCLK = 26,
55 	MX25_PAD_RW = 27,
56 	MX25_PAD_NFWE_B = 28,
57 	MX25_PAD_NFRE_B = 29,
58 	MX25_PAD_NFALE = 30,
59 	MX25_PAD_NFCLE = 31,
60 	MX25_PAD_NFWP_B = 32,
61 	MX25_PAD_NFRB = 33,
62 	MX25_PAD_D15 = 34,
63 	MX25_PAD_D14 = 35,
64 	MX25_PAD_D13 = 36,
65 	MX25_PAD_D12 = 37,
66 	MX25_PAD_D11 = 38,
67 	MX25_PAD_D10 = 39,
68 	MX25_PAD_D9 = 40,
69 	MX25_PAD_D8 = 41,
70 	MX25_PAD_D7 = 42,
71 	MX25_PAD_D6 = 43,
72 	MX25_PAD_D5 = 44,
73 	MX25_PAD_D4 = 45,
74 	MX25_PAD_D3 = 46,
75 	MX25_PAD_D2 = 47,
76 	MX25_PAD_D1 = 48,
77 	MX25_PAD_D0 = 49,
78 	MX25_PAD_LD0 = 50,
79 	MX25_PAD_LD1 = 51,
80 	MX25_PAD_LD2 = 52,
81 	MX25_PAD_LD3 = 53,
82 	MX25_PAD_LD4 = 54,
83 	MX25_PAD_LD5 = 55,
84 	MX25_PAD_LD6 = 56,
85 	MX25_PAD_LD7 = 57,
86 	MX25_PAD_LD8 = 58,
87 	MX25_PAD_LD9 = 59,
88 	MX25_PAD_LD10 = 60,
89 	MX25_PAD_LD11 = 61,
90 	MX25_PAD_LD12 = 62,
91 	MX25_PAD_LD13 = 63,
92 	MX25_PAD_LD14 = 64,
93 	MX25_PAD_LD15 = 65,
94 	MX25_PAD_HSYNC = 66,
95 	MX25_PAD_VSYNC = 67,
96 	MX25_PAD_LSCLK = 68,
97 	MX25_PAD_OE_ACD = 69,
98 	MX25_PAD_CONTRAST = 70,
99 	MX25_PAD_PWM = 71,
100 	MX25_PAD_CSI_D2 = 72,
101 	MX25_PAD_CSI_D3 = 73,
102 	MX25_PAD_CSI_D4 = 74,
103 	MX25_PAD_CSI_D5 = 75,
104 	MX25_PAD_CSI_D6 = 76,
105 	MX25_PAD_CSI_D7 = 77,
106 	MX25_PAD_CSI_D8 = 78,
107 	MX25_PAD_CSI_D9 = 79,
108 	MX25_PAD_CSI_MCLK = 80,
109 	MX25_PAD_CSI_VSYNC = 81,
110 	MX25_PAD_CSI_HSYNC = 82,
111 	MX25_PAD_CSI_PIXCLK = 83,
112 	MX25_PAD_I2C1_CLK = 84,
113 	MX25_PAD_I2C1_DAT = 85,
114 	MX25_PAD_CSPI1_MOSI = 86,
115 	MX25_PAD_CSPI1_MISO = 87,
116 	MX25_PAD_CSPI1_SS0 = 88,
117 	MX25_PAD_CSPI1_SS1 = 89,
118 	MX25_PAD_CSPI1_SCLK = 90,
119 	MX25_PAD_CSPI1_RDY = 91,
120 	MX25_PAD_UART1_RXD = 92,
121 	MX25_PAD_UART1_TXD = 93,
122 	MX25_PAD_UART1_RTS = 94,
123 	MX25_PAD_UART1_CTS = 95,
124 	MX25_PAD_UART2_RXD = 96,
125 	MX25_PAD_UART2_TXD = 97,
126 	MX25_PAD_UART2_RTS = 98,
127 	MX25_PAD_UART2_CTS = 99,
128 	MX25_PAD_SD1_CMD = 100,
129 	MX25_PAD_SD1_CLK = 101,
130 	MX25_PAD_SD1_DATA0 = 102,
131 	MX25_PAD_SD1_DATA1 = 103,
132 	MX25_PAD_SD1_DATA2 = 104,
133 	MX25_PAD_SD1_DATA3 = 105,
134 	MX25_PAD_KPP_ROW0 = 106,
135 	MX25_PAD_KPP_ROW1 = 107,
136 	MX25_PAD_KPP_ROW2 = 108,
137 	MX25_PAD_KPP_ROW3 = 109,
138 	MX25_PAD_KPP_COL0 = 110,
139 	MX25_PAD_KPP_COL1 = 111,
140 	MX25_PAD_KPP_COL2 = 112,
141 	MX25_PAD_KPP_COL3 = 113,
142 	MX25_PAD_FEC_MDC = 114,
143 	MX25_PAD_FEC_MDIO = 115,
144 	MX25_PAD_FEC_TDATA0 = 116,
145 	MX25_PAD_FEC_TDATA1 = 117,
146 	MX25_PAD_FEC_TX_EN = 118,
147 	MX25_PAD_FEC_RDATA0 = 119,
148 	MX25_PAD_FEC_RDATA1 = 120,
149 	MX25_PAD_FEC_RX_DV = 121,
150 	MX25_PAD_FEC_TX_CLK = 122,
151 	MX25_PAD_RTCK = 123,
152 	MX25_PAD_DE_B = 124,
153 	MX25_PAD_GPIO_A = 125,
154 	MX25_PAD_GPIO_B = 126,
155 	MX25_PAD_GPIO_C = 127,
156 	MX25_PAD_GPIO_D = 128,
157 	MX25_PAD_GPIO_E = 129,
158 	MX25_PAD_GPIO_F = 130,
159 	MX25_PAD_EXT_ARMCLK = 131,
160 	MX25_PAD_UPLL_BYPCLK = 132,
161 	MX25_PAD_VSTBY_REQ = 133,
162 	MX25_PAD_VSTBY_ACK = 134,
163 	MX25_PAD_POWER_FAIL  = 135,
164 	MX25_PAD_CLKO = 136,
165 	MX25_PAD_BOOT_MODE0 = 137,
166 	MX25_PAD_BOOT_MODE1 = 138,
167 };
168 
169 /* Pad names for the pinmux subsystem */
170 static const struct pinctrl_pin_desc imx25_pinctrl_pads[] = {
171 	IMX_PINCTRL_PIN(MX25_PAD_RESERVE0),
172 	IMX_PINCTRL_PIN(MX25_PAD_RESERVE1),
173 	IMX_PINCTRL_PIN(MX25_PAD_A10),
174 	IMX_PINCTRL_PIN(MX25_PAD_A13),
175 	IMX_PINCTRL_PIN(MX25_PAD_A14),
176 	IMX_PINCTRL_PIN(MX25_PAD_A15),
177 	IMX_PINCTRL_PIN(MX25_PAD_A16),
178 	IMX_PINCTRL_PIN(MX25_PAD_A17),
179 	IMX_PINCTRL_PIN(MX25_PAD_A18),
180 	IMX_PINCTRL_PIN(MX25_PAD_A19),
181 	IMX_PINCTRL_PIN(MX25_PAD_A20),
182 	IMX_PINCTRL_PIN(MX25_PAD_A21),
183 	IMX_PINCTRL_PIN(MX25_PAD_A22),
184 	IMX_PINCTRL_PIN(MX25_PAD_A23),
185 	IMX_PINCTRL_PIN(MX25_PAD_A24),
186 	IMX_PINCTRL_PIN(MX25_PAD_A25),
187 	IMX_PINCTRL_PIN(MX25_PAD_EB0),
188 	IMX_PINCTRL_PIN(MX25_PAD_EB1),
189 	IMX_PINCTRL_PIN(MX25_PAD_OE),
190 	IMX_PINCTRL_PIN(MX25_PAD_CS0),
191 	IMX_PINCTRL_PIN(MX25_PAD_CS1),
192 	IMX_PINCTRL_PIN(MX25_PAD_CS4),
193 	IMX_PINCTRL_PIN(MX25_PAD_CS5),
194 	IMX_PINCTRL_PIN(MX25_PAD_NF_CE0),
195 	IMX_PINCTRL_PIN(MX25_PAD_ECB),
196 	IMX_PINCTRL_PIN(MX25_PAD_LBA),
197 	IMX_PINCTRL_PIN(MX25_PAD_BCLK),
198 	IMX_PINCTRL_PIN(MX25_PAD_RW),
199 	IMX_PINCTRL_PIN(MX25_PAD_NFWE_B),
200 	IMX_PINCTRL_PIN(MX25_PAD_NFRE_B),
201 	IMX_PINCTRL_PIN(MX25_PAD_NFALE),
202 	IMX_PINCTRL_PIN(MX25_PAD_NFCLE),
203 	IMX_PINCTRL_PIN(MX25_PAD_NFWP_B),
204 	IMX_PINCTRL_PIN(MX25_PAD_NFRB),
205 	IMX_PINCTRL_PIN(MX25_PAD_D15),
206 	IMX_PINCTRL_PIN(MX25_PAD_D14),
207 	IMX_PINCTRL_PIN(MX25_PAD_D13),
208 	IMX_PINCTRL_PIN(MX25_PAD_D12),
209 	IMX_PINCTRL_PIN(MX25_PAD_D11),
210 	IMX_PINCTRL_PIN(MX25_PAD_D10),
211 	IMX_PINCTRL_PIN(MX25_PAD_D9),
212 	IMX_PINCTRL_PIN(MX25_PAD_D8),
213 	IMX_PINCTRL_PIN(MX25_PAD_D7),
214 	IMX_PINCTRL_PIN(MX25_PAD_D6),
215 	IMX_PINCTRL_PIN(MX25_PAD_D5),
216 	IMX_PINCTRL_PIN(MX25_PAD_D4),
217 	IMX_PINCTRL_PIN(MX25_PAD_D3),
218 	IMX_PINCTRL_PIN(MX25_PAD_D2),
219 	IMX_PINCTRL_PIN(MX25_PAD_D1),
220 	IMX_PINCTRL_PIN(MX25_PAD_D0),
221 	IMX_PINCTRL_PIN(MX25_PAD_LD0),
222 	IMX_PINCTRL_PIN(MX25_PAD_LD1),
223 	IMX_PINCTRL_PIN(MX25_PAD_LD2),
224 	IMX_PINCTRL_PIN(MX25_PAD_LD3),
225 	IMX_PINCTRL_PIN(MX25_PAD_LD4),
226 	IMX_PINCTRL_PIN(MX25_PAD_LD5),
227 	IMX_PINCTRL_PIN(MX25_PAD_LD6),
228 	IMX_PINCTRL_PIN(MX25_PAD_LD7),
229 	IMX_PINCTRL_PIN(MX25_PAD_LD8),
230 	IMX_PINCTRL_PIN(MX25_PAD_LD9),
231 	IMX_PINCTRL_PIN(MX25_PAD_LD10),
232 	IMX_PINCTRL_PIN(MX25_PAD_LD11),
233 	IMX_PINCTRL_PIN(MX25_PAD_LD12),
234 	IMX_PINCTRL_PIN(MX25_PAD_LD13),
235 	IMX_PINCTRL_PIN(MX25_PAD_LD14),
236 	IMX_PINCTRL_PIN(MX25_PAD_LD15),
237 	IMX_PINCTRL_PIN(MX25_PAD_HSYNC),
238 	IMX_PINCTRL_PIN(MX25_PAD_VSYNC),
239 	IMX_PINCTRL_PIN(MX25_PAD_LSCLK),
240 	IMX_PINCTRL_PIN(MX25_PAD_OE_ACD),
241 	IMX_PINCTRL_PIN(MX25_PAD_CONTRAST),
242 	IMX_PINCTRL_PIN(MX25_PAD_PWM),
243 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D2),
244 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D3),
245 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D4),
246 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D5),
247 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D6),
248 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D7),
249 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D8),
250 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D9),
251 	IMX_PINCTRL_PIN(MX25_PAD_CSI_MCLK),
252 	IMX_PINCTRL_PIN(MX25_PAD_CSI_VSYNC),
253 	IMX_PINCTRL_PIN(MX25_PAD_CSI_HSYNC),
254 	IMX_PINCTRL_PIN(MX25_PAD_CSI_PIXCLK),
255 	IMX_PINCTRL_PIN(MX25_PAD_I2C1_CLK),
256 	IMX_PINCTRL_PIN(MX25_PAD_I2C1_DAT),
257 	IMX_PINCTRL_PIN(MX25_PAD_CSPI1_MOSI),
258 	IMX_PINCTRL_PIN(MX25_PAD_CSPI1_MISO),
259 	IMX_PINCTRL_PIN(MX25_PAD_CSPI1_SS0),
260 	IMX_PINCTRL_PIN(MX25_PAD_CSPI1_SS1),
261 	IMX_PINCTRL_PIN(MX25_PAD_CSPI1_SCLK),
262 	IMX_PINCTRL_PIN(MX25_PAD_CSPI1_RDY),
263 	IMX_PINCTRL_PIN(MX25_PAD_UART1_RXD),
264 	IMX_PINCTRL_PIN(MX25_PAD_UART1_TXD),
265 	IMX_PINCTRL_PIN(MX25_PAD_UART1_RTS),
266 	IMX_PINCTRL_PIN(MX25_PAD_UART1_CTS),
267 	IMX_PINCTRL_PIN(MX25_PAD_UART2_RXD),
268 	IMX_PINCTRL_PIN(MX25_PAD_UART2_TXD),
269 	IMX_PINCTRL_PIN(MX25_PAD_UART2_RTS),
270 	IMX_PINCTRL_PIN(MX25_PAD_UART2_CTS),
271 	IMX_PINCTRL_PIN(MX25_PAD_SD1_CMD),
272 	IMX_PINCTRL_PIN(MX25_PAD_SD1_CLK),
273 	IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA0),
274 	IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA1),
275 	IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA2),
276 	IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA3),
277 	IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW0),
278 	IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW1),
279 	IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW2),
280 	IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW3),
281 	IMX_PINCTRL_PIN(MX25_PAD_KPP_COL0),
282 	IMX_PINCTRL_PIN(MX25_PAD_KPP_COL1),
283 	IMX_PINCTRL_PIN(MX25_PAD_KPP_COL2),
284 	IMX_PINCTRL_PIN(MX25_PAD_KPP_COL3),
285 	IMX_PINCTRL_PIN(MX25_PAD_FEC_MDC),
286 	IMX_PINCTRL_PIN(MX25_PAD_FEC_MDIO),
287 	IMX_PINCTRL_PIN(MX25_PAD_FEC_TDATA0),
288 	IMX_PINCTRL_PIN(MX25_PAD_FEC_TDATA1),
289 	IMX_PINCTRL_PIN(MX25_PAD_FEC_TX_EN),
290 	IMX_PINCTRL_PIN(MX25_PAD_FEC_RDATA0),
291 	IMX_PINCTRL_PIN(MX25_PAD_FEC_RDATA1),
292 	IMX_PINCTRL_PIN(MX25_PAD_FEC_RX_DV),
293 	IMX_PINCTRL_PIN(MX25_PAD_FEC_TX_CLK),
294 	IMX_PINCTRL_PIN(MX25_PAD_RTCK),
295 	IMX_PINCTRL_PIN(MX25_PAD_DE_B),
296 	IMX_PINCTRL_PIN(MX25_PAD_GPIO_A),
297 	IMX_PINCTRL_PIN(MX25_PAD_GPIO_B),
298 	IMX_PINCTRL_PIN(MX25_PAD_GPIO_C),
299 	IMX_PINCTRL_PIN(MX25_PAD_GPIO_D),
300 	IMX_PINCTRL_PIN(MX25_PAD_GPIO_E),
301 	IMX_PINCTRL_PIN(MX25_PAD_GPIO_F),
302 	IMX_PINCTRL_PIN(MX25_PAD_EXT_ARMCLK),
303 	IMX_PINCTRL_PIN(MX25_PAD_UPLL_BYPCLK),
304 	IMX_PINCTRL_PIN(MX25_PAD_VSTBY_REQ),
305 	IMX_PINCTRL_PIN(MX25_PAD_VSTBY_ACK),
306 	IMX_PINCTRL_PIN(MX25_PAD_POWER_FAIL),
307 	IMX_PINCTRL_PIN(MX25_PAD_CLKO),
308 	IMX_PINCTRL_PIN(MX25_PAD_BOOT_MODE0),
309 	IMX_PINCTRL_PIN(MX25_PAD_BOOT_MODE1),
310 };
311 
312 static const struct imx_pinctrl_soc_info imx25_pinctrl_info = {
313 	.pins = imx25_pinctrl_pads,
314 	.npins = ARRAY_SIZE(imx25_pinctrl_pads),
315 };
316 
317 static const struct of_device_id imx25_pinctrl_of_match[] = {
318 	{ .compatible = "fsl,imx25-iomuxc", },
319 	{ /* sentinel */ }
320 };
321 
322 static int imx25_pinctrl_probe(struct platform_device *pdev)
323 {
324 	return imx_pinctrl_probe(pdev, &imx25_pinctrl_info);
325 }
326 
327 static struct platform_driver imx25_pinctrl_driver = {
328 	.driver = {
329 		.name = "imx25-pinctrl",
330 		.of_match_table = of_match_ptr(imx25_pinctrl_of_match),
331 	},
332 	.probe = imx25_pinctrl_probe,
333 };
334 
335 static int __init imx25_pinctrl_init(void)
336 {
337 	return platform_driver_register(&imx25_pinctrl_driver);
338 }
339 arch_initcall(imx25_pinctrl_init);
340