1 /* 2 * IMX pinmux core definitions 3 * 4 * Copyright (C) 2012 Freescale Semiconductor, Inc. 5 * Copyright (C) 2012 Linaro Ltd. 6 * 7 * Author: Dong Aisheng <dong.aisheng@linaro.org> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 */ 14 15 #ifndef __DRIVERS_PINCTRL_IMX_H 16 #define __DRIVERS_PINCTRL_IMX_H 17 18 #include <linux/pinctrl/pinconf-generic.h> 19 20 struct platform_device; 21 22 /** 23 * struct imx_pin - describes a single i.MX pin 24 * @pin: the pin_id of this pin 25 * @mux_mode: the mux mode for this pin. 26 * @input_reg: the select input register offset for this pin if any 27 * 0 if no select input setting needed. 28 * @input_val: the select input value for this pin. 29 * @configs: the config for this pin. 30 */ 31 struct imx_pin { 32 unsigned int pin; 33 unsigned int mux_mode; 34 u16 input_reg; 35 unsigned int input_val; 36 unsigned long config; 37 }; 38 39 /** 40 * struct imx_pin_reg - describe a pin reg map 41 * @mux_reg: mux register offset 42 * @conf_reg: config register offset 43 */ 44 struct imx_pin_reg { 45 s16 mux_reg; 46 s16 conf_reg; 47 }; 48 49 /* decode a generic config into raw register value */ 50 struct imx_cfg_params_decode { 51 enum pin_config_param param; 52 u32 mask; 53 u8 shift; 54 bool invert; 55 }; 56 57 struct imx_pinctrl_soc_info { 58 struct device *dev; 59 const struct pinctrl_pin_desc *pins; 60 unsigned int npins; 61 struct imx_pin_reg *pin_regs; 62 unsigned int group_index; 63 unsigned int flags; 64 const char *gpr_compatible; 65 struct mutex mutex; 66 67 /* MUX_MODE shift and mask in case SHARE_MUX_CONF_REG */ 68 unsigned int mux_mask; 69 u8 mux_shift; 70 71 /* generic pinconf */ 72 bool generic_pinconf; 73 const struct pinconf_generic_params *custom_params; 74 unsigned int num_custom_params; 75 struct imx_cfg_params_decode *decodes; 76 unsigned int num_decodes; 77 void (*fixup)(unsigned long *configs, unsigned int num_configs, 78 u32 *raw_config); 79 }; 80 81 #define IMX_CFG_PARAMS_DECODE(p, m, o) \ 82 { .param = p, .mask = m, .shift = o, .invert = false, } 83 84 #define IMX_CFG_PARAMS_DECODE_INVERT(p, m, o) \ 85 { .param = p, .mask = m, .shift = o, .invert = true, } 86 87 #define SHARE_MUX_CONF_REG 0x1 88 #define ZERO_OFFSET_VALID 0x2 89 90 #define NO_MUX 0x0 91 #define NO_PAD 0x0 92 93 #define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin) 94 95 #define PAD_CTL_MASK(len) ((1 << len) - 1) 96 #define IMX_MUX_MASK 0x7 97 #define IOMUXC_CONFIG_SION (0x1 << 4) 98 99 int imx_pinctrl_probe(struct platform_device *pdev, 100 struct imx_pinctrl_soc_info *info); 101 #endif /* __DRIVERS_PINCTRL_IMX_H */ 102