xref: /openbmc/linux/drivers/pinctrl/bcm/Kconfig (revision ba61bb17)
1#
2# Broadcom pinctrl drivers
3#
4
5config PINCTRL_BCM281XX
6	bool "Broadcom BCM281xx pinctrl driver"
7	depends on OF && (ARCH_BCM_MOBILE || COMPILE_TEST)
8	select PINMUX
9	select PINCONF
10	select GENERIC_PINCONF
11	select REGMAP_MMIO
12	default ARCH_BCM_MOBILE
13	help
14	  Say Y here to support Broadcom BCM281xx pinctrl driver, which is used
15	  for the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351,
16	  BCM28145, and BCM28155 SoCs.  This driver requires the pinctrl
17	  framework.  GPIO is provided by a separate GPIO driver.
18
19config PINCTRL_BCM2835
20	bool
21	select PINMUX
22	select PINCONF
23	select GENERIC_PINCONF
24	select GPIOLIB_IRQCHIP
25
26config PINCTRL_IPROC_GPIO
27	bool "Broadcom iProc GPIO (with PINCONF) driver"
28	depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
29	select GPIOLIB_IRQCHIP
30	select PINCONF
31	select GENERIC_PINCONF
32	default ARCH_BCM_IPROC
33	help
34	  Say yes here to enable the Broadcom iProc GPIO driver.
35
36	  The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use
37	  same GPIO Controller IP hence this driver could be used for all.
38
39	  The Broadcom Cygnus SoC has 3 GPIO controllers including the ASIU
40	  GPIO controller (ASIU), the chipCommonG GPIO controller (CCM), and
41	  the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
42	  supported by this driver.
43
44	  The Broadcom NSP has two GPIO controllers including the ChipcommonA
45	  GPIO, the ChipcommonB GPIO. Later controller is supported by this
46	  driver.
47
48	  The Broadcom NS2 has two GPIO controller including the CRMU GPIO,
49	  the ChipcommonG GPIO. Both controllers are supported by this driver.
50
51	  The Broadcom Stingray GPIO controllers are supported by this driver.
52
53	  All above SoCs GPIO controllers support basic PINCONF functions such
54	  as bias pull up, pull down, and drive strength configurations, when
55	  these pins are muxed to GPIO.
56
57	  It provides the framework where pins from the individual GPIO can be
58	  individually muxed to GPIO function, through interaction with the
59	  SoCs IOMUX controller. This features could be used only on SoCs which
60	  support individual pin muxing.
61
62config PINCTRL_CYGNUS_MUX
63	bool "Broadcom Cygnus IOMUX driver"
64	depends on (ARCH_BCM_CYGNUS || COMPILE_TEST)
65	depends on OF
66	select PINMUX
67	select GENERIC_PINCONF
68	default ARCH_BCM_CYGNUS
69	help
70	  Say yes here to enable the Broadcom Cygnus IOMUX driver.
71
72	  The Broadcom Cygnus IOMUX driver supports group based IOMUX
73	  configuration, with the exception that certain individual pins
74	  can be overridden to GPIO function
75
76config PINCTRL_NSP_GPIO
77	bool "Broadcom NSP GPIO (with PINCONF) driver"
78	depends on OF_GPIO && (ARCH_BCM_NSP || COMPILE_TEST)
79	select GPIOLIB_IRQCHIP
80	select PINCONF
81	select GENERIC_PINCONF
82	default ARCH_BCM_NSP
83	help
84	  Say yes here to enable the Broadcom NSP GPIO driver.
85
86	  The Broadcom Northstar Plus SoC ChipcommonA GPIO controller is
87	  supported by this driver.
88
89	  The ChipcommonA GPIO controller support basic PINCONF functions such
90	  as bias pull up, pull down, and drive strength configurations, when
91	  these pins are muxed to GPIO.
92
93config PINCTRL_NS2_MUX
94	bool "Broadcom Northstar2 pinmux driver"
95	depends on OF
96	depends on ARCH_BCM_IPROC || COMPILE_TEST
97	select PINMUX
98	select GENERIC_PINCONF
99	default ARM64 && ARCH_BCM_IPROC
100	help
101	  Say yes here to enable the Broadcom NS2 MUX driver.
102
103	  The Broadcom Northstar2 IOMUX driver supports group based IOMUX
104	  configuration.
105
106config PINCTRL_NSP_MUX
107	bool "Broadcom NSP IOMUX driver"
108	depends on (ARCH_BCM_NSP || COMPILE_TEST)
109	depends on OF
110	select PINMUX
111	select GENERIC_PINCONF
112	default ARCH_BCM_NSP
113	help
114	  Say yes here to enable the Broadcom NSP SOC IOMUX driver.
115
116	  The Broadcom Northstar Plus IOMUX driver supports pin based IOMUX
117	  configuration, with certain individual pins can be overridden
118	  to GPIO function.
119