1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2016 IBM Corp. 4 */ 5 #include <linux/bitops.h> 6 #include <linux/init.h> 7 #include <linux/io.h> 8 #include <linux/kernel.h> 9 #include <linux/mutex.h> 10 #include <linux/of.h> 11 #include <linux/platform_device.h> 12 #include <linux/pinctrl/pinctrl.h> 13 #include <linux/pinctrl/pinmux.h> 14 #include <linux/pinctrl/pinconf.h> 15 #include <linux/pinctrl/pinconf-generic.h> 16 #include <linux/string.h> 17 #include <linux/types.h> 18 19 #include "../core.h" 20 #include "../pinctrl-utils.h" 21 #include "pinctrl-aspeed.h" 22 23 /* 24 * Uses undefined macros for symbol naming and references, eg GPIOA0, MAC1LINK, 25 * TIMER3 etc. 26 * 27 * Pins are defined in GPIO bank order: 28 * 29 * GPIOA0: 0 30 * ... 31 * GPIOA7: 7 32 * GPIOB0: 8 33 * ... 34 * GPIOZ7: 207 35 * GPIOAA0: 208 36 * ... 37 * GPIOAB3: 219 38 * 39 * Not all pins have their signals defined (yet). 40 */ 41 42 #define D6 0 43 SSSF_PIN_DECL(D6, GPIOA0, MAC1LINK, SIG_DESC_SET(SCU80, 0)); 44 45 #define B5 1 46 SSSF_PIN_DECL(B5, GPIOA1, MAC2LINK, SIG_DESC_SET(SCU80, 1)); 47 48 #define A4 2 49 SSSF_PIN_DECL(A4, GPIOA2, TIMER3, SIG_DESC_SET(SCU80, 2)); 50 51 #define E6 3 52 SSSF_PIN_DECL(E6, GPIOA3, TIMER4, SIG_DESC_SET(SCU80, 3)); 53 54 #define I2C9_DESC SIG_DESC_SET(SCU90, 22) 55 56 #define C5 4 57 SIG_EXPR_LIST_DECL_SINGLE(SCL9, I2C9, I2C9_DESC); 58 SIG_EXPR_LIST_DECL_SINGLE(TIMER5, TIMER5, SIG_DESC_SET(SCU80, 4)); 59 MS_PIN_DECL(C5, GPIOA4, SCL9, TIMER5); 60 61 FUNC_GROUP_DECL(TIMER5, C5); 62 63 #define B4 5 64 SIG_EXPR_LIST_DECL_SINGLE(SDA9, I2C9, I2C9_DESC); 65 SIG_EXPR_LIST_DECL_SINGLE(TIMER6, TIMER6, SIG_DESC_SET(SCU80, 5)); 66 MS_PIN_DECL(B4, GPIOA5, SDA9, TIMER6); 67 68 FUNC_GROUP_DECL(TIMER6, B4); 69 FUNC_GROUP_DECL(I2C9, C5, B4); 70 71 #define MDIO2_DESC SIG_DESC_SET(SCU90, 2) 72 73 #define A3 6 74 SIG_EXPR_LIST_DECL_SINGLE(MDC2, MDIO2, MDIO2_DESC); 75 SIG_EXPR_LIST_DECL_SINGLE(TIMER7, TIMER7, SIG_DESC_SET(SCU80, 6)); 76 MS_PIN_DECL(A3, GPIOA6, MDC2, TIMER7); 77 78 FUNC_GROUP_DECL(TIMER7, A3); 79 80 #define D5 7 81 SIG_EXPR_LIST_DECL_SINGLE(MDIO2, MDIO2, MDIO2_DESC); 82 SIG_EXPR_LIST_DECL_SINGLE(TIMER8, TIMER8, SIG_DESC_SET(SCU80, 7)); 83 MS_PIN_DECL(D5, GPIOA7, MDIO2, TIMER8); 84 85 FUNC_GROUP_DECL(TIMER8, D5); 86 FUNC_GROUP_DECL(MDIO2, A3, D5); 87 88 #define J21 8 89 SSSF_PIN_DECL(J21, GPIOB0, SALT1, SIG_DESC_SET(SCU80, 8)); 90 91 #define J20 9 92 SSSF_PIN_DECL(J20, GPIOB1, SALT2, SIG_DESC_SET(SCU80, 9)); 93 94 #define H18 10 95 SSSF_PIN_DECL(H18, GPIOB2, SALT3, SIG_DESC_SET(SCU80, 10)); 96 97 #define F18 11 98 SSSF_PIN_DECL(F18, GPIOB3, SALT4, SIG_DESC_SET(SCU80, 11)); 99 100 #define E19 12 101 SIG_EXPR_DECL(LPCRST, LPCRST, SIG_DESC_SET(SCU80, 12)); 102 SIG_EXPR_DECL(LPCRST, LPCRSTS, SIG_DESC_SET(HW_STRAP1, 14)); 103 SIG_EXPR_LIST_DECL_DUAL(LPCRST, LPCRST, LPCRSTS); 104 SS_PIN_DECL(E19, GPIOB4, LPCRST); 105 106 FUNC_GROUP_DECL(LPCRST, E19); 107 108 #define H19 13 109 #define H19_DESC SIG_DESC_SET(SCU80, 13) 110 SIG_EXPR_LIST_DECL_SINGLE(LPCPD, LPCPD, H19_DESC); 111 SIG_EXPR_LIST_DECL_SINGLE(LPCSMI, LPCSMI, H19_DESC); 112 MS_PIN_DECL(H19, GPIOB5, LPCPD, LPCSMI); 113 114 FUNC_GROUP_DECL(LPCPD, H19); 115 FUNC_GROUP_DECL(LPCSMI, H19); 116 117 #define H20 14 118 SSSF_PIN_DECL(H20, GPIOB6, LPCPME, SIG_DESC_SET(SCU80, 14)); 119 120 #define E18 15 121 SIG_EXPR_LIST_DECL_SINGLE(EXTRST, EXTRST, 122 SIG_DESC_SET(SCU80, 15), 123 SIG_DESC_BIT(SCU90, 31, 0), 124 SIG_DESC_SET(SCU3C, 3)); 125 SIG_EXPR_LIST_DECL_SINGLE(SPICS1, SPICS1, 126 SIG_DESC_SET(SCU80, 15), 127 SIG_DESC_SET(SCU90, 31)); 128 MS_PIN_DECL(E18, GPIOB7, EXTRST, SPICS1); 129 130 FUNC_GROUP_DECL(EXTRST, E18); 131 FUNC_GROUP_DECL(SPICS1, E18); 132 133 #define SD1_DESC SIG_DESC_SET(SCU90, 0) 134 #define I2C10_DESC SIG_DESC_SET(SCU90, 23) 135 136 #define C4 16 137 SIG_EXPR_LIST_DECL_SINGLE(SD1CLK, SD1, SD1_DESC); 138 SIG_EXPR_LIST_DECL_SINGLE(SCL10, I2C10, I2C10_DESC); 139 MS_PIN_DECL(C4, GPIOC0, SD1CLK, SCL10); 140 141 #define B3 17 142 SIG_EXPR_LIST_DECL_SINGLE(SD1CMD, SD1, SD1_DESC); 143 SIG_EXPR_LIST_DECL_SINGLE(SDA10, I2C10, I2C10_DESC); 144 MS_PIN_DECL(B3, GPIOC1, SD1CMD, SDA10); 145 146 FUNC_GROUP_DECL(I2C10, C4, B3); 147 148 #define I2C11_DESC SIG_DESC_SET(SCU90, 24) 149 150 #define A2 18 151 SIG_EXPR_LIST_DECL_SINGLE(SD1DAT0, SD1, SD1_DESC); 152 SIG_EXPR_LIST_DECL_SINGLE(SCL11, I2C11, I2C11_DESC); 153 MS_PIN_DECL(A2, GPIOC2, SD1DAT0, SCL11); 154 155 #define E5 19 156 SIG_EXPR_LIST_DECL_SINGLE(SD1DAT1, SD1, SD1_DESC); 157 SIG_EXPR_LIST_DECL_SINGLE(SDA11, I2C11, I2C11_DESC); 158 MS_PIN_DECL(E5, GPIOC3, SD1DAT1, SDA11); 159 160 FUNC_GROUP_DECL(I2C11, A2, E5); 161 162 #define I2C12_DESC SIG_DESC_SET(SCU90, 25) 163 164 #define D4 20 165 SIG_EXPR_LIST_DECL_SINGLE(SD1DAT2, SD1, SD1_DESC); 166 SIG_EXPR_LIST_DECL_SINGLE(SCL12, I2C12, I2C12_DESC); 167 MS_PIN_DECL(D4, GPIOC4, SD1DAT2, SCL12); 168 169 #define C3 21 170 SIG_EXPR_LIST_DECL_SINGLE(SD1DAT3, SD1, SD1_DESC); 171 SIG_EXPR_LIST_DECL_SINGLE(SDA12, I2C12, I2C12_DESC); 172 MS_PIN_DECL(C3, GPIOC5, SD1DAT3, SDA12); 173 174 FUNC_GROUP_DECL(I2C12, D4, C3); 175 176 #define I2C13_DESC SIG_DESC_SET(SCU90, 26) 177 178 #define B2 22 179 SIG_EXPR_LIST_DECL_SINGLE(SD1CD, SD1, SD1_DESC); 180 SIG_EXPR_LIST_DECL_SINGLE(SCL13, I2C13, I2C13_DESC); 181 MS_PIN_DECL(B2, GPIOC6, SD1CD, SCL13); 182 183 #define A1 23 184 SIG_EXPR_LIST_DECL_SINGLE(SD1WP, SD1, SD1_DESC); 185 SIG_EXPR_LIST_DECL_SINGLE(SDA13, I2C13, I2C13_DESC); 186 MS_PIN_DECL(A1, GPIOC7, SD1WP, SDA13); 187 188 FUNC_GROUP_DECL(I2C13, B2, A1); 189 FUNC_GROUP_DECL(SD1, C4, B3, A2, E5, D4, C3, B2, A1); 190 191 #define SD2_DESC SIG_DESC_SET(SCU90, 1) 192 #define GPID_DESC SIG_DESC_SET(HW_STRAP1, 21) 193 #define GPID0_DESC SIG_DESC_SET(SCU8C, 8) 194 195 #define A18 24 196 SIG_EXPR_LIST_DECL_SINGLE(SD2CLK, SD2, SD2_DESC); 197 SIG_EXPR_DECL(GPID0IN, GPID0, GPID0_DESC); 198 SIG_EXPR_DECL(GPID0IN, GPID, GPID_DESC); 199 SIG_EXPR_LIST_DECL_DUAL(GPID0IN, GPID0, GPID); 200 MS_PIN_DECL(A18, GPIOD0, SD2CLK, GPID0IN); 201 202 #define D16 25 203 SIG_EXPR_LIST_DECL_SINGLE(SD2CMD, SD2, SD2_DESC); 204 SIG_EXPR_DECL(GPID0OUT, GPID0, GPID0_DESC); 205 SIG_EXPR_DECL(GPID0OUT, GPID, GPID_DESC); 206 SIG_EXPR_LIST_DECL_DUAL(GPID0OUT, GPID0, GPID); 207 MS_PIN_DECL(D16, GPIOD1, SD2CMD, GPID0OUT); 208 209 FUNC_GROUP_DECL(GPID0, A18, D16); 210 211 #define GPID2_DESC SIG_DESC_SET(SCU8C, 9) 212 213 #define B17 26 214 SIG_EXPR_LIST_DECL_SINGLE(SD2DAT0, SD2, SD2_DESC); 215 SIG_EXPR_DECL(GPID2IN, GPID2, GPID2_DESC); 216 SIG_EXPR_DECL(GPID2IN, GPID, GPID_DESC); 217 SIG_EXPR_LIST_DECL_DUAL(GPID2IN, GPID2, GPID); 218 MS_PIN_DECL(B17, GPIOD2, SD2DAT0, GPID2IN); 219 220 #define A17 27 221 SIG_EXPR_LIST_DECL_SINGLE(SD2DAT1, SD2, SD2_DESC); 222 SIG_EXPR_DECL(GPID2OUT, GPID2, GPID2_DESC); 223 SIG_EXPR_DECL(GPID2OUT, GPID, GPID_DESC); 224 SIG_EXPR_LIST_DECL_DUAL(GPID2OUT, GPID2, GPID); 225 MS_PIN_DECL(A17, GPIOD3, SD2DAT1, GPID2OUT); 226 227 FUNC_GROUP_DECL(GPID2, B17, A17); 228 229 #define GPID4_DESC SIG_DESC_SET(SCU8C, 10) 230 231 #define C16 28 232 SIG_EXPR_LIST_DECL_SINGLE(SD2DAT2, SD2, SD2_DESC); 233 SIG_EXPR_DECL(GPID4IN, GPID4, GPID4_DESC); 234 SIG_EXPR_DECL(GPID4IN, GPID, GPID_DESC); 235 SIG_EXPR_LIST_DECL_DUAL(GPID4IN, GPID4, GPID); 236 MS_PIN_DECL(C16, GPIOD4, SD2DAT2, GPID4IN); 237 238 #define B16 29 239 SIG_EXPR_LIST_DECL_SINGLE(SD2DAT3, SD2, SD2_DESC); 240 SIG_EXPR_DECL(GPID4OUT, GPID4, GPID4_DESC); 241 SIG_EXPR_DECL(GPID4OUT, GPID, GPID_DESC); 242 SIG_EXPR_LIST_DECL_DUAL(GPID4OUT, GPID4, GPID); 243 MS_PIN_DECL(B16, GPIOD5, SD2DAT3, GPID4OUT); 244 245 FUNC_GROUP_DECL(GPID4, C16, B16); 246 247 #define GPID6_DESC SIG_DESC_SET(SCU8C, 11) 248 249 #define A16 30 250 SIG_EXPR_LIST_DECL_SINGLE(SD2CD, SD2, SD2_DESC); 251 SIG_EXPR_DECL(GPID6IN, GPID6, GPID6_DESC); 252 SIG_EXPR_DECL(GPID6IN, GPID, GPID_DESC); 253 SIG_EXPR_LIST_DECL_DUAL(GPID6IN, GPID6, GPID); 254 MS_PIN_DECL(A16, GPIOD6, SD2CD, GPID6IN); 255 256 #define E15 31 257 SIG_EXPR_LIST_DECL_SINGLE(SD2WP, SD2, SD2_DESC); 258 SIG_EXPR_DECL(GPID6OUT, GPID6, GPID6_DESC); 259 SIG_EXPR_DECL(GPID6OUT, GPID, GPID_DESC); 260 SIG_EXPR_LIST_DECL_DUAL(GPID6OUT, GPID6, GPID); 261 MS_PIN_DECL(E15, GPIOD7, SD2WP, GPID6OUT); 262 263 FUNC_GROUP_DECL(GPID6, A16, E15); 264 FUNC_GROUP_DECL(SD2, A18, D16, B17, A17, C16, B16, A16, E15); 265 FUNC_GROUP_DECL(GPID, A18, D16, B17, A17, C16, B16, A16, E15); 266 267 #define GPIE_DESC SIG_DESC_SET(HW_STRAP1, 22) 268 #define GPIE0_DESC SIG_DESC_SET(SCU8C, 12) 269 #define GPIE2_DESC SIG_DESC_SET(SCU8C, 13) 270 #define GPIE4_DESC SIG_DESC_SET(SCU8C, 14) 271 #define GPIE6_DESC SIG_DESC_SET(SCU8C, 15) 272 273 #define D15 32 274 SIG_EXPR_LIST_DECL_SINGLE(NCTS3, NCTS3, SIG_DESC_SET(SCU80, 16)); 275 SIG_EXPR_DECL(GPIE0IN, GPIE0, GPIE0_DESC); 276 SIG_EXPR_DECL(GPIE0IN, GPIE, GPIE_DESC); 277 SIG_EXPR_LIST_DECL_DUAL(GPIE0IN, GPIE0, GPIE); 278 MS_PIN_DECL(D15, GPIOE0, NCTS3, GPIE0IN); 279 280 FUNC_GROUP_DECL(NCTS3, D15); 281 282 #define C15 33 283 SIG_EXPR_LIST_DECL_SINGLE(NDCD3, NDCD3, SIG_DESC_SET(SCU80, 17)); 284 SIG_EXPR_DECL(GPIE0OUT, GPIE0, GPIE0_DESC); 285 SIG_EXPR_DECL(GPIE0OUT, GPIE, GPIE_DESC); 286 SIG_EXPR_LIST_DECL_DUAL(GPIE0OUT, GPIE0, GPIE); 287 MS_PIN_DECL(C15, GPIOE1, NDCD3, GPIE0OUT); 288 289 FUNC_GROUP_DECL(NDCD3, C15); 290 FUNC_GROUP_DECL(GPIE0, D15, C15); 291 292 #define B15 34 293 SIG_EXPR_LIST_DECL_SINGLE(NDSR3, NDSR3, SIG_DESC_SET(SCU80, 18)); 294 SIG_EXPR_DECL(GPIE2IN, GPIE2, GPIE2_DESC); 295 SIG_EXPR_DECL(GPIE2IN, GPIE, GPIE_DESC); 296 SIG_EXPR_LIST_DECL_DUAL(GPIE2IN, GPIE2, GPIE); 297 MS_PIN_DECL(B15, GPIOE2, NDSR3, GPIE2IN); 298 299 FUNC_GROUP_DECL(NDSR3, B15); 300 301 #define A15 35 302 SIG_EXPR_LIST_DECL_SINGLE(NRI3, NRI3, SIG_DESC_SET(SCU80, 19)); 303 SIG_EXPR_DECL(GPIE2OUT, GPIE2, GPIE2_DESC); 304 SIG_EXPR_DECL(GPIE2OUT, GPIE, GPIE_DESC); 305 SIG_EXPR_LIST_DECL_DUAL(GPIE2OUT, GPIE2, GPIE); 306 MS_PIN_DECL(A15, GPIOE3, NRI3, GPIE2OUT); 307 308 FUNC_GROUP_DECL(NRI3, A15); 309 FUNC_GROUP_DECL(GPIE2, B15, A15); 310 311 #define E14 36 312 SIG_EXPR_LIST_DECL_SINGLE(NDTR3, NDTR3, SIG_DESC_SET(SCU80, 20)); 313 SIG_EXPR_DECL(GPIE4IN, GPIE4, GPIE4_DESC); 314 SIG_EXPR_DECL(GPIE4IN, GPIE, GPIE_DESC); 315 SIG_EXPR_LIST_DECL_DUAL(GPIE4IN, GPIE4, GPIE); 316 MS_PIN_DECL(E14, GPIOE4, NDTR3, GPIE4IN); 317 318 FUNC_GROUP_DECL(NDTR3, E14); 319 320 #define D14 37 321 SIG_EXPR_LIST_DECL_SINGLE(NRTS3, NRTS3, SIG_DESC_SET(SCU80, 21)); 322 SIG_EXPR_DECL(GPIE4OUT, GPIE4, GPIE4_DESC); 323 SIG_EXPR_DECL(GPIE4OUT, GPIE, GPIE_DESC); 324 SIG_EXPR_LIST_DECL_DUAL(GPIE4OUT, GPIE4, GPIE); 325 MS_PIN_DECL(D14, GPIOE5, NRTS3, GPIE4OUT); 326 327 FUNC_GROUP_DECL(NRTS3, D14); 328 FUNC_GROUP_DECL(GPIE4, E14, D14); 329 330 #define C14 38 331 SIG_EXPR_LIST_DECL_SINGLE(TXD3, TXD3, SIG_DESC_SET(SCU80, 22)); 332 SIG_EXPR_DECL(GPIE6IN, GPIE6, GPIE6_DESC); 333 SIG_EXPR_DECL(GPIE6IN, GPIE, GPIE_DESC); 334 SIG_EXPR_LIST_DECL_DUAL(GPIE6IN, GPIE6, GPIE); 335 MS_PIN_DECL(C14, GPIOE6, TXD3, GPIE6IN); 336 337 FUNC_GROUP_DECL(TXD3, C14); 338 339 #define B14 39 340 SIG_EXPR_LIST_DECL_SINGLE(RXD3, RXD3, SIG_DESC_SET(SCU80, 23)); 341 SIG_EXPR_DECL(GPIE6OUT, GPIE6, GPIE6_DESC); 342 SIG_EXPR_DECL(GPIE6OUT, GPIE, GPIE_DESC); 343 SIG_EXPR_LIST_DECL_DUAL(GPIE6OUT, GPIE6, GPIE); 344 MS_PIN_DECL(B14, GPIOE7, RXD3, GPIE6OUT); 345 346 FUNC_GROUP_DECL(RXD3, B14); 347 FUNC_GROUP_DECL(GPIE6, C14, B14); 348 349 #define D18 40 350 SSSF_PIN_DECL(D18, GPIOF0, NCTS4, SIG_DESC_SET(SCU80, 24)); 351 352 #define ACPI_DESC SIG_DESC_BIT(HW_STRAP1, 19, 0) 353 354 #define B19 41 355 SIG_EXPR_LIST_DECL_SINGLE(NDCD4, NDCD4, SIG_DESC_SET(SCU80, 25)); 356 SIG_EXPR_DECL(SIOPBI, SIOPBI, SIG_DESC_SET(SCUA4, 12)); 357 SIG_EXPR_DECL(SIOPBI, ACPI, ACPI_DESC); 358 SIG_EXPR_LIST_DECL_DUAL(SIOPBI, SIOPBI, ACPI); 359 MS_PIN_DECL(B19, GPIOF1, NDCD4, SIOPBI); 360 FUNC_GROUP_DECL(NDCD4, B19); 361 FUNC_GROUP_DECL(SIOPBI, B19); 362 363 #define A20 42 364 SIG_EXPR_LIST_DECL_SINGLE(NDSR4, NDSR4, SIG_DESC_SET(SCU80, 26)); 365 SIG_EXPR_DECL(SIOPWRGD, SIOPWRGD, SIG_DESC_SET(SCUA4, 12)); 366 SIG_EXPR_DECL(SIOPWRGD, ACPI, ACPI_DESC); 367 SIG_EXPR_LIST_DECL_DUAL(SIOPWRGD, SIOPWRGD, ACPI); 368 MS_PIN_DECL(A20, GPIOF2, NDSR4, SIOPWRGD); 369 FUNC_GROUP_DECL(NDSR4, A20); 370 FUNC_GROUP_DECL(SIOPWRGD, A20); 371 372 #define D17 43 373 SIG_EXPR_LIST_DECL_SINGLE(NRI4, NRI4, SIG_DESC_SET(SCU80, 27)); 374 SIG_EXPR_DECL(SIOPBO, SIOPBO, SIG_DESC_SET(SCUA4, 14)); 375 SIG_EXPR_DECL(SIOPBO, ACPI, ACPI_DESC); 376 SIG_EXPR_LIST_DECL_DUAL(SIOPBO, SIOPBO, ACPI); 377 MS_PIN_DECL(D17, GPIOF3, NRI4, SIOPBO); 378 FUNC_GROUP_DECL(NRI4, D17); 379 FUNC_GROUP_DECL(SIOPBO, D17); 380 381 #define B18 44 382 SSSF_PIN_DECL(B18, GPIOF4, NDTR4, SIG_DESC_SET(SCU80, 28)); 383 384 #define A19 45 385 SIG_EXPR_LIST_DECL_SINGLE(NDTS4, NDTS4, SIG_DESC_SET(SCU80, 29)); 386 SIG_EXPR_DECL(SIOSCI, SIOSCI, SIG_DESC_SET(SCUA4, 15)); 387 SIG_EXPR_DECL(SIOSCI, ACPI, ACPI_DESC); 388 SIG_EXPR_LIST_DECL_DUAL(SIOSCI, SIOSCI, ACPI); 389 MS_PIN_DECL(A19, GPIOF5, NDTS4, SIOSCI); 390 FUNC_GROUP_DECL(NDTS4, A19); 391 FUNC_GROUP_DECL(SIOSCI, A19); 392 393 #define E16 46 394 SSSF_PIN_DECL(E16, GPIOF6, TXD4, SIG_DESC_SET(SCU80, 30)); 395 396 #define C17 47 397 SSSF_PIN_DECL(C17, GPIOF7, RXD4, SIG_DESC_SET(SCU80, 31)); 398 399 #define A14 48 400 SSSF_PIN_DECL(A14, GPIOG0, SGPSCK, SIG_DESC_SET(SCU84, 0)); 401 402 #define E13 49 403 SSSF_PIN_DECL(E13, GPIOG1, SGPSLD, SIG_DESC_SET(SCU84, 1)); 404 405 #define D13 50 406 SSSF_PIN_DECL(D13, GPIOG2, SGPSI0, SIG_DESC_SET(SCU84, 2)); 407 408 #define C13 51 409 SSSF_PIN_DECL(C13, GPIOG3, SGPSI1, SIG_DESC_SET(SCU84, 3)); 410 411 #define B13 52 412 SIG_EXPR_LIST_DECL_SINGLE(OSCCLK, OSCCLK, SIG_DESC_SET(SCU2C, 1)); 413 SIG_EXPR_LIST_DECL_SINGLE(WDTRST1, WDTRST1, SIG_DESC_SET(SCU84, 4)); 414 MS_PIN_DECL(B13, GPIOG4, OSCCLK, WDTRST1); 415 416 FUNC_GROUP_DECL(OSCCLK, B13); 417 FUNC_GROUP_DECL(WDTRST1, B13); 418 419 #define Y21 53 420 SIG_EXPR_LIST_DECL_SINGLE(USBCKI, USBCKI, SIG_DESC_SET(HW_STRAP1, 23)); 421 SIG_EXPR_LIST_DECL_SINGLE(WDTRST2, WDTRST2, SIG_DESC_SET(SCU84, 5)); 422 MS_PIN_DECL(Y21, GPIOG5, USBCKI, WDTRST2); 423 424 FUNC_GROUP_DECL(USBCKI, Y21); 425 FUNC_GROUP_DECL(WDTRST2, Y21); 426 427 #define AA22 54 428 SSSF_PIN_DECL(AA22, GPIOG6, FLBUSY, SIG_DESC_SET(SCU84, 6)); 429 430 #define U18 55 431 SSSF_PIN_DECL(U18, GPIOG7, FLWP, SIG_DESC_SET(SCU84, 7)); 432 433 #define UART6_DESC SIG_DESC_SET(SCU90, 7) 434 #define ROM16_DESC SIG_DESC_SET(SCU90, 6) 435 #define FLASH_WIDE SIG_DESC_SET(HW_STRAP1, 4) 436 #define BOOT_SRC_NOR { ASPEED_IP_SCU, HW_STRAP1, GENMASK(1, 0), 0, 0 } 437 438 #define A8 56 439 SIG_EXPR_DECL(ROMD8, ROM16, ROM16_DESC); 440 SIG_EXPR_DECL(ROMD8, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 441 SIG_EXPR_LIST_DECL_DUAL(ROMD8, ROM16, ROM16S); 442 SIG_EXPR_LIST_DECL_SINGLE(NCTS6, NCTS6, UART6_DESC); 443 MS_PIN_DECL(A8, GPIOH0, ROMD8, NCTS6); 444 445 #define C7 57 446 SIG_EXPR_DECL(ROMD9, ROM16, ROM16_DESC); 447 SIG_EXPR_DECL(ROMD9, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 448 SIG_EXPR_LIST_DECL_DUAL(ROMD9, ROM16, ROM16S); 449 SIG_EXPR_LIST_DECL_SINGLE(NDCD6, NDCD6, UART6_DESC); 450 MS_PIN_DECL(C7, GPIOH1, ROMD9, NDCD6); 451 452 #define B7 58 453 SIG_EXPR_DECL(ROMD10, ROM16, ROM16_DESC); 454 SIG_EXPR_DECL(ROMD10, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 455 SIG_EXPR_LIST_DECL_DUAL(ROMD10, ROM16, ROM16S); 456 SIG_EXPR_LIST_DECL_SINGLE(NDSR6, NDSR6, UART6_DESC); 457 MS_PIN_DECL(B7, GPIOH2, ROMD10, NDSR6); 458 459 #define A7 59 460 SIG_EXPR_DECL(ROMD11, ROM16, ROM16_DESC); 461 SIG_EXPR_DECL(ROMD11, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 462 SIG_EXPR_LIST_DECL_DUAL(ROMD11, ROM16, ROM16S); 463 SIG_EXPR_LIST_DECL_SINGLE(NRI6, NRI6, UART6_DESC); 464 MS_PIN_DECL(A7, GPIOH3, ROMD11, NRI6); 465 466 #define D7 60 467 SIG_EXPR_DECL(ROMD12, ROM16, ROM16_DESC); 468 SIG_EXPR_DECL(ROMD12, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 469 SIG_EXPR_LIST_DECL_DUAL(ROMD12, ROM16, ROM16S); 470 SIG_EXPR_LIST_DECL_SINGLE(NDTR6, NDTR6, UART6_DESC); 471 MS_PIN_DECL(D7, GPIOH4, ROMD12, NDTR6); 472 473 #define B6 61 474 SIG_EXPR_DECL(ROMD13, ROM16, ROM16_DESC); 475 SIG_EXPR_DECL(ROMD13, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 476 SIG_EXPR_LIST_DECL_DUAL(ROMD13, ROM16, ROM16S); 477 SIG_EXPR_LIST_DECL_SINGLE(NRTS6, NRTS6, UART6_DESC); 478 MS_PIN_DECL(B6, GPIOH5, ROMD13, NRTS6); 479 480 #define A6 62 481 SIG_EXPR_DECL(ROMD14, ROM16, ROM16_DESC); 482 SIG_EXPR_DECL(ROMD14, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 483 SIG_EXPR_LIST_DECL_DUAL(ROMD14, ROM16, ROM16S); 484 SIG_EXPR_LIST_DECL_SINGLE(TXD6, TXD6, UART6_DESC); 485 MS_PIN_DECL(A6, GPIOH6, ROMD14, TXD6); 486 487 #define E7 63 488 SIG_EXPR_DECL(ROMD15, ROM16, ROM16_DESC); 489 SIG_EXPR_DECL(ROMD15, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 490 SIG_EXPR_LIST_DECL_DUAL(ROMD15, ROM16, ROM16S); 491 SIG_EXPR_LIST_DECL_SINGLE(RXD6, RXD6, UART6_DESC); 492 MS_PIN_DECL(E7, GPIOH7, ROMD15, RXD6); 493 494 FUNC_GROUP_DECL(UART6, A8, C7, B7, A7, D7, B6, A6, E7); 495 496 #define SPI1_DESC \ 497 { ASPEED_IP_SCU, HW_STRAP1, GENMASK(13, 12), 1, 0 } 498 #define SPI1DEBUG_DESC \ 499 { ASPEED_IP_SCU, HW_STRAP1, GENMASK(13, 12), 2, 0 } 500 #define SPI1PASSTHRU_DESC \ 501 { ASPEED_IP_SCU, HW_STRAP1, GENMASK(13, 12), 3, 0 } 502 503 #define C22 64 504 SIG_EXPR_DECL(SYSCS, SPI1DEBUG, SPI1DEBUG_DESC); 505 SIG_EXPR_DECL(SYSCS, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 506 SIG_EXPR_LIST_DECL_DUAL(SYSCS, SPI1DEBUG, SPI1PASSTHRU); 507 SS_PIN_DECL(C22, GPIOI0, SYSCS); 508 509 #define G18 65 510 SIG_EXPR_DECL(SYSCK, SPI1DEBUG, SPI1DEBUG_DESC); 511 SIG_EXPR_DECL(SYSCK, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 512 SIG_EXPR_LIST_DECL_DUAL(SYSCK, SPI1DEBUG, SPI1PASSTHRU); 513 SS_PIN_DECL(G18, GPIOI1, SYSCK); 514 515 #define D19 66 516 SIG_EXPR_DECL(SYSDO, SPI1DEBUG, SPI1DEBUG_DESC); 517 SIG_EXPR_DECL(SYSDO, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 518 SIG_EXPR_LIST_DECL_DUAL(SYSDO, SPI1DEBUG, SPI1PASSTHRU); 519 SS_PIN_DECL(D19, GPIOI2, SYSDO); 520 521 #define C20 67 522 SIG_EXPR_DECL(SYSDI, SPI1DEBUG, SPI1DEBUG_DESC); 523 SIG_EXPR_DECL(SYSDI, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 524 SIG_EXPR_LIST_DECL_DUAL(SYSDI, SPI1DEBUG, SPI1PASSTHRU); 525 SS_PIN_DECL(C20, GPIOI3, SYSDI); 526 527 #define VB_DESC SIG_DESC_SET(HW_STRAP1, 5) 528 529 #define B22 68 530 SIG_EXPR_DECL(SPI1CS0, SPI1, SPI1_DESC); 531 SIG_EXPR_DECL(SPI1CS0, SPI1DEBUG, SPI1DEBUG_DESC); 532 SIG_EXPR_DECL(SPI1CS0, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 533 SIG_EXPR_LIST_DECL(SPI1CS0, SIG_EXPR_PTR(SPI1CS0, SPI1), 534 SIG_EXPR_PTR(SPI1CS0, SPI1DEBUG), 535 SIG_EXPR_PTR(SPI1CS0, SPI1PASSTHRU)); 536 SIG_EXPR_LIST_DECL_SINGLE(VBCS, VGABIOS_ROM, VB_DESC); 537 MS_PIN_DECL(B22, GPIOI4, SPI1CS0, VBCS); 538 539 #define G19 69 540 SIG_EXPR_DECL(SPI1CK, SPI1, SPI1_DESC); 541 SIG_EXPR_DECL(SPI1CK, SPI1DEBUG, SPI1DEBUG_DESC); 542 SIG_EXPR_DECL(SPI1CK, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 543 SIG_EXPR_LIST_DECL(SPI1CK, SIG_EXPR_PTR(SPI1CK, SPI1), 544 SIG_EXPR_PTR(SPI1CK, SPI1DEBUG), 545 SIG_EXPR_PTR(SPI1CK, SPI1PASSTHRU)); 546 SIG_EXPR_LIST_DECL_SINGLE(VBCK, VGABIOS_ROM, VB_DESC); 547 MS_PIN_DECL(G19, GPIOI5, SPI1CK, VBCK); 548 549 #define C18 70 550 SIG_EXPR_DECL(SPI1DO, SPI1, SPI1_DESC); 551 SIG_EXPR_DECL(SPI1DO, SPI1DEBUG, SPI1DEBUG_DESC); 552 SIG_EXPR_DECL(SPI1DO, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 553 SIG_EXPR_LIST_DECL(SPI1DO, SIG_EXPR_PTR(SPI1DO, SPI1), 554 SIG_EXPR_PTR(SPI1DO, SPI1DEBUG), 555 SIG_EXPR_PTR(SPI1DO, SPI1PASSTHRU)); 556 SIG_EXPR_LIST_DECL_SINGLE(VBDO, VGABIOS_ROM, VB_DESC); 557 MS_PIN_DECL(C18, GPIOI6, SPI1DO, VBDO); 558 559 #define E20 71 560 SIG_EXPR_DECL(SPI1DI, SPI1, SPI1_DESC); 561 SIG_EXPR_DECL(SPI1DI, SPI1DEBUG, SPI1DEBUG_DESC); 562 SIG_EXPR_DECL(SPI1DI, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 563 SIG_EXPR_LIST_DECL(SPI1DI, SIG_EXPR_PTR(SPI1DI, SPI1), 564 SIG_EXPR_PTR(SPI1DI, SPI1DEBUG), 565 SIG_EXPR_PTR(SPI1DI, SPI1PASSTHRU)); 566 SIG_EXPR_LIST_DECL_SINGLE(VBDI, VGABIOS_ROM, VB_DESC); 567 MS_PIN_DECL(E20, GPIOI7, SPI1DI, VBDI); 568 569 FUNC_GROUP_DECL(SPI1, B22, G19, C18, E20); 570 FUNC_GROUP_DECL(SPI1DEBUG, C22, G18, D19, C20, B22, G19, C18, E20); 571 FUNC_GROUP_DECL(SPI1PASSTHRU, C22, G18, D19, C20, B22, G19, C18, E20); 572 FUNC_GROUP_DECL(VGABIOS_ROM, B22, G19, C18, E20); 573 574 #define J5 72 575 SSSF_PIN_DECL(J5, GPIOJ0, SGPMCK, SIG_DESC_SET(SCU84, 8)); 576 577 #define J4 73 578 SSSF_PIN_DECL(J4, GPIOJ1, SGPMLD, SIG_DESC_SET(SCU84, 9)); 579 580 #define K5 74 581 SSSF_PIN_DECL(K5, GPIOJ2, SGPMO, SIG_DESC_SET(SCU84, 10)); 582 583 #define J3 75 584 SSSF_PIN_DECL(J3, GPIOJ3, SGPMI, SIG_DESC_SET(SCU84, 11)); 585 586 #define T4 76 587 SSSF_PIN_DECL(T4, GPIOJ4, VGAHS, SIG_DESC_SET(SCU84, 12)); 588 589 #define U2 77 590 SSSF_PIN_DECL(U2, GPIOJ5, VGAVS, SIG_DESC_SET(SCU84, 13)); 591 592 #define T2 78 593 SSSF_PIN_DECL(T2, GPIOJ6, DDCCLK, SIG_DESC_SET(SCU84, 14)); 594 595 #define T1 79 596 SSSF_PIN_DECL(T1, GPIOJ7, DDCDAT, SIG_DESC_SET(SCU84, 15)); 597 598 #define I2C5_DESC SIG_DESC_SET(SCU90, 18) 599 600 #define E3 80 601 SIG_EXPR_LIST_DECL_SINGLE(SCL5, I2C5, I2C5_DESC); 602 SS_PIN_DECL(E3, GPIOK0, SCL5); 603 604 #define D2 81 605 SIG_EXPR_LIST_DECL_SINGLE(SDA5, I2C5, I2C5_DESC); 606 SS_PIN_DECL(D2, GPIOK1, SDA5); 607 608 FUNC_GROUP_DECL(I2C5, E3, D2); 609 610 #define I2C6_DESC SIG_DESC_SET(SCU90, 19) 611 612 #define C1 82 613 SIG_EXPR_LIST_DECL_SINGLE(SCL6, I2C6, I2C6_DESC); 614 SS_PIN_DECL(C1, GPIOK2, SCL6); 615 616 #define F4 83 617 SIG_EXPR_LIST_DECL_SINGLE(SDA6, I2C6, I2C6_DESC); 618 SS_PIN_DECL(F4, GPIOK3, SDA6); 619 620 FUNC_GROUP_DECL(I2C6, C1, F4); 621 622 #define I2C7_DESC SIG_DESC_SET(SCU90, 20) 623 624 #define E2 84 625 SIG_EXPR_LIST_DECL_SINGLE(SCL7, I2C7, I2C7_DESC); 626 SS_PIN_DECL(E2, GPIOK4, SCL7); 627 628 #define D1 85 629 SIG_EXPR_LIST_DECL_SINGLE(SDA7, I2C7, I2C7_DESC); 630 SS_PIN_DECL(D1, GPIOK5, SDA7); 631 632 FUNC_GROUP_DECL(I2C7, E2, D1); 633 634 #define I2C8_DESC SIG_DESC_SET(SCU90, 21) 635 636 #define G5 86 637 SIG_EXPR_LIST_DECL_SINGLE(SCL8, I2C8, I2C8_DESC); 638 SS_PIN_DECL(G5, GPIOK6, SCL8); 639 640 #define F3 87 641 SIG_EXPR_LIST_DECL_SINGLE(SDA8, I2C8, I2C8_DESC); 642 SS_PIN_DECL(F3, GPIOK7, SDA8); 643 644 FUNC_GROUP_DECL(I2C8, G5, F3); 645 646 #define U1 88 647 SSSF_PIN_DECL(U1, GPIOL0, NCTS1, SIG_DESC_SET(SCU84, 16)); 648 649 #define VPI18_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 1, 0 } 650 #define VPI24_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 2, 0 } 651 #define VPI30_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 3, 0 } 652 653 #define T5 89 654 #define T5_DESC SIG_DESC_SET(SCU84, 17) 655 SIG_EXPR_DECL(VPIDE, VPI18, VPI18_DESC, T5_DESC); 656 SIG_EXPR_DECL(VPIDE, VPI24, VPI24_DESC, T5_DESC); 657 SIG_EXPR_DECL(VPIDE, VPI30, VPI30_DESC, T5_DESC); 658 SIG_EXPR_LIST_DECL(VPIDE, SIG_EXPR_PTR(VPIDE, VPI18), 659 SIG_EXPR_PTR(VPIDE, VPI24), 660 SIG_EXPR_PTR(VPIDE, VPI30)); 661 SIG_EXPR_LIST_DECL_SINGLE(NDCD1, NDCD1, T5_DESC); 662 MS_PIN_DECL(T5, GPIOL1, VPIDE, NDCD1); 663 FUNC_GROUP_DECL(NDCD1, T5); 664 665 #define U3 90 666 #define U3_DESC SIG_DESC_SET(SCU84, 18) 667 SIG_EXPR_DECL(VPIODD, VPI18, VPI18_DESC, U3_DESC); 668 SIG_EXPR_DECL(VPIODD, VPI24, VPI24_DESC, U3_DESC); 669 SIG_EXPR_DECL(VPIODD, VPI30, VPI30_DESC, U3_DESC); 670 SIG_EXPR_LIST_DECL(VPIODD, SIG_EXPR_PTR(VPIODD, VPI18), 671 SIG_EXPR_PTR(VPIODD, VPI24), 672 SIG_EXPR_PTR(VPIODD, VPI30)); 673 SIG_EXPR_LIST_DECL_SINGLE(NDSR1, NDSR1, U3_DESC); 674 MS_PIN_DECL(U3, GPIOL2, VPIODD, NDSR1); 675 FUNC_GROUP_DECL(NDSR1, U3); 676 677 #define V1 91 678 #define V1_DESC SIG_DESC_SET(SCU84, 19) 679 SIG_EXPR_DECL(VPIHS, VPI18, VPI18_DESC, V1_DESC); 680 SIG_EXPR_DECL(VPIHS, VPI24, VPI24_DESC, V1_DESC); 681 SIG_EXPR_DECL(VPIHS, VPI30, VPI30_DESC, V1_DESC); 682 SIG_EXPR_LIST_DECL(VPIHS, SIG_EXPR_PTR(VPIHS, VPI18), 683 SIG_EXPR_PTR(VPIHS, VPI24), 684 SIG_EXPR_PTR(VPIHS, VPI30)); 685 SIG_EXPR_LIST_DECL_SINGLE(NRI1, NRI1, V1_DESC); 686 MS_PIN_DECL(V1, GPIOL3, VPIHS, NRI1); 687 FUNC_GROUP_DECL(NRI1, V1); 688 689 #define U4 92 690 #define U4_DESC SIG_DESC_SET(SCU84, 20) 691 SIG_EXPR_DECL(VPIVS, VPI18, VPI18_DESC, U4_DESC); 692 SIG_EXPR_DECL(VPIVS, VPI24, VPI24_DESC, U4_DESC); 693 SIG_EXPR_DECL(VPIVS, VPI30, VPI30_DESC, U4_DESC); 694 SIG_EXPR_LIST_DECL(VPIVS, SIG_EXPR_PTR(VPIVS, VPI18), 695 SIG_EXPR_PTR(VPIVS, VPI24), 696 SIG_EXPR_PTR(VPIVS, VPI30)); 697 SIG_EXPR_LIST_DECL_SINGLE(NDTR1, NDTR1, U4_DESC); 698 MS_PIN_DECL(U4, GPIOL4, VPIVS, NDTR1); 699 FUNC_GROUP_DECL(NDTR1, U4); 700 701 #define V2 93 702 #define V2_DESC SIG_DESC_SET(SCU84, 21) 703 SIG_EXPR_DECL(VPICLK, VPI18, VPI18_DESC, V2_DESC); 704 SIG_EXPR_DECL(VPICLK, VPI24, VPI24_DESC, V2_DESC); 705 SIG_EXPR_DECL(VPICLK, VPI30, VPI30_DESC, V2_DESC); 706 SIG_EXPR_LIST_DECL(VPICLK, SIG_EXPR_PTR(VPICLK, VPI18), 707 SIG_EXPR_PTR(VPICLK, VPI24), 708 SIG_EXPR_PTR(VPICLK, VPI30)); 709 SIG_EXPR_LIST_DECL_SINGLE(NRTS1, NRTS1, V2_DESC); 710 MS_PIN_DECL(V2, GPIOL5, VPICLK, NRTS1); 711 FUNC_GROUP_DECL(NRTS1, V2); 712 713 #define W1 94 714 #define W1_DESC SIG_DESC_SET(SCU84, 22) 715 SIG_EXPR_LIST_DECL_SINGLE(VPIB0, VPI30, VPI30_DESC, W1_DESC); 716 SIG_EXPR_LIST_DECL_SINGLE(TXD1, TXD1, W1_DESC); 717 MS_PIN_DECL(W1, GPIOL6, VPIB0, TXD1); 718 FUNC_GROUP_DECL(TXD1, W1); 719 720 #define U5 95 721 #define U5_DESC SIG_DESC_SET(SCU84, 23) 722 SIG_EXPR_LIST_DECL_SINGLE(VPIB1, VPI30, VPI30_DESC, U5_DESC); 723 SIG_EXPR_LIST_DECL_SINGLE(RXD1, RXD1, U5_DESC); 724 MS_PIN_DECL(U5, GPIOL7, VPIB1, RXD1); 725 FUNC_GROUP_DECL(RXD1, U5); 726 727 #define V3 96 728 #define V3_DESC SIG_DESC_SET(SCU84, 24) 729 SIG_EXPR_DECL(VPIOB2, VPI18, VPI18_DESC, V3_DESC); 730 SIG_EXPR_DECL(VPIOB2, VPI24, VPI24_DESC, V3_DESC); 731 SIG_EXPR_DECL(VPIOB2, VPI30, VPI30_DESC, V3_DESC); 732 SIG_EXPR_LIST_DECL(VPIOB2, SIG_EXPR_PTR(VPIOB2, VPI18), 733 SIG_EXPR_PTR(VPIOB2, VPI24), 734 SIG_EXPR_PTR(VPIOB2, VPI30)); 735 SIG_EXPR_LIST_DECL_SINGLE(NCTS2, NCTS2, V3_DESC); 736 MS_PIN_DECL(V3, GPIOM0, VPIOB2, NCTS2); 737 FUNC_GROUP_DECL(NCTS2, V3); 738 739 #define W2 97 740 #define W2_DESC SIG_DESC_SET(SCU84, 25) 741 SIG_EXPR_DECL(VPIOB3, VPI18, VPI18_DESC, W2_DESC); 742 SIG_EXPR_DECL(VPIOB3, VPI24, VPI24_DESC, W2_DESC); 743 SIG_EXPR_DECL(VPIOB3, VPI30, VPI30_DESC, W2_DESC); 744 SIG_EXPR_LIST_DECL(VPIOB3, SIG_EXPR_PTR(VPIOB3, VPI18), 745 SIG_EXPR_PTR(VPIOB3, VPI24), 746 SIG_EXPR_PTR(VPIOB3, VPI30)); 747 SIG_EXPR_LIST_DECL_SINGLE(NDCD2, NDCD2, W2_DESC); 748 MS_PIN_DECL(W2, GPIOM1, VPIOB3, NDCD2); 749 FUNC_GROUP_DECL(NDCD2, W2); 750 751 #define Y1 98 752 #define Y1_DESC SIG_DESC_SET(SCU84, 26) 753 SIG_EXPR_DECL(VPIOB4, VPI18, VPI18_DESC, Y1_DESC); 754 SIG_EXPR_DECL(VPIOB4, VPI24, VPI24_DESC, Y1_DESC); 755 SIG_EXPR_DECL(VPIOB4, VPI30, VPI30_DESC, Y1_DESC); 756 SIG_EXPR_LIST_DECL(VPIOB4, SIG_EXPR_PTR(VPIOB4, VPI18), 757 SIG_EXPR_PTR(VPIOB4, VPI24), 758 SIG_EXPR_PTR(VPIOB4, VPI30)); 759 SIG_EXPR_LIST_DECL_SINGLE(NDSR2, NDSR2, Y1_DESC); 760 MS_PIN_DECL(Y1, GPIOM2, VPIOB4, NDSR2); 761 FUNC_GROUP_DECL(NDSR2, Y1); 762 763 #define V4 99 764 #define V4_DESC SIG_DESC_SET(SCU84, 27) 765 SIG_EXPR_DECL(VPIOB5, VPI18, VPI18_DESC, V4_DESC); 766 SIG_EXPR_DECL(VPIOB5, VPI24, VPI24_DESC, V4_DESC); 767 SIG_EXPR_DECL(VPIOB5, VPI30, VPI30_DESC, V4_DESC); 768 SIG_EXPR_LIST_DECL(VPIOB5, SIG_EXPR_PTR(VPIOB5, VPI18), 769 SIG_EXPR_PTR(VPIOB5, VPI24), 770 SIG_EXPR_PTR(VPIOB5, VPI30)); 771 SIG_EXPR_LIST_DECL_SINGLE(NRI2, NRI2, V4_DESC); 772 MS_PIN_DECL(V4, GPIOM3, VPIOB5, NRI2); 773 FUNC_GROUP_DECL(NRI2, V4); 774 775 #define W3 100 776 #define W3_DESC SIG_DESC_SET(SCU84, 28) 777 SIG_EXPR_DECL(VPIOB6, VPI18, VPI18_DESC, W3_DESC); 778 SIG_EXPR_DECL(VPIOB6, VPI24, VPI24_DESC, W3_DESC); 779 SIG_EXPR_DECL(VPIOB6, VPI30, VPI30_DESC, W3_DESC); 780 SIG_EXPR_LIST_DECL(VPIOB6, SIG_EXPR_PTR(VPIOB6, VPI18), 781 SIG_EXPR_PTR(VPIOB6, VPI24), 782 SIG_EXPR_PTR(VPIOB6, VPI30)); 783 SIG_EXPR_LIST_DECL_SINGLE(NDTR2, NDTR2, W3_DESC); 784 MS_PIN_DECL(W3, GPIOM4, VPIOB6, NDTR2); 785 FUNC_GROUP_DECL(NDTR2, W3); 786 787 #define Y2 101 788 #define Y2_DESC SIG_DESC_SET(SCU84, 29) 789 SIG_EXPR_DECL(VPIOB7, VPI18, VPI18_DESC, Y2_DESC); 790 SIG_EXPR_DECL(VPIOB7, VPI24, VPI24_DESC, Y2_DESC); 791 SIG_EXPR_DECL(VPIOB7, VPI30, VPI30_DESC, Y2_DESC); 792 SIG_EXPR_LIST_DECL(VPIOB7, SIG_EXPR_PTR(VPIOB7, VPI18), 793 SIG_EXPR_PTR(VPIOB7, VPI24), 794 SIG_EXPR_PTR(VPIOB7, VPI30)); 795 SIG_EXPR_LIST_DECL_SINGLE(NRTS2, NRTS2, Y2_DESC); 796 MS_PIN_DECL(Y2, GPIOM5, VPIOB7, NRTS2); 797 FUNC_GROUP_DECL(NRTS2, Y2); 798 799 #define AA1 102 800 #define AA1_DESC SIG_DESC_SET(SCU84, 30) 801 SIG_EXPR_DECL(VPIOB8, VPI18, VPI18_DESC, AA1_DESC); 802 SIG_EXPR_DECL(VPIOB8, VPI24, VPI24_DESC, AA1_DESC); 803 SIG_EXPR_DECL(VPIOB8, VPI30, VPI30_DESC, AA1_DESC); 804 SIG_EXPR_LIST_DECL(VPIOB8, SIG_EXPR_PTR(VPIOB8, VPI18), 805 SIG_EXPR_PTR(VPIOB8, VPI24), 806 SIG_EXPR_PTR(VPIOB8, VPI30)); 807 SIG_EXPR_LIST_DECL_SINGLE(TXD2, TXD2, AA1_DESC); 808 MS_PIN_DECL(AA1, GPIOM6, VPIOB8, TXD2); 809 FUNC_GROUP_DECL(TXD2, AA1); 810 811 #define V5 103 812 #define V5_DESC SIG_DESC_SET(SCU84, 31) 813 SIG_EXPR_DECL(VPIOB9, VPI18, VPI18_DESC, V5_DESC); 814 SIG_EXPR_DECL(VPIOB9, VPI24, VPI24_DESC, V5_DESC); 815 SIG_EXPR_DECL(VPIOB9, VPI30, VPI30_DESC, V5_DESC); 816 SIG_EXPR_LIST_DECL(VPIOB9, SIG_EXPR_PTR(VPIOB9, VPI18), 817 SIG_EXPR_PTR(VPIOB9, VPI24), 818 SIG_EXPR_PTR(VPIOB9, VPI30)); 819 SIG_EXPR_LIST_DECL_SINGLE(RXD2, RXD2, V5_DESC); 820 MS_PIN_DECL(V5, GPIOM7, VPIOB9, RXD2); 821 FUNC_GROUP_DECL(RXD2, V5); 822 823 #define W4 104 824 #define W4_DESC SIG_DESC_SET(SCU88, 0) 825 SIG_EXPR_LIST_DECL_SINGLE(VPIG0, VPI30, VPI30_DESC, W4_DESC); 826 SIG_EXPR_LIST_DECL_SINGLE(PWM0, PWM0, W4_DESC); 827 MS_PIN_DECL(W4, GPION0, VPIG0, PWM0); 828 FUNC_GROUP_DECL(PWM0, W4); 829 830 #define Y3 105 831 #define Y3_DESC SIG_DESC_SET(SCU88, 1) 832 SIG_EXPR_LIST_DECL_SINGLE(VPIG1, VPI30, VPI30_DESC, Y3_DESC); 833 SIG_EXPR_LIST_DECL_SINGLE(PWM1, PWM1, Y3_DESC); 834 MS_PIN_DECL(Y3, GPION1, VPIG1, PWM1); 835 FUNC_GROUP_DECL(PWM1, Y3); 836 837 #define AA2 106 838 #define AA2_DESC SIG_DESC_SET(SCU88, 2) 839 SIG_EXPR_DECL(VPIG2, VPI18, VPI18_DESC, AA2_DESC); 840 SIG_EXPR_DECL(VPIG2, VPI24, VPI24_DESC, AA2_DESC); 841 SIG_EXPR_DECL(VPIG2, VPI30, VPI30_DESC, AA2_DESC); 842 SIG_EXPR_LIST_DECL(VPIG2, SIG_EXPR_PTR(VPIG2, VPI18), 843 SIG_EXPR_PTR(VPIG2, VPI24), 844 SIG_EXPR_PTR(VPIG2, VPI30)); 845 SIG_EXPR_LIST_DECL_SINGLE(PWM2, PWM2, AA2_DESC); 846 MS_PIN_DECL(AA2, GPION2, VPIG2, PWM2); 847 FUNC_GROUP_DECL(PWM2, AA2); 848 849 #define AB1 107 850 #define AB1_DESC SIG_DESC_SET(SCU88, 3) 851 SIG_EXPR_DECL(VPIG3, VPI18, VPI18_DESC, AB1_DESC); 852 SIG_EXPR_DECL(VPIG3, VPI24, VPI24_DESC, AB1_DESC); 853 SIG_EXPR_DECL(VPIG3, VPI30, VPI30_DESC, AB1_DESC); 854 SIG_EXPR_LIST_DECL(VPIG3, SIG_EXPR_PTR(VPIG3, VPI18), 855 SIG_EXPR_PTR(VPIG3, VPI24), 856 SIG_EXPR_PTR(VPIG3, VPI30)); 857 SIG_EXPR_LIST_DECL_SINGLE(PWM3, PWM3, AB1_DESC); 858 MS_PIN_DECL(AB1, GPION3, VPIG3, PWM3); 859 FUNC_GROUP_DECL(PWM3, AB1); 860 861 #define W5 108 862 #define W5_DESC SIG_DESC_SET(SCU88, 4) 863 SIG_EXPR_DECL(VPIG4, VPI18, VPI18_DESC, W5_DESC); 864 SIG_EXPR_DECL(VPIG4, VPI24, VPI24_DESC, W5_DESC); 865 SIG_EXPR_DECL(VPIG4, VPI30, VPI30_DESC, W5_DESC); 866 SIG_EXPR_LIST_DECL(VPIG4, SIG_EXPR_PTR(VPIG4, VPI18), 867 SIG_EXPR_PTR(VPIG4, VPI24), 868 SIG_EXPR_PTR(VPIG4, VPI30)); 869 SIG_EXPR_LIST_DECL_SINGLE(PWM4, PWM4, W5_DESC); 870 MS_PIN_DECL(W5, GPION4, VPIG4, PWM4); 871 FUNC_GROUP_DECL(PWM4, W5); 872 873 #define Y4 109 874 #define Y4_DESC SIG_DESC_SET(SCU88, 5) 875 SIG_EXPR_DECL(VPIG5, VPI18, VPI18_DESC, Y4_DESC); 876 SIG_EXPR_DECL(VPIG5, VPI24, VPI24_DESC, Y4_DESC); 877 SIG_EXPR_DECL(VPIG5, VPI30, VPI30_DESC, Y4_DESC); 878 SIG_EXPR_LIST_DECL(VPIG5, SIG_EXPR_PTR(VPIG5, VPI18), 879 SIG_EXPR_PTR(VPIG5, VPI24), 880 SIG_EXPR_PTR(VPIG5, VPI30)); 881 SIG_EXPR_LIST_DECL_SINGLE(PWM5, PWM5, Y4_DESC); 882 MS_PIN_DECL(Y4, GPION5, VPIG5, PWM5); 883 FUNC_GROUP_DECL(PWM5, Y4); 884 885 #define AA3 110 886 #define AA3_DESC SIG_DESC_SET(SCU88, 6) 887 SIG_EXPR_LIST_DECL_SINGLE(VPIG6, VPI30, VPI30_DESC, AA3_DESC); 888 SIG_EXPR_LIST_DECL_SINGLE(PWM6, PWM6, AA3_DESC); 889 MS_PIN_DECL(AA3, GPION6, VPIG6, PWM6); 890 FUNC_GROUP_DECL(PWM6, AA3); 891 892 #define AB2 111 893 #define AB2_DESC SIG_DESC_SET(SCU88, 7) 894 SIG_EXPR_LIST_DECL_SINGLE(VPIG7, VPI30, VPI30_DESC, AB2_DESC); 895 SIG_EXPR_LIST_DECL_SINGLE(PWM7, PWM7, AB2_DESC); 896 MS_PIN_DECL(AB2, GPION7, VPIG7, PWM7); 897 FUNC_GROUP_DECL(PWM7, AB2); 898 899 #define V6 112 900 SIG_EXPR_LIST_DECL_SINGLE(VPIG8, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 8)); 901 SS_PIN_DECL(V6, GPIOO0, VPIG8); 902 903 #define Y5 113 904 SIG_EXPR_LIST_DECL_SINGLE(VPIG9, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 9)); 905 SS_PIN_DECL(Y5, GPIOO1, VPIG9); 906 907 #define AA4 114 908 SIG_EXPR_LIST_DECL_SINGLE(VPIR0, VPI30, VPI30_DESC, SIG_DESC_SET(SCU88, 10)); 909 SS_PIN_DECL(AA4, GPIOO2, VPIR0); 910 911 #define AB3 115 912 SIG_EXPR_LIST_DECL_SINGLE(VPIR1, VPI30, VPI30_DESC, SIG_DESC_SET(SCU88, 11)); 913 SS_PIN_DECL(AB3, GPIOO3, VPIR1); 914 915 #define W6 116 916 SIG_EXPR_LIST_DECL_SINGLE(VPIR2, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 12)); 917 SS_PIN_DECL(W6, GPIOO4, VPIR2); 918 919 #define AA5 117 920 SIG_EXPR_LIST_DECL_SINGLE(VPIR3, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 13)); 921 SS_PIN_DECL(AA5, GPIOO5, VPIR3); 922 923 #define AB4 118 924 SIG_EXPR_LIST_DECL_SINGLE(VPIR4, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 14)); 925 SS_PIN_DECL(AB4, GPIOO6, VPIR4); 926 927 #define V7 119 928 SIG_EXPR_LIST_DECL_SINGLE(VPIR5, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 15)); 929 SS_PIN_DECL(V7, GPIOO7, VPIR5); 930 931 #define Y6 120 932 SIG_EXPR_LIST_DECL_SINGLE(VPIR6, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 16)); 933 SS_PIN_DECL(Y6, GPIOP0, VPIR6); 934 935 #define AB5 121 936 SIG_EXPR_LIST_DECL_SINGLE(VPIR7, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 17)); 937 SS_PIN_DECL(AB5, GPIOP1, VPIR7); 938 939 #define W7 122 940 SIG_EXPR_LIST_DECL_SINGLE(VPIR8, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 18)); 941 SS_PIN_DECL(W7, GPIOP2, VPIR8); 942 943 #define AA6 123 944 SIG_EXPR_LIST_DECL_SINGLE(VPIR9, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 19)); 945 SS_PIN_DECL(AA6, GPIOP3, VPIR9); 946 947 FUNC_GROUP_DECL(VPI18, T5, U3, V1, U4, V2, V3, W2, Y1, V4, W3, Y2, AA1, V5, 948 AA22, W5, Y4, AA3, AB2); 949 FUNC_GROUP_DECL(VPI24, T5, U3, V1, U4, V2, V3, W2, Y1, V4, W3, Y2, AA1, V5, 950 AA22, W5, Y4, AA3, AB2, V6, Y5, W6, AA5, AB4, V7, Y6, AB5, W7, 951 AA6); 952 FUNC_GROUP_DECL(VPI30, T5, U3, V1, U4, V2, W1, U5, V3, W2, Y1, V4, W3, Y2, AA1, 953 V5, W4, Y3, AA22, W5, Y4, AA3, AB2, AA4, AB3); 954 955 #define AB6 124 956 SIG_EXPR_LIST_DECL_SINGLE(GPIOP4, GPIOP4); 957 MS_PIN_DECL_(AB6, SIG_EXPR_LIST_PTR(GPIOP4)); 958 959 #define Y7 125 960 SIG_EXPR_LIST_DECL_SINGLE(GPIOP5, GPIOP5); 961 MS_PIN_DECL_(Y7, SIG_EXPR_LIST_PTR(GPIOP5)); 962 963 #define AA7 126 964 SSSF_PIN_DECL(AA7, GPIOP6, BMCINT, SIG_DESC_SET(SCU88, 22)); 965 966 #define AB7 127 967 SSSF_PIN_DECL(AB7, GPIOP7, FLACK, SIG_DESC_SET(SCU88, 23)); 968 969 #define I2C3_DESC SIG_DESC_SET(SCU90, 16) 970 971 #define D3 128 972 SIG_EXPR_LIST_DECL_SINGLE(SCL3, I2C3, I2C3_DESC); 973 SS_PIN_DECL(D3, GPIOQ0, SCL3); 974 975 #define C2 129 976 SIG_EXPR_LIST_DECL_SINGLE(SDA3, I2C3, I2C3_DESC); 977 SS_PIN_DECL(C2, GPIOQ1, SDA3); 978 979 FUNC_GROUP_DECL(I2C3, D3, C2); 980 981 #define I2C4_DESC SIG_DESC_SET(SCU90, 17) 982 983 #define B1 130 984 SIG_EXPR_LIST_DECL_SINGLE(SCL4, I2C4, I2C4_DESC); 985 SS_PIN_DECL(B1, GPIOQ2, SCL4); 986 987 #define F5 131 988 SIG_EXPR_LIST_DECL_SINGLE(SDA4, I2C4, I2C4_DESC); 989 SS_PIN_DECL(F5, GPIOQ3, SDA4); 990 991 FUNC_GROUP_DECL(I2C4, B1, F5); 992 993 #define I2C14_DESC SIG_DESC_SET(SCU90, 27) 994 995 #define H4 132 996 SIG_EXPR_LIST_DECL_SINGLE(SCL14, I2C14, I2C14_DESC); 997 SS_PIN_DECL(H4, GPIOQ4, SCL14); 998 999 #define H3 133 1000 SIG_EXPR_LIST_DECL_SINGLE(SDA14, I2C14, I2C14_DESC); 1001 SS_PIN_DECL(H3, GPIOQ5, SDA14); 1002 1003 FUNC_GROUP_DECL(I2C14, H4, H3); 1004 1005 /* 1006 * There are several opportunities to document USB port 4 in the datasheet, but 1007 * it is only mentioned in one location. Particularly, the Multi-function Pins 1008 * Mapping and Control table in the datasheet elides the signal names, 1009 * suggesting that port 4 may not actually be functional. As such we define the 1010 * signal names and control bit, but don't export the capability's function or 1011 * group. 1012 */ 1013 #define USB11H3_DESC SIG_DESC_SET(SCU90, 28) 1014 1015 #define H2 134 1016 SIG_EXPR_LIST_DECL_SINGLE(USB11HDP3, USB11H3, USB11H3_DESC); 1017 SS_PIN_DECL(H2, GPIOQ6, USB11HDP3); 1018 1019 #define H1 135 1020 SIG_EXPR_LIST_DECL_SINGLE(USB11HDN3, USB11H3, USB11H3_DESC); 1021 SS_PIN_DECL(H1, GPIOQ7, USB11HDN3); 1022 1023 #define V20 136 1024 SSSF_PIN_DECL(V20, GPIOR0, ROMCS1, SIG_DESC_SET(SCU88, 24)); 1025 1026 #define W21 137 1027 SSSF_PIN_DECL(W21, GPIOR1, ROMCS2, SIG_DESC_SET(SCU88, 25)); 1028 1029 #define Y22 138 1030 SSSF_PIN_DECL(Y22, GPIOR2, ROMCS3, SIG_DESC_SET(SCU88, 26)); 1031 1032 #define U19 139 1033 SSSF_PIN_DECL(U19, GPIOR3, ROMCS4, SIG_DESC_SET(SCU88, 27)); 1034 1035 #define VPOOFF0_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 0, 0 } 1036 #define VPO12_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 1, 0 } 1037 #define VPO24_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 2, 0 } 1038 #define VPOOFF1_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 3, 0 } 1039 #define VPO_OFF_12 { ASPEED_IP_SCU, SCU94, 0x2, 0, 0 } 1040 #define VPO_24_OFF SIG_DESC_SET(SCU94, 1) 1041 1042 #define V21 140 1043 #define V21_DESC SIG_DESC_SET(SCU88, 28) 1044 SIG_EXPR_DECL(ROMA24, ROM8, V21_DESC, VPO_OFF_12); 1045 SIG_EXPR_DECL(ROMA24, ROM16, V21_DESC, VPO_OFF_12); 1046 SIG_EXPR_DECL(ROMA24, ROM16S, V21_DESC, VPO_OFF_12); 1047 SIG_EXPR_LIST_DECL(ROMA24, SIG_EXPR_PTR(ROMA24, ROM8), 1048 SIG_EXPR_PTR(ROMA24, ROM16), 1049 SIG_EXPR_PTR(ROMA24, ROM16S)); 1050 SIG_EXPR_LIST_DECL_SINGLE(VPOR6, VPO24, V21_DESC, VPO_24_OFF); 1051 MS_PIN_DECL(V21, GPIOR4, ROMA24, VPOR6); 1052 1053 #define W22 141 1054 #define W22_DESC SIG_DESC_SET(SCU88, 29) 1055 SIG_EXPR_DECL(ROMA25, ROM8, W22_DESC, VPO_OFF_12); 1056 SIG_EXPR_DECL(ROMA25, ROM16, W22_DESC, VPO_OFF_12); 1057 SIG_EXPR_DECL(ROMA25, ROM16S, W22_DESC, VPO_OFF_12); 1058 SIG_EXPR_LIST_DECL(ROMA25, SIG_EXPR_PTR(ROMA25, ROM8), 1059 SIG_EXPR_PTR(ROMA25, ROM16), 1060 SIG_EXPR_PTR(ROMA25, ROM16S)); 1061 SIG_EXPR_LIST_DECL_SINGLE(VPOR7, VPO24, W22_DESC, VPO_24_OFF); 1062 MS_PIN_DECL(W22, GPIOR5, ROMA25, VPOR7); 1063 1064 #define C6 142 1065 SIG_EXPR_LIST_DECL_SINGLE(MDC1, MDIO1, SIG_DESC_SET(SCU88, 30)); 1066 SS_PIN_DECL(C6, GPIOR6, MDC1); 1067 1068 #define A5 143 1069 SIG_EXPR_LIST_DECL_SINGLE(MDIO1, MDIO1, SIG_DESC_SET(SCU88, 31)); 1070 SS_PIN_DECL(A5, GPIOR7, MDIO1); 1071 1072 FUNC_GROUP_DECL(MDIO1, C6, A5); 1073 1074 #define U21 144 1075 #define U21_DESC SIG_DESC_SET(SCU8C, 0) 1076 SIG_EXPR_DECL(ROMD4, ROM8, U21_DESC, VPOOFF0_DESC); 1077 SIG_EXPR_DECL(ROMD4, ROM16, U21_DESC, VPOOFF0_DESC); 1078 SIG_EXPR_DECL(ROMD4, ROM16S, U21_DESC, VPOOFF0_DESC); 1079 SIG_EXPR_LIST_DECL(ROMD4, SIG_EXPR_PTR(ROMD4, ROM8), 1080 SIG_EXPR_PTR(ROMD4, ROM16), 1081 SIG_EXPR_PTR(ROMD4, ROM16S)); 1082 SIG_EXPR_DECL(VPODE, VPO12, U21_DESC, VPO12_DESC); 1083 SIG_EXPR_DECL(VPODE, VPO24, U21_DESC, VPO12_DESC); 1084 SIG_EXPR_LIST_DECL_DUAL(VPODE, VPO12, VPO24); 1085 MS_PIN_DECL(U21, GPIOS0, ROMD4, VPODE); 1086 1087 #define T19 145 1088 #define T19_DESC SIG_DESC_SET(SCU8C, 1) 1089 SIG_EXPR_DECL(ROMD5, ROM8, T19_DESC, VPOOFF0_DESC); 1090 SIG_EXPR_DECL(ROMD5, ROM16, T19_DESC, VPOOFF0_DESC); 1091 SIG_EXPR_DECL(ROMD5, ROM16S, T19_DESC, VPOOFF0_DESC); 1092 SIG_EXPR_LIST_DECL(ROMD5, SIG_EXPR_PTR(ROMD5, ROM8), 1093 SIG_EXPR_PTR(ROMD5, ROM16), 1094 SIG_EXPR_PTR(ROMD5, ROM16S)); 1095 SIG_EXPR_DECL(VPOHS, VPO12, T19_DESC, VPO12_DESC); 1096 SIG_EXPR_DECL(VPOHS, VPO24, T19_DESC, VPO24_DESC); 1097 SIG_EXPR_LIST_DECL_DUAL(VPOHS, VPO12, VPO24); 1098 MS_PIN_DECL(T19, GPIOS1, ROMD5, VPOHS); 1099 1100 #define V22 146 1101 #define V22_DESC SIG_DESC_SET(SCU8C, 2) 1102 SIG_EXPR_DECL(ROMD6, ROM8, V22_DESC, VPOOFF0_DESC); 1103 SIG_EXPR_DECL(ROMD6, ROM16, V22_DESC, VPOOFF0_DESC); 1104 SIG_EXPR_DECL(ROMD6, ROM16S, V22_DESC, VPOOFF0_DESC); 1105 SIG_EXPR_LIST_DECL(ROMD6, SIG_EXPR_PTR(ROMD6, ROM8), 1106 SIG_EXPR_PTR(ROMD6, ROM16), 1107 SIG_EXPR_PTR(ROMD6, ROM16S)); 1108 SIG_EXPR_DECL(VPOVS, VPO12, V22_DESC, VPO12_DESC); 1109 SIG_EXPR_DECL(VPOVS, VPO24, V22_DESC, VPO24_DESC); 1110 SIG_EXPR_LIST_DECL_DUAL(VPOVS, VPO12, VPO24); 1111 MS_PIN_DECL(V22, GPIOS2, ROMD6, VPOVS); 1112 1113 #define U20 147 1114 #define U20_DESC SIG_DESC_SET(SCU8C, 3) 1115 SIG_EXPR_DECL(ROMD7, ROM8, U20_DESC, VPOOFF0_DESC); 1116 SIG_EXPR_DECL(ROMD7, ROM16, U20_DESC, VPOOFF0_DESC); 1117 SIG_EXPR_DECL(ROMD7, ROM16S, U20_DESC, VPOOFF0_DESC); 1118 SIG_EXPR_LIST_DECL(ROMD7, SIG_EXPR_PTR(ROMD7, ROM8), 1119 SIG_EXPR_PTR(ROMD7, ROM16), 1120 SIG_EXPR_PTR(ROMD7, ROM16S)); 1121 SIG_EXPR_DECL(VPOCLK, VPO12, U20_DESC, VPO12_DESC); 1122 SIG_EXPR_DECL(VPOCLK, VPO24, U20_DESC, VPO24_DESC); 1123 SIG_EXPR_LIST_DECL_DUAL(VPOCLK, VPO12, VPO24); 1124 MS_PIN_DECL(U20, GPIOS3, ROMD7, VPOCLK); 1125 1126 #define R18 148 1127 #define ROMOE_DESC SIG_DESC_SET(SCU8C, 4) 1128 SIG_EXPR_LIST_DECL_SINGLE(GPIOS4, GPIOS4); 1129 SIG_EXPR_DECL(ROMOE, ROM8, ROMOE_DESC); 1130 SIG_EXPR_DECL(ROMOE, ROM16, ROMOE_DESC); 1131 SIG_EXPR_DECL(ROMOE, ROM16S, ROMOE_DESC); 1132 SIG_EXPR_LIST_DECL(ROMOE, SIG_EXPR_PTR(ROMOE, ROM8), 1133 SIG_EXPR_PTR(ROMOE, ROM16), 1134 SIG_EXPR_PTR(ROMOE, ROM16S)); 1135 MS_PIN_DECL_(R18, SIG_EXPR_LIST_PTR(ROMOE), SIG_EXPR_LIST_PTR(GPIOS4)); 1136 1137 #define N21 149 1138 #define ROMWE_DESC SIG_DESC_SET(SCU8C, 5) 1139 SIG_EXPR_LIST_DECL_SINGLE(GPIOS5, GPIOS5); 1140 SIG_EXPR_DECL(ROMWE, ROM8, ROMWE_DESC); 1141 SIG_EXPR_DECL(ROMWE, ROM16, ROMWE_DESC); 1142 SIG_EXPR_DECL(ROMWE, ROM16S, ROMWE_DESC); 1143 SIG_EXPR_LIST_DECL(ROMWE, SIG_EXPR_PTR(ROMWE, ROM8), 1144 SIG_EXPR_PTR(ROMWE, ROM16), 1145 SIG_EXPR_PTR(ROMWE, ROM16S)); 1146 MS_PIN_DECL_(N21, SIG_EXPR_LIST_PTR(ROMWE), SIG_EXPR_LIST_PTR(GPIOS5)); 1147 1148 #define L22 150 1149 #define L22_DESC SIG_DESC_SET(SCU8C, 6) 1150 SIG_EXPR_DECL(ROMA22, ROM8, L22_DESC, VPO_OFF_12); 1151 SIG_EXPR_DECL(ROMA22, ROM16, L22_DESC, VPO_OFF_12); 1152 SIG_EXPR_DECL(ROMA22, ROM16S, L22_DESC, VPO_OFF_12); 1153 SIG_EXPR_LIST_DECL(ROMA22, SIG_EXPR_PTR(ROMA22, ROM8), 1154 SIG_EXPR_PTR(ROMA22, ROM16), 1155 SIG_EXPR_PTR(ROMA22, ROM16S)); 1156 SIG_EXPR_LIST_DECL_SINGLE(VPOR4, VPO24, L22_DESC, VPO_24_OFF); 1157 MS_PIN_DECL(L22, GPIOS6, ROMA22, VPOR4); 1158 1159 #define K18 151 1160 #define K18_DESC SIG_DESC_SET(SCU8C, 7) 1161 SIG_EXPR_DECL(ROMA23, ROM8, K18_DESC, VPO_OFF_12); 1162 SIG_EXPR_DECL(ROMA23, ROM16, K18_DESC, VPO_OFF_12); 1163 SIG_EXPR_DECL(ROMA23, ROM16S, K18_DESC, VPO_OFF_12); 1164 SIG_EXPR_LIST_DECL(ROMA23, SIG_EXPR_PTR(ROMA23, ROM8), 1165 SIG_EXPR_PTR(ROMA23, ROM16), 1166 SIG_EXPR_PTR(ROMA23, ROM16S)); 1167 SIG_EXPR_LIST_DECL_SINGLE(VPOR5, VPO24, K18_DESC, VPO_24_OFF); 1168 MS_PIN_DECL(K18, GPIOS7, ROMA23, VPOR5); 1169 1170 #define RMII1_DESC SIG_DESC_BIT(HW_STRAP1, 6, 0) 1171 1172 #define A12 152 1173 SIG_EXPR_LIST_DECL_SINGLE(GPIOT0, GPIOT0, SIG_DESC_SET(SCUA0, 0)); 1174 SIG_EXPR_LIST_DECL_SINGLE(RMII1TXEN, RMII1, RMII1_DESC); 1175 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXCK, RGMII1); 1176 MS_PIN_DECL_(A12, SIG_EXPR_LIST_PTR(GPIOT0), SIG_EXPR_LIST_PTR(RMII1TXEN), 1177 SIG_EXPR_LIST_PTR(RGMII1TXCK)); 1178 1179 #define B12 153 1180 SIG_EXPR_LIST_DECL_SINGLE(GPIOT1, GPIOT1, SIG_DESC_SET(SCUA0, 1)); 1181 SIG_EXPR_LIST_DECL_SINGLE(DASHB12, RMII1, RMII1_DESC); 1182 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXCTL, RGMII1); 1183 MS_PIN_DECL_(B12, SIG_EXPR_LIST_PTR(GPIOT1), SIG_EXPR_LIST_PTR(DASHB12), 1184 SIG_EXPR_LIST_PTR(RGMII1TXCTL)); 1185 1186 #define C12 154 1187 SIG_EXPR_LIST_DECL_SINGLE(GPIOT2, GPIOT2, SIG_DESC_SET(SCUA0, 2)); 1188 SIG_EXPR_LIST_DECL_SINGLE(RMII1TXD0, RMII1, RMII1_DESC); 1189 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD0, RGMII1); 1190 MS_PIN_DECL_(C12, SIG_EXPR_LIST_PTR(GPIOT2), SIG_EXPR_LIST_PTR(RMII1TXD0), 1191 SIG_EXPR_LIST_PTR(RGMII1TXD0)); 1192 1193 #define D12 155 1194 SIG_EXPR_LIST_DECL_SINGLE(GPIOT3, GPIOT3, SIG_DESC_SET(SCUA0, 3)); 1195 SIG_EXPR_LIST_DECL_SINGLE(RMII1TXD1, RMII1, RMII1_DESC); 1196 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD1, RGMII1); 1197 MS_PIN_DECL_(D12, SIG_EXPR_LIST_PTR(GPIOT3), SIG_EXPR_LIST_PTR(RMII1TXD1), 1198 SIG_EXPR_LIST_PTR(RGMII1TXD1)); 1199 1200 #define E12 156 1201 SIG_EXPR_LIST_DECL_SINGLE(GPIOT4, GPIOT4, SIG_DESC_SET(SCUA0, 4)); 1202 SIG_EXPR_LIST_DECL_SINGLE(DASHE12, RMII1, RMII1_DESC); 1203 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD2, RGMII1); 1204 MS_PIN_DECL_(E12, SIG_EXPR_LIST_PTR(GPIOT4), SIG_EXPR_LIST_PTR(DASHE12), 1205 SIG_EXPR_LIST_PTR(RGMII1TXD2)); 1206 1207 #define A13 157 1208 SIG_EXPR_LIST_DECL_SINGLE(GPIOT5, GPIOT5, SIG_DESC_SET(SCUA0, 5)); 1209 SIG_EXPR_LIST_DECL_SINGLE(DASHA13, RMII1, RMII1_DESC); 1210 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD3, RGMII1); 1211 MS_PIN_DECL_(A13, SIG_EXPR_LIST_PTR(GPIOT5), SIG_EXPR_LIST_PTR(DASHA13), 1212 SIG_EXPR_LIST_PTR(RGMII1TXD3)); 1213 1214 #define RMII2_DESC SIG_DESC_BIT(HW_STRAP1, 7, 0) 1215 1216 #define D9 158 1217 SIG_EXPR_LIST_DECL_SINGLE(GPIOT6, GPIOT6, SIG_DESC_SET(SCUA0, 6)); 1218 SIG_EXPR_LIST_DECL_SINGLE(RMII2TXEN, RMII2, RMII2_DESC); 1219 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXCK, RGMII2); 1220 MS_PIN_DECL_(D9, SIG_EXPR_LIST_PTR(GPIOT6), SIG_EXPR_LIST_PTR(RMII2TXEN), 1221 SIG_EXPR_LIST_PTR(RGMII2TXCK)); 1222 1223 #define E9 159 1224 SIG_EXPR_LIST_DECL_SINGLE(GPIOT7, GPIOT7, SIG_DESC_SET(SCUA0, 7)); 1225 SIG_EXPR_LIST_DECL_SINGLE(DASHE9, RMII2, RMII2_DESC); 1226 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXCTL, RGMII2); 1227 MS_PIN_DECL_(E9, SIG_EXPR_LIST_PTR(GPIOT7), SIG_EXPR_LIST_PTR(DASHE9), 1228 SIG_EXPR_LIST_PTR(RGMII2TXCTL)); 1229 1230 #define A10 160 1231 SIG_EXPR_LIST_DECL_SINGLE(GPIOU0, GPIOU0, SIG_DESC_SET(SCUA0, 8)); 1232 SIG_EXPR_LIST_DECL_SINGLE(RMII2TXD0, RMII2, RMII2_DESC); 1233 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD0, RGMII2); 1234 MS_PIN_DECL_(A10, SIG_EXPR_LIST_PTR(GPIOU0), SIG_EXPR_LIST_PTR(RMII2TXD0), 1235 SIG_EXPR_LIST_PTR(RGMII2TXD0)); 1236 1237 #define B10 161 1238 SIG_EXPR_LIST_DECL_SINGLE(GPIOU1, GPIOU1, SIG_DESC_SET(SCUA0, 9)); 1239 SIG_EXPR_LIST_DECL_SINGLE(RMII2TXD1, RMII2, RMII2_DESC); 1240 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD1, RGMII2); 1241 MS_PIN_DECL_(B10, SIG_EXPR_LIST_PTR(GPIOU1), SIG_EXPR_LIST_PTR(RMII2TXD1), 1242 SIG_EXPR_LIST_PTR(RGMII2TXD1)); 1243 1244 #define C10 162 1245 SIG_EXPR_LIST_DECL_SINGLE(GPIOU2, GPIOU2, SIG_DESC_SET(SCUA0, 10)); 1246 SIG_EXPR_LIST_DECL_SINGLE(DASHC10, RMII2, RMII2_DESC); 1247 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD2, RGMII2); 1248 MS_PIN_DECL_(C10, SIG_EXPR_LIST_PTR(GPIOU2), SIG_EXPR_LIST_PTR(DASHC10), 1249 SIG_EXPR_LIST_PTR(RGMII2TXD2)); 1250 1251 #define D10 163 1252 SIG_EXPR_LIST_DECL_SINGLE(GPIOU3, GPIOU3, SIG_DESC_SET(SCUA0, 11)); 1253 SIG_EXPR_LIST_DECL_SINGLE(DASHD10, RMII2, RMII2_DESC); 1254 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD3, RGMII2); 1255 MS_PIN_DECL_(D10, SIG_EXPR_LIST_PTR(GPIOU3), SIG_EXPR_LIST_PTR(DASHD10), 1256 SIG_EXPR_LIST_PTR(RGMII2TXD3)); 1257 1258 #define E11 164 1259 SIG_EXPR_LIST_DECL_SINGLE(GPIOU4, GPIOU4, SIG_DESC_SET(SCUA0, 12)); 1260 SIG_EXPR_LIST_DECL_SINGLE(RMII1RCLK, RMII1, RMII1_DESC); 1261 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXCK, RGMII1); 1262 MS_PIN_DECL_(E11, SIG_EXPR_LIST_PTR(GPIOU4), SIG_EXPR_LIST_PTR(RMII1RCLK), 1263 SIG_EXPR_LIST_PTR(RGMII1RXCK)); 1264 1265 #define D11 165 1266 SIG_EXPR_LIST_DECL_SINGLE(GPIOU5, GPIOU5, SIG_DESC_SET(SCUA0, 13)); 1267 SIG_EXPR_LIST_DECL_SINGLE(DASHD11, RMII1, RMII1_DESC); 1268 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXCTL, RGMII1); 1269 MS_PIN_DECL_(D11, SIG_EXPR_LIST_PTR(GPIOU5), SIG_EXPR_LIST_PTR(DASHD11), 1270 SIG_EXPR_LIST_PTR(RGMII1RXCTL)); 1271 1272 #define C11 166 1273 SIG_EXPR_LIST_DECL_SINGLE(GPIOU6, GPIOU6, SIG_DESC_SET(SCUA0, 14)); 1274 SIG_EXPR_LIST_DECL_SINGLE(RMII1RXD0, RMII1, RMII1_DESC); 1275 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD0, RGMII1); 1276 MS_PIN_DECL_(C11, SIG_EXPR_LIST_PTR(GPIOU6), SIG_EXPR_LIST_PTR(RMII1RXD0), 1277 SIG_EXPR_LIST_PTR(RGMII1RXD0)); 1278 1279 #define B11 167 1280 SIG_EXPR_LIST_DECL_SINGLE(GPIOU7, GPIOU7, SIG_DESC_SET(SCUA0, 15)); 1281 SIG_EXPR_LIST_DECL_SINGLE(RMII1RXD1, RMII1, RMII1_DESC); 1282 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD1, RGMII1); 1283 MS_PIN_DECL_(B11, SIG_EXPR_LIST_PTR(GPIOU7), SIG_EXPR_LIST_PTR(RMII1RXD1), 1284 SIG_EXPR_LIST_PTR(RGMII1RXD1)); 1285 1286 #define A11 168 1287 SIG_EXPR_LIST_DECL_SINGLE(GPIOV0, GPIOV0, SIG_DESC_SET(SCUA0, 16)); 1288 SIG_EXPR_LIST_DECL_SINGLE(RMII1CRSDV, RMII1, RMII1_DESC); 1289 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD2, RGMII1); 1290 MS_PIN_DECL_(A11, SIG_EXPR_LIST_PTR(GPIOV0), SIG_EXPR_LIST_PTR(RMII1CRSDV), 1291 SIG_EXPR_LIST_PTR(RGMII1RXD2)); 1292 1293 #define E10 169 1294 SIG_EXPR_LIST_DECL_SINGLE(GPIOV1, GPIOV1, SIG_DESC_SET(SCUA0, 17)); 1295 SIG_EXPR_LIST_DECL_SINGLE(RMII1RXER, RMII1, RMII1_DESC); 1296 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD3, RGMII1); 1297 MS_PIN_DECL_(E10, SIG_EXPR_LIST_PTR(GPIOV1), SIG_EXPR_LIST_PTR(RMII1RXER), 1298 SIG_EXPR_LIST_PTR(RGMII1RXD3)); 1299 1300 #define C9 170 1301 SIG_EXPR_LIST_DECL_SINGLE(GPIOV2, GPIOV2, SIG_DESC_SET(SCUA0, 18)); 1302 SIG_EXPR_LIST_DECL_SINGLE(RMII2RCLK, RMII2, RMII2_DESC); 1303 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXCK, RGMII2); 1304 MS_PIN_DECL_(C9, SIG_EXPR_LIST_PTR(GPIOV2), SIG_EXPR_LIST_PTR(RMII2RCLK), 1305 SIG_EXPR_LIST_PTR(RGMII2RXCK)); 1306 1307 #define B9 171 1308 SIG_EXPR_LIST_DECL_SINGLE(GPIOV3, GPIOV3, SIG_DESC_SET(SCUA0, 19)); 1309 SIG_EXPR_LIST_DECL_SINGLE(DASHB9, RMII2, RMII2_DESC); 1310 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXCTL, RGMII2); 1311 MS_PIN_DECL_(B9, SIG_EXPR_LIST_PTR(GPIOV3), SIG_EXPR_LIST_PTR(DASHB9), 1312 SIG_EXPR_LIST_PTR(RGMII2RXCTL)); 1313 1314 #define A9 172 1315 SIG_EXPR_LIST_DECL_SINGLE(GPIOV4, GPIOV4, SIG_DESC_SET(SCUA0, 20)); 1316 SIG_EXPR_LIST_DECL_SINGLE(RMII2RXD0, RMII2, RMII2_DESC); 1317 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD0, RGMII2); 1318 MS_PIN_DECL_(A9, SIG_EXPR_LIST_PTR(GPIOV4), SIG_EXPR_LIST_PTR(RMII2RXD0), 1319 SIG_EXPR_LIST_PTR(RGMII2RXD0)); 1320 1321 #define E8 173 1322 SIG_EXPR_LIST_DECL_SINGLE(GPIOV5, GPIOV5, SIG_DESC_SET(SCUA0, 21)); 1323 SIG_EXPR_LIST_DECL_SINGLE(RMII2RXD1, RMII2, RMII2_DESC); 1324 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD1, RGMII2); 1325 MS_PIN_DECL_(E8, SIG_EXPR_LIST_PTR(GPIOV5), SIG_EXPR_LIST_PTR(RMII2RXD1), 1326 SIG_EXPR_LIST_PTR(RGMII2RXD1)); 1327 1328 #define D8 174 1329 SIG_EXPR_LIST_DECL_SINGLE(GPIOV6, GPIOV6, SIG_DESC_SET(SCUA0, 22)); 1330 SIG_EXPR_LIST_DECL_SINGLE(RMII2CRSDV, RMII2, RMII2_DESC); 1331 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD2, RGMII2); 1332 MS_PIN_DECL_(D8, SIG_EXPR_LIST_PTR(GPIOV6), SIG_EXPR_LIST_PTR(RMII2CRSDV), 1333 SIG_EXPR_LIST_PTR(RGMII2RXD2)); 1334 1335 #define C8 175 1336 SIG_EXPR_LIST_DECL_SINGLE(GPIOV7, GPIOV7, SIG_DESC_SET(SCUA0, 23)); 1337 SIG_EXPR_LIST_DECL_SINGLE(RMII2RXER, RMII2, RMII2_DESC); 1338 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD3, RGMII2); 1339 MS_PIN_DECL_(C8, SIG_EXPR_LIST_PTR(GPIOV7), SIG_EXPR_LIST_PTR(RMII2RXER), 1340 SIG_EXPR_LIST_PTR(RGMII2RXD3)); 1341 1342 FUNC_GROUP_DECL(RMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11, 1343 E10); 1344 FUNC_GROUP_DECL(RGMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11, 1345 E10); 1346 1347 FUNC_GROUP_DECL(RMII2, D9, E9, A10, B10, C10, D10, C9, B9, A9, E8, D8, C8); 1348 FUNC_GROUP_DECL(RGMII2, D9, E9, A10, B10, C10, D10, C9, B9, A9, E8, D8, C8); 1349 1350 #define L5 176 1351 SIG_EXPR_LIST_DECL_SINGLE(GPIOW0, GPIOW0, SIG_DESC_SET(SCUA0, 24)); 1352 SIG_EXPR_LIST_DECL_SINGLE(ADC0, ADC0); 1353 MS_PIN_DECL_(L5, SIG_EXPR_LIST_PTR(GPIOW0), SIG_EXPR_LIST_PTR(ADC0)); 1354 FUNC_GROUP_DECL(ADC0, L5); 1355 1356 #define L4 177 1357 SIG_EXPR_LIST_DECL_SINGLE(GPIOW1, GPIOW1, SIG_DESC_SET(SCUA0, 25)); 1358 SIG_EXPR_LIST_DECL_SINGLE(ADC1, ADC1); 1359 MS_PIN_DECL_(L4, SIG_EXPR_LIST_PTR(GPIOW1), SIG_EXPR_LIST_PTR(ADC1)); 1360 FUNC_GROUP_DECL(ADC1, L4); 1361 1362 #define L3 178 1363 SIG_EXPR_LIST_DECL_SINGLE(GPIOW2, GPIOW2, SIG_DESC_SET(SCUA0, 26)); 1364 SIG_EXPR_LIST_DECL_SINGLE(ADC2, ADC2); 1365 MS_PIN_DECL_(L3, SIG_EXPR_LIST_PTR(GPIOW2), SIG_EXPR_LIST_PTR(ADC2)); 1366 FUNC_GROUP_DECL(ADC2, L3); 1367 1368 #define L2 179 1369 SIG_EXPR_LIST_DECL_SINGLE(GPIOW3, GPIOW3, SIG_DESC_SET(SCUA0, 27)); 1370 SIG_EXPR_LIST_DECL_SINGLE(ADC3, ADC3); 1371 MS_PIN_DECL_(L2, SIG_EXPR_LIST_PTR(GPIOW3), SIG_EXPR_LIST_PTR(ADC3)); 1372 FUNC_GROUP_DECL(ADC3, L2); 1373 1374 #define L1 180 1375 SIG_EXPR_LIST_DECL_SINGLE(GPIOW4, GPIOW4, SIG_DESC_SET(SCUA0, 28)); 1376 SIG_EXPR_LIST_DECL_SINGLE(ADC4, ADC4); 1377 MS_PIN_DECL_(L1, SIG_EXPR_LIST_PTR(GPIOW4), SIG_EXPR_LIST_PTR(ADC4)); 1378 FUNC_GROUP_DECL(ADC4, L1); 1379 1380 #define M5 181 1381 SIG_EXPR_LIST_DECL_SINGLE(GPIOW5, GPIOW5, SIG_DESC_SET(SCUA0, 29)); 1382 SIG_EXPR_LIST_DECL_SINGLE(ADC5, ADC5); 1383 MS_PIN_DECL_(M5, SIG_EXPR_LIST_PTR(GPIOW5), SIG_EXPR_LIST_PTR(ADC5)); 1384 FUNC_GROUP_DECL(ADC5, M5); 1385 1386 #define M4 182 1387 SIG_EXPR_LIST_DECL_SINGLE(GPIOW6, GPIOW6, SIG_DESC_SET(SCUA0, 30)); 1388 SIG_EXPR_LIST_DECL_SINGLE(ADC6, ADC6); 1389 MS_PIN_DECL_(M4, SIG_EXPR_LIST_PTR(GPIOW6), SIG_EXPR_LIST_PTR(ADC6)); 1390 FUNC_GROUP_DECL(ADC6, M4); 1391 1392 #define M3 183 1393 SIG_EXPR_LIST_DECL_SINGLE(GPIOW7, GPIOW7, SIG_DESC_SET(SCUA0, 31)); 1394 SIG_EXPR_LIST_DECL_SINGLE(ADC7, ADC7); 1395 MS_PIN_DECL_(M3, SIG_EXPR_LIST_PTR(GPIOW7), SIG_EXPR_LIST_PTR(ADC7)); 1396 FUNC_GROUP_DECL(ADC7, M3); 1397 1398 #define M2 184 1399 SIG_EXPR_LIST_DECL_SINGLE(GPIOX0, GPIOX0, SIG_DESC_SET(SCUA4, 0)); 1400 SIG_EXPR_LIST_DECL_SINGLE(ADC8, ADC8); 1401 MS_PIN_DECL_(M2, SIG_EXPR_LIST_PTR(GPIOX0), SIG_EXPR_LIST_PTR(ADC8)); 1402 FUNC_GROUP_DECL(ADC8, M2); 1403 1404 #define M1 185 1405 SIG_EXPR_LIST_DECL_SINGLE(GPIOX1, GPIOX1, SIG_DESC_SET(SCUA4, 1)); 1406 SIG_EXPR_LIST_DECL_SINGLE(ADC9, ADC9); 1407 MS_PIN_DECL_(M1, SIG_EXPR_LIST_PTR(GPIOX1), SIG_EXPR_LIST_PTR(ADC9)); 1408 FUNC_GROUP_DECL(ADC9, M1); 1409 1410 #define N5 186 1411 SIG_EXPR_LIST_DECL_SINGLE(GPIOX2, GPIOX2, SIG_DESC_SET(SCUA4, 2)); 1412 SIG_EXPR_LIST_DECL_SINGLE(ADC10, ADC10); 1413 MS_PIN_DECL_(N5, SIG_EXPR_LIST_PTR(GPIOX2), SIG_EXPR_LIST_PTR(ADC10)); 1414 FUNC_GROUP_DECL(ADC10, N5); 1415 1416 #define N4 187 1417 SIG_EXPR_LIST_DECL_SINGLE(GPIOX3, GPIOX3, SIG_DESC_SET(SCUA4, 3)); 1418 SIG_EXPR_LIST_DECL_SINGLE(ADC11, ADC11); 1419 MS_PIN_DECL_(N4, SIG_EXPR_LIST_PTR(GPIOX3), SIG_EXPR_LIST_PTR(ADC11)); 1420 FUNC_GROUP_DECL(ADC11, N4); 1421 1422 #define N3 188 1423 SIG_EXPR_LIST_DECL_SINGLE(GPIOX4, GPIOX4, SIG_DESC_SET(SCUA4, 4)); 1424 SIG_EXPR_LIST_DECL_SINGLE(ADC12, ADC12); 1425 MS_PIN_DECL_(N3, SIG_EXPR_LIST_PTR(GPIOX4), SIG_EXPR_LIST_PTR(ADC12)); 1426 FUNC_GROUP_DECL(ADC12, N3); 1427 1428 #define N2 189 1429 SIG_EXPR_LIST_DECL_SINGLE(GPIOX5, GPIOX5, SIG_DESC_SET(SCUA4, 5)); 1430 SIG_EXPR_LIST_DECL_SINGLE(ADC13, ADC13); 1431 MS_PIN_DECL_(N2, SIG_EXPR_LIST_PTR(GPIOX5), SIG_EXPR_LIST_PTR(ADC13)); 1432 FUNC_GROUP_DECL(ADC13, N2); 1433 1434 #define N1 190 1435 SIG_EXPR_LIST_DECL_SINGLE(GPIOX6, GPIOX6, SIG_DESC_SET(SCUA4, 6)); 1436 SIG_EXPR_LIST_DECL_SINGLE(ADC14, ADC14); 1437 MS_PIN_DECL_(N1, SIG_EXPR_LIST_PTR(GPIOX6), SIG_EXPR_LIST_PTR(ADC14)); 1438 FUNC_GROUP_DECL(ADC14, N1); 1439 1440 #define P5 191 1441 SIG_EXPR_LIST_DECL_SINGLE(GPIOX7, GPIOX7, SIG_DESC_SET(SCUA4, 7)); 1442 SIG_EXPR_LIST_DECL_SINGLE(ADC15, ADC15); 1443 MS_PIN_DECL_(P5, SIG_EXPR_LIST_PTR(GPIOX7), SIG_EXPR_LIST_PTR(ADC15)); 1444 FUNC_GROUP_DECL(ADC15, P5); 1445 1446 #define C21 192 1447 SIG_EXPR_DECL(SIOS3, SIOS3, SIG_DESC_SET(SCUA4, 8)); 1448 SIG_EXPR_DECL(SIOS3, ACPI, ACPI_DESC); 1449 SIG_EXPR_LIST_DECL_DUAL(SIOS3, SIOS3, ACPI); 1450 SS_PIN_DECL(C21, GPIOY0, SIOS3); 1451 FUNC_GROUP_DECL(SIOS3, C21); 1452 1453 #define F20 193 1454 SIG_EXPR_DECL(SIOS5, SIOS5, SIG_DESC_SET(SCUA4, 9)); 1455 SIG_EXPR_DECL(SIOS5, ACPI, ACPI_DESC); 1456 SIG_EXPR_LIST_DECL_DUAL(SIOS5, SIOS5, ACPI); 1457 SS_PIN_DECL(F20, GPIOY1, SIOS5); 1458 FUNC_GROUP_DECL(SIOS5, F20); 1459 1460 #define G20 194 1461 SIG_EXPR_DECL(SIOPWREQ, SIOPWREQ, SIG_DESC_SET(SCUA4, 10)); 1462 SIG_EXPR_DECL(SIOPWREQ, ACPI, ACPI_DESC); 1463 SIG_EXPR_LIST_DECL_DUAL(SIOPWREQ, SIOPWREQ, ACPI); 1464 SS_PIN_DECL(G20, GPIOY2, SIOPWREQ); 1465 FUNC_GROUP_DECL(SIOPWREQ, G20); 1466 1467 #define K20 195 1468 SIG_EXPR_DECL(SIOONCTRL, SIOONCTRL, SIG_DESC_SET(SCUA4, 11)); 1469 SIG_EXPR_DECL(SIOONCTRL, ACPI, ACPI_DESC); 1470 SIG_EXPR_LIST_DECL_DUAL(SIOONCTRL, SIOONCTRL, ACPI); 1471 SS_PIN_DECL(K20, GPIOY3, SIOONCTRL); 1472 FUNC_GROUP_DECL(SIOONCTRL, K20); 1473 1474 FUNC_GROUP_DECL(ACPI, B19, A20, D17, A19, C21, F20, G20, K20); 1475 1476 #define R22 200 1477 #define R22_DESC SIG_DESC_SET(SCUA4, 16) 1478 SIG_EXPR_DECL(ROMA2, ROM8, R22_DESC, VPOOFF0_DESC); 1479 SIG_EXPR_DECL(ROMA2, ROM16, R22_DESC, VPOOFF0_DESC); 1480 SIG_EXPR_LIST_DECL_DUAL(ROMA2, ROM8, ROM16); 1481 SIG_EXPR_DECL(VPOB0, VPO12, R22_DESC, VPO12_DESC); 1482 SIG_EXPR_DECL(VPOB0, VPO24, R22_DESC, VPO24_DESC); 1483 SIG_EXPR_DECL(VPOB0, VPOOFF1, R22_DESC, VPOOFF1_DESC); 1484 SIG_EXPR_LIST_DECL(VPOB0, SIG_EXPR_PTR(VPOB0, VPO12), 1485 SIG_EXPR_PTR(VPOB0, VPO24), SIG_EXPR_PTR(VPOB0, VPOOFF1)); 1486 MS_PIN_DECL(R22, GPIOZ0, ROMA2, VPOB0); 1487 1488 #define P18 201 1489 #define P18_DESC SIG_DESC_SET(SCUA4, 17) 1490 SIG_EXPR_DECL(ROMA3, ROM8, P18_DESC, VPOOFF0_DESC); 1491 SIG_EXPR_DECL(ROMA3, ROM16, P18_DESC, VPOOFF0_DESC); 1492 SIG_EXPR_LIST_DECL_DUAL(ROMA3, ROM8, ROM16); 1493 SIG_EXPR_DECL(VPOB1, VPO12, P18_DESC, VPO12_DESC); 1494 SIG_EXPR_DECL(VPOB1, VPO24, P18_DESC, VPO24_DESC); 1495 SIG_EXPR_DECL(VPOB1, VPOOFF1, P18_DESC, VPOOFF1_DESC); 1496 SIG_EXPR_LIST_DECL(VPOB1, SIG_EXPR_PTR(VPOB1, VPO12), 1497 SIG_EXPR_PTR(VPOB1, VPO24), SIG_EXPR_PTR(VPOB1, VPOOFF1)); 1498 MS_PIN_DECL(P18, GPIOZ1, ROMA3, VPOB1); 1499 1500 #define P19 202 1501 #define P19_DESC SIG_DESC_SET(SCUA4, 18) 1502 SIG_EXPR_DECL(ROMA4, ROM8, P19_DESC, VPOOFF0_DESC); 1503 SIG_EXPR_DECL(ROMA4, ROM16, P19_DESC, VPOOFF0_DESC); 1504 SIG_EXPR_LIST_DECL_DUAL(ROMA4, ROM8, ROM16); 1505 SIG_EXPR_DECL(VPOB2, VPO12, P19_DESC, VPO12_DESC); 1506 SIG_EXPR_DECL(VPOB2, VPO24, P19_DESC, VPO24_DESC); 1507 SIG_EXPR_DECL(VPOB2, VPOOFF1, P19_DESC, VPOOFF1_DESC); 1508 SIG_EXPR_LIST_DECL(VPOB2, SIG_EXPR_PTR(VPOB2, VPO12), 1509 SIG_EXPR_PTR(VPOB2, VPO24), SIG_EXPR_PTR(VPOB2, VPOOFF1)); 1510 MS_PIN_DECL(P19, GPIOZ2, ROMA4, VPOB2); 1511 1512 #define P20 203 1513 #define P20_DESC SIG_DESC_SET(SCUA4, 19) 1514 SIG_EXPR_DECL(ROMA5, ROM8, P20_DESC, VPOOFF0_DESC); 1515 SIG_EXPR_DECL(ROMA5, ROM16, P20_DESC, VPOOFF0_DESC); 1516 SIG_EXPR_LIST_DECL_DUAL(ROMA5, ROM8, ROM16); 1517 SIG_EXPR_DECL(VPOB3, VPO12, P20_DESC, VPO12_DESC); 1518 SIG_EXPR_DECL(VPOB3, VPO24, P20_DESC, VPO24_DESC); 1519 SIG_EXPR_DECL(VPOB3, VPOOFF1, P20_DESC, VPOOFF1_DESC); 1520 SIG_EXPR_LIST_DECL(VPOB3, SIG_EXPR_PTR(VPOB3, VPO12), 1521 SIG_EXPR_PTR(VPOB3, VPO24), SIG_EXPR_PTR(VPOB3, VPOOFF1)); 1522 MS_PIN_DECL(P20, GPIOZ3, ROMA5, VPOB3); 1523 1524 #define P21 204 1525 #define P21_DESC SIG_DESC_SET(SCUA4, 20) 1526 SIG_EXPR_DECL(ROMA6, ROM8, P21_DESC, VPOOFF0_DESC); 1527 SIG_EXPR_DECL(ROMA6, ROM16, P21_DESC, VPOOFF0_DESC); 1528 SIG_EXPR_LIST_DECL_DUAL(ROMA6, ROM8, ROM16); 1529 SIG_EXPR_DECL(VPOB4, VPO12, P21_DESC, VPO12_DESC); 1530 SIG_EXPR_DECL(VPOB4, VPO24, P21_DESC, VPO24_DESC); 1531 SIG_EXPR_DECL(VPOB4, VPOOFF1, P21_DESC, VPOOFF1_DESC); 1532 SIG_EXPR_LIST_DECL(VPOB4, SIG_EXPR_PTR(VPOB4, VPO12), 1533 SIG_EXPR_PTR(VPOB4, VPO24), SIG_EXPR_PTR(VPOB4, VPOOFF1)); 1534 MS_PIN_DECL(P21, GPIOZ4, ROMA6, VPOB4); 1535 1536 #define P22 205 1537 #define P22_DESC SIG_DESC_SET(SCUA4, 21) 1538 SIG_EXPR_DECL(ROMA7, ROM8, P22_DESC, VPOOFF0_DESC); 1539 SIG_EXPR_DECL(ROMA7, ROM16, P22_DESC, VPOOFF0_DESC); 1540 SIG_EXPR_LIST_DECL_DUAL(ROMA7, ROM8, ROM16); 1541 SIG_EXPR_DECL(VPOB5, VPO12, P22_DESC, VPO12_DESC); 1542 SIG_EXPR_DECL(VPOB5, VPO24, P22_DESC, VPO24_DESC); 1543 SIG_EXPR_DECL(VPOB5, VPOOFF1, P22_DESC, VPOOFF1_DESC); 1544 SIG_EXPR_LIST_DECL(VPOB5, SIG_EXPR_PTR(VPOB5, VPO12), 1545 SIG_EXPR_PTR(VPOB5, VPO24), SIG_EXPR_PTR(VPOB5, VPOOFF1)); 1546 MS_PIN_DECL(P22, GPIOZ5, ROMA7, VPOB5); 1547 1548 #define M19 206 1549 #define M19_DESC SIG_DESC_SET(SCUA4, 22) 1550 SIG_EXPR_DECL(ROMA8, ROM8, M19_DESC, VPOOFF0_DESC); 1551 SIG_EXPR_DECL(ROMA8, ROM16, M19_DESC, VPOOFF0_DESC); 1552 SIG_EXPR_LIST_DECL_DUAL(ROMA8, ROM8, ROM16); 1553 SIG_EXPR_DECL(VPOB6, VPO12, M19_DESC, VPO12_DESC); 1554 SIG_EXPR_DECL(VPOB6, VPO24, M19_DESC, VPO24_DESC); 1555 SIG_EXPR_DECL(VPOB6, VPOOFF1, M19_DESC, VPOOFF1_DESC); 1556 SIG_EXPR_LIST_DECL(VPOB6, SIG_EXPR_PTR(VPOB6, VPO12), 1557 SIG_EXPR_PTR(VPOB6, VPO24), SIG_EXPR_PTR(VPOB6, VPOOFF1)); 1558 MS_PIN_DECL(M19, GPIOZ6, ROMA8, VPOB6); 1559 1560 #define M20 207 1561 #define M20_DESC SIG_DESC_SET(SCUA4, 23) 1562 SIG_EXPR_DECL(ROMA9, ROM8, M20_DESC, VPOOFF0_DESC); 1563 SIG_EXPR_DECL(ROMA9, ROM16, M20_DESC, VPOOFF0_DESC); 1564 SIG_EXPR_LIST_DECL_DUAL(ROMA9, ROM8, ROM16); 1565 SIG_EXPR_DECL(VPOB7, VPO12, M20_DESC, VPO12_DESC); 1566 SIG_EXPR_DECL(VPOB7, VPO24, M20_DESC, VPO24_DESC); 1567 SIG_EXPR_DECL(VPOB7, VPOOFF1, M20_DESC, VPOOFF1_DESC); 1568 SIG_EXPR_LIST_DECL(VPOB7, SIG_EXPR_PTR(VPOB7, VPO12), 1569 SIG_EXPR_PTR(VPOB7, VPO24), SIG_EXPR_PTR(VPOB7, VPOOFF1)); 1570 MS_PIN_DECL(M20, GPIOZ7, ROMA9, VPOB7); 1571 1572 #define M21 208 1573 #define M21_DESC SIG_DESC_SET(SCUA4, 24) 1574 SIG_EXPR_DECL(ROMA10, ROM8, M21_DESC, VPOOFF0_DESC); 1575 SIG_EXPR_DECL(ROMA10, ROM16, M21_DESC, VPOOFF0_DESC); 1576 SIG_EXPR_LIST_DECL_DUAL(ROMA10, ROM8, ROM16); 1577 SIG_EXPR_DECL(VPOG0, VPO12, M21_DESC, VPO12_DESC); 1578 SIG_EXPR_DECL(VPOG0, VPO24, M21_DESC, VPO24_DESC); 1579 SIG_EXPR_DECL(VPOG0, VPOOFF1, M21_DESC, VPOOFF1_DESC); 1580 SIG_EXPR_LIST_DECL(VPOG0, SIG_EXPR_PTR(VPOG0, VPO12), 1581 SIG_EXPR_PTR(VPOG0, VPO24), SIG_EXPR_PTR(VPOG0, VPOOFF1)); 1582 MS_PIN_DECL(M21, GPIOAA0, ROMA10, VPOG0); 1583 1584 #define M22 209 1585 #define M22_DESC SIG_DESC_SET(SCUA4, 25) 1586 SIG_EXPR_DECL(ROMA11, ROM8, M22_DESC, VPOOFF0_DESC); 1587 SIG_EXPR_DECL(ROMA11, ROM16, M22_DESC, VPOOFF0_DESC); 1588 SIG_EXPR_LIST_DECL_DUAL(ROMA11, ROM8, ROM16); 1589 SIG_EXPR_DECL(VPOG1, VPO12, M22_DESC, VPO12_DESC); 1590 SIG_EXPR_DECL(VPOG1, VPO24, M22_DESC, VPO24_DESC); 1591 SIG_EXPR_DECL(VPOG1, VPOOFF1, M22_DESC, VPOOFF1_DESC); 1592 SIG_EXPR_LIST_DECL(VPOG1, SIG_EXPR_PTR(VPOG1, VPO12), 1593 SIG_EXPR_PTR(VPOG1, VPO24), SIG_EXPR_PTR(VPOG1, VPOOFF1)); 1594 MS_PIN_DECL(M22, GPIOAA1, ROMA11, VPOG1); 1595 1596 #define L18 210 1597 #define L18_DESC SIG_DESC_SET(SCUA4, 26) 1598 SIG_EXPR_DECL(ROMA12, ROM8, L18_DESC, VPOOFF0_DESC); 1599 SIG_EXPR_DECL(ROMA12, ROM16, L18_DESC, VPOOFF0_DESC); 1600 SIG_EXPR_LIST_DECL_DUAL(ROMA12, ROM8, ROM16); 1601 SIG_EXPR_DECL(VPOG2, VPO12, L18_DESC, VPO12_DESC); 1602 SIG_EXPR_DECL(VPOG2, VPO24, L18_DESC, VPO24_DESC); 1603 SIG_EXPR_DECL(VPOG2, VPOOFF1, L18_DESC, VPOOFF1_DESC); 1604 SIG_EXPR_LIST_DECL(VPOG2, SIG_EXPR_PTR(VPOG2, VPO12), 1605 SIG_EXPR_PTR(VPOG2, VPO24), SIG_EXPR_PTR(VPOG2, VPOOFF1)); 1606 MS_PIN_DECL(L18, GPIOAA2, ROMA12, VPOG2); 1607 1608 #define L19 211 1609 #define L19_DESC SIG_DESC_SET(SCUA4, 27) 1610 SIG_EXPR_DECL(ROMA13, ROM8, L19_DESC, VPOOFF0_DESC); 1611 SIG_EXPR_DECL(ROMA13, ROM16, L19_DESC, VPOOFF0_DESC); 1612 SIG_EXPR_LIST_DECL_DUAL(ROMA13, ROM8, ROM16); 1613 SIG_EXPR_DECL(VPOG3, VPO12, L19_DESC, VPO12_DESC); 1614 SIG_EXPR_DECL(VPOG3, VPO24, L19_DESC, VPO24_DESC); 1615 SIG_EXPR_DECL(VPOG3, VPOOFF1, L19_DESC, VPOOFF1_DESC); 1616 SIG_EXPR_LIST_DECL(VPOG3, SIG_EXPR_PTR(VPOG3, VPO12), 1617 SIG_EXPR_PTR(VPOG3, VPO24), SIG_EXPR_PTR(VPOG3, VPOOFF1)); 1618 MS_PIN_DECL(L19, GPIOAA3, ROMA13, VPOG3); 1619 1620 #define L20 212 1621 #define L20_DESC SIG_DESC_SET(SCUA4, 28) 1622 SIG_EXPR_DECL(ROMA14, ROM8, L20_DESC, VPO_OFF_12); 1623 SIG_EXPR_DECL(ROMA14, ROM16, L20_DESC, VPO_OFF_12); 1624 SIG_EXPR_LIST_DECL_DUAL(ROMA14, ROM8, ROM16); 1625 SIG_EXPR_DECL(VPOG4, VPO24, L20_DESC, VPO24_DESC); 1626 SIG_EXPR_DECL(VPOG4, VPOOFF1, L20_DESC, VPOOFF1_DESC); 1627 SIG_EXPR_LIST_DECL_DUAL(VPOG4, VPO24, VPOOFF1); 1628 MS_PIN_DECL(L20, GPIOAA4, ROMA14, VPOG4); 1629 1630 #define L21 213 1631 #define L21_DESC SIG_DESC_SET(SCUA4, 29) 1632 SIG_EXPR_DECL(ROMA15, ROM8, L21_DESC, VPO_OFF_12); 1633 SIG_EXPR_DECL(ROMA15, ROM16, L21_DESC, VPO_OFF_12); 1634 SIG_EXPR_LIST_DECL_DUAL(ROMA15, ROM8, ROM16); 1635 SIG_EXPR_DECL(VPOG5, VPO24, L21_DESC, VPO24_DESC); 1636 SIG_EXPR_DECL(VPOG5, VPOOFF1, L21_DESC, VPOOFF1_DESC); 1637 SIG_EXPR_LIST_DECL_DUAL(VPOG5, VPO24, VPOOFF1); 1638 MS_PIN_DECL(L21, GPIOAA5, ROMA15, VPOG5); 1639 1640 #define T18 214 1641 #define T18_DESC SIG_DESC_SET(SCUA4, 30) 1642 SIG_EXPR_DECL(ROMA16, ROM8, T18_DESC, VPO_OFF_12); 1643 SIG_EXPR_DECL(ROMA16, ROM16, T18_DESC, VPO_OFF_12); 1644 SIG_EXPR_LIST_DECL_DUAL(ROMA16, ROM8, ROM16); 1645 SIG_EXPR_DECL(VPOG6, VPO24, T18_DESC, VPO24_DESC); 1646 SIG_EXPR_DECL(VPOG6, VPOOFF1, T18_DESC, VPOOFF1_DESC); 1647 SIG_EXPR_LIST_DECL_DUAL(VPOG6, VPO24, VPOOFF1); 1648 MS_PIN_DECL(T18, GPIOAA6, ROMA16, VPOG6); 1649 1650 #define N18 215 1651 #define N18_DESC SIG_DESC_SET(SCUA4, 31) 1652 SIG_EXPR_DECL(ROMA17, ROM8, N18_DESC, VPO_OFF_12); 1653 SIG_EXPR_DECL(ROMA17, ROM16, N18_DESC, VPO_OFF_12); 1654 SIG_EXPR_LIST_DECL_DUAL(ROMA17, ROM8, ROM16); 1655 SIG_EXPR_DECL(VPOG7, VPO24, N18_DESC, VPO24_DESC); 1656 SIG_EXPR_DECL(VPOG7, VPOOFF1, N18_DESC, VPOOFF1_DESC); 1657 SIG_EXPR_LIST_DECL_DUAL(VPOG7, VPO24, VPOOFF1); 1658 MS_PIN_DECL(N18, GPIOAA7, ROMA17, VPOG7); 1659 1660 #define N19 216 1661 #define N19_DESC SIG_DESC_SET(SCUA8, 0) 1662 SIG_EXPR_DECL(ROMA18, ROM8, N19_DESC, VPO_OFF_12); 1663 SIG_EXPR_DECL(ROMA18, ROM16, N19_DESC, VPO_OFF_12); 1664 SIG_EXPR_LIST_DECL_DUAL(ROMA18, ROM8, ROM16); 1665 SIG_EXPR_DECL(VPOR0, VPO24, N19_DESC, VPO24_DESC); 1666 SIG_EXPR_DECL(VPOR0, VPOOFF1, N19_DESC, VPOOFF1_DESC); 1667 SIG_EXPR_LIST_DECL_DUAL(VPOR0, VPO24, VPOOFF1); 1668 MS_PIN_DECL(N19, GPIOAB0, ROMA18, VPOR0); 1669 1670 #define M18 217 1671 #define M18_DESC SIG_DESC_SET(SCUA8, 1) 1672 SIG_EXPR_DECL(ROMA19, ROM8, M18_DESC, VPO_OFF_12); 1673 SIG_EXPR_DECL(ROMA19, ROM16, M18_DESC, VPO_OFF_12); 1674 SIG_EXPR_LIST_DECL_DUAL(ROMA19, ROM8, ROM16); 1675 SIG_EXPR_DECL(VPOR1, VPO24, M18_DESC, VPO24_DESC); 1676 SIG_EXPR_DECL(VPOR1, VPOOFF1, M18_DESC, VPOOFF1_DESC); 1677 SIG_EXPR_LIST_DECL_DUAL(VPOR1, VPO24, VPOOFF1); 1678 MS_PIN_DECL(M18, GPIOAB1, ROMA19, VPOR1); 1679 1680 #define N22 218 1681 #define N22_DESC SIG_DESC_SET(SCUA8, 2) 1682 SIG_EXPR_DECL(ROMA20, ROM8, N22_DESC, VPO_OFF_12); 1683 SIG_EXPR_DECL(ROMA20, ROM16, N22_DESC, VPO_OFF_12); 1684 SIG_EXPR_LIST_DECL_DUAL(ROMA20, ROM8, ROM16); 1685 SIG_EXPR_DECL(VPOR2, VPO24, N22_DESC, VPO24_DESC); 1686 SIG_EXPR_DECL(VPOR2, VPOOFF1, N22_DESC, VPOOFF1_DESC); 1687 SIG_EXPR_LIST_DECL_DUAL(VPOR2, VPO24, VPOOFF1); 1688 MS_PIN_DECL(N22, GPIOAB2, ROMA20, VPOR2); 1689 1690 #define N20 219 1691 #define N20_DESC SIG_DESC_SET(SCUA8, 3) 1692 SIG_EXPR_DECL(ROMA21, ROM8, N20_DESC, VPO_OFF_12); 1693 SIG_EXPR_DECL(ROMA21, ROM16, N20_DESC, VPO_OFF_12); 1694 SIG_EXPR_LIST_DECL_DUAL(ROMA21, ROM8, ROM16); 1695 SIG_EXPR_DECL(VPOR3, VPO24, N20_DESC, VPO24_DESC); 1696 SIG_EXPR_DECL(VPOR3, VPOOFF1, N20_DESC, VPOOFF1_DESC); 1697 SIG_EXPR_LIST_DECL_DUAL(VPOR3, VPO24, VPOOFF1); 1698 MS_PIN_DECL(N20, GPIOAB3, ROMA21, VPOR3); 1699 1700 FUNC_GROUP_DECL(ROM8, V20, U21, T19, V22, U20, R18, N21, L22, K18, W21, Y22, 1701 U19, R22, P18, P19, P20, P21, P22, M19, M20, M21, M22, L18, 1702 L19, L20, L21, T18, N18, N19, M18, N22, N20); 1703 FUNC_GROUP_DECL(ROM16, V20, U21, T19, V22, U20, R18, N21, L22, K18, 1704 A8, C7, B7, A7, D7, B6, A6, E7, W21, Y22, U19, R22, P18, P19, 1705 P20, P21, P22, M19, M20, M21, M22, L18, L19, L20, L21, T18, 1706 N18, N19, M18, N22, N20); 1707 FUNC_GROUP_DECL(VPO12, U21, T19, V22, U20, R22, P18, P19, P20, P21, P22, M19, 1708 M20, M21, M22, L18, L19, L20, L21, T18, N18, N19, M18, N22, 1709 N20); 1710 FUNC_GROUP_DECL(VPO24, U21, T19, V22, U20, L22, K18, V21, W22, R22, P18, P19, 1711 P20, P21, P22, M19, M20, M21, M22, L18, L19); 1712 1713 #define USB11H2_DESC SIG_DESC_SET(SCU90, 3) 1714 #define USB11D1_DESC SIG_DESC_BIT(SCU90, 3, 0) 1715 1716 #define K4 220 1717 SIG_EXPR_LIST_DECL_SINGLE(USB11HDP2, USB11H2, USB11H2_DESC); 1718 SIG_EXPR_LIST_DECL_SINGLE(USB11DP1, USB11D1, USB11D1_DESC); 1719 MS_PIN_DECL_(K4, SIG_EXPR_LIST_PTR(USB11HDP2), SIG_EXPR_LIST_PTR(USB11DP1)); 1720 1721 #define K3 221 1722 SIG_EXPR_LIST_DECL_SINGLE(USB11HDN1, USB11H2, USB11H2_DESC); 1723 SIG_EXPR_LIST_DECL_SINGLE(USB11DDN1, USB11D1, USB11D1_DESC); 1724 MS_PIN_DECL_(K3, SIG_EXPR_LIST_PTR(USB11HDN1), SIG_EXPR_LIST_PTR(USB11DDN1)); 1725 1726 FUNC_GROUP_DECL(USB11H2, K4, K3); 1727 FUNC_GROUP_DECL(USB11D1, K4, K3); 1728 1729 #define USB2H1_DESC SIG_DESC_SET(SCU90, 29) 1730 #define USB2D1_DESC SIG_DESC_BIT(SCU90, 29, 0) 1731 1732 #define AB21 222 1733 SIG_EXPR_LIST_DECL_SINGLE(USB2HDP1, USB2H1, USB2H1_DESC); 1734 SIG_EXPR_LIST_DECL_SINGLE(USB2DDP1, USB2D1, USB2D1_DESC); 1735 MS_PIN_DECL_(AB21, SIG_EXPR_LIST_PTR(USB2HDP1), SIG_EXPR_LIST_PTR(USB2DDP1)); 1736 1737 #define AB20 223 1738 SIG_EXPR_LIST_DECL_SINGLE(USB2HDN1, USB2H1, USB2H1_DESC); 1739 SIG_EXPR_LIST_DECL_SINGLE(USB2DDN1, USB2D1, USB2D1_DESC); 1740 MS_PIN_DECL_(AB20, SIG_EXPR_LIST_PTR(USB2HDN1), SIG_EXPR_LIST_PTR(USB2DDN1)); 1741 1742 FUNC_GROUP_DECL(USB2H1, AB21, AB20); 1743 FUNC_GROUP_DECL(USB2D1, AB21, AB20); 1744 1745 /* Note we account for GPIOY4-GPIOY7 even though they're not valid, thus 216 1746 * pins becomes 220. Four additional non-GPIO-capable pins are present for USB. 1747 */ 1748 #define ASPEED_G4_NR_PINS 224 1749 1750 /* Pins, groups and functions are sort(1):ed alphabetically for sanity */ 1751 1752 static struct pinctrl_pin_desc aspeed_g4_pins[ASPEED_G4_NR_PINS] = { 1753 ASPEED_PINCTRL_PIN(A1), 1754 ASPEED_PINCTRL_PIN(A10), 1755 ASPEED_PINCTRL_PIN(A11), 1756 ASPEED_PINCTRL_PIN(A12), 1757 ASPEED_PINCTRL_PIN(A13), 1758 ASPEED_PINCTRL_PIN(A14), 1759 ASPEED_PINCTRL_PIN(A15), 1760 ASPEED_PINCTRL_PIN(A16), 1761 ASPEED_PINCTRL_PIN(A17), 1762 ASPEED_PINCTRL_PIN(A18), 1763 ASPEED_PINCTRL_PIN(A19), 1764 ASPEED_PINCTRL_PIN(A2), 1765 ASPEED_PINCTRL_PIN(A20), 1766 ASPEED_PINCTRL_PIN(A3), 1767 ASPEED_PINCTRL_PIN(A4), 1768 ASPEED_PINCTRL_PIN(A5), 1769 ASPEED_PINCTRL_PIN(A6), 1770 ASPEED_PINCTRL_PIN(A7), 1771 ASPEED_PINCTRL_PIN(A8), 1772 ASPEED_PINCTRL_PIN(A9), 1773 ASPEED_PINCTRL_PIN(AA1), 1774 ASPEED_PINCTRL_PIN(AA2), 1775 ASPEED_PINCTRL_PIN(AA22), 1776 ASPEED_PINCTRL_PIN(AA3), 1777 ASPEED_PINCTRL_PIN(AA4), 1778 ASPEED_PINCTRL_PIN(AA5), 1779 ASPEED_PINCTRL_PIN(AA6), 1780 ASPEED_PINCTRL_PIN(AA7), 1781 ASPEED_PINCTRL_PIN(AB1), 1782 ASPEED_PINCTRL_PIN(AB2), 1783 ASPEED_PINCTRL_PIN(AB3), 1784 ASPEED_PINCTRL_PIN(AB4), 1785 ASPEED_PINCTRL_PIN(AB5), 1786 ASPEED_PINCTRL_PIN(AB6), 1787 ASPEED_PINCTRL_PIN(AB7), 1788 ASPEED_PINCTRL_PIN(AB20), 1789 ASPEED_PINCTRL_PIN(AB21), 1790 ASPEED_PINCTRL_PIN(B1), 1791 ASPEED_PINCTRL_PIN(B10), 1792 ASPEED_PINCTRL_PIN(B11), 1793 ASPEED_PINCTRL_PIN(B12), 1794 ASPEED_PINCTRL_PIN(B13), 1795 ASPEED_PINCTRL_PIN(B14), 1796 ASPEED_PINCTRL_PIN(B15), 1797 ASPEED_PINCTRL_PIN(B16), 1798 ASPEED_PINCTRL_PIN(B17), 1799 ASPEED_PINCTRL_PIN(B18), 1800 ASPEED_PINCTRL_PIN(B19), 1801 ASPEED_PINCTRL_PIN(B2), 1802 ASPEED_PINCTRL_PIN(B22), 1803 ASPEED_PINCTRL_PIN(B3), 1804 ASPEED_PINCTRL_PIN(B4), 1805 ASPEED_PINCTRL_PIN(B5), 1806 ASPEED_PINCTRL_PIN(B6), 1807 ASPEED_PINCTRL_PIN(B7), 1808 ASPEED_PINCTRL_PIN(B9), 1809 ASPEED_PINCTRL_PIN(C1), 1810 ASPEED_PINCTRL_PIN(C10), 1811 ASPEED_PINCTRL_PIN(C11), 1812 ASPEED_PINCTRL_PIN(C12), 1813 ASPEED_PINCTRL_PIN(C13), 1814 ASPEED_PINCTRL_PIN(C14), 1815 ASPEED_PINCTRL_PIN(C15), 1816 ASPEED_PINCTRL_PIN(C16), 1817 ASPEED_PINCTRL_PIN(C17), 1818 ASPEED_PINCTRL_PIN(C18), 1819 ASPEED_PINCTRL_PIN(C2), 1820 ASPEED_PINCTRL_PIN(C20), 1821 ASPEED_PINCTRL_PIN(C21), 1822 ASPEED_PINCTRL_PIN(C22), 1823 ASPEED_PINCTRL_PIN(C3), 1824 ASPEED_PINCTRL_PIN(C4), 1825 ASPEED_PINCTRL_PIN(C5), 1826 ASPEED_PINCTRL_PIN(C6), 1827 ASPEED_PINCTRL_PIN(C7), 1828 ASPEED_PINCTRL_PIN(C8), 1829 ASPEED_PINCTRL_PIN(C9), 1830 ASPEED_PINCTRL_PIN(D1), 1831 ASPEED_PINCTRL_PIN(D10), 1832 ASPEED_PINCTRL_PIN(D11), 1833 ASPEED_PINCTRL_PIN(D12), 1834 ASPEED_PINCTRL_PIN(D13), 1835 ASPEED_PINCTRL_PIN(D14), 1836 ASPEED_PINCTRL_PIN(D15), 1837 ASPEED_PINCTRL_PIN(D16), 1838 ASPEED_PINCTRL_PIN(D17), 1839 ASPEED_PINCTRL_PIN(D18), 1840 ASPEED_PINCTRL_PIN(D19), 1841 ASPEED_PINCTRL_PIN(D2), 1842 ASPEED_PINCTRL_PIN(D3), 1843 ASPEED_PINCTRL_PIN(D4), 1844 ASPEED_PINCTRL_PIN(D5), 1845 ASPEED_PINCTRL_PIN(D6), 1846 ASPEED_PINCTRL_PIN(D7), 1847 ASPEED_PINCTRL_PIN(D8), 1848 ASPEED_PINCTRL_PIN(D9), 1849 ASPEED_PINCTRL_PIN(E10), 1850 ASPEED_PINCTRL_PIN(E11), 1851 ASPEED_PINCTRL_PIN(E12), 1852 ASPEED_PINCTRL_PIN(E13), 1853 ASPEED_PINCTRL_PIN(E14), 1854 ASPEED_PINCTRL_PIN(E15), 1855 ASPEED_PINCTRL_PIN(E16), 1856 ASPEED_PINCTRL_PIN(E18), 1857 ASPEED_PINCTRL_PIN(E19), 1858 ASPEED_PINCTRL_PIN(E2), 1859 ASPEED_PINCTRL_PIN(E20), 1860 ASPEED_PINCTRL_PIN(E3), 1861 ASPEED_PINCTRL_PIN(E5), 1862 ASPEED_PINCTRL_PIN(E6), 1863 ASPEED_PINCTRL_PIN(E7), 1864 ASPEED_PINCTRL_PIN(E8), 1865 ASPEED_PINCTRL_PIN(E9), 1866 ASPEED_PINCTRL_PIN(F18), 1867 ASPEED_PINCTRL_PIN(F20), 1868 ASPEED_PINCTRL_PIN(F3), 1869 ASPEED_PINCTRL_PIN(F4), 1870 ASPEED_PINCTRL_PIN(F5), 1871 ASPEED_PINCTRL_PIN(G18), 1872 ASPEED_PINCTRL_PIN(G19), 1873 ASPEED_PINCTRL_PIN(G20), 1874 ASPEED_PINCTRL_PIN(G5), 1875 ASPEED_PINCTRL_PIN(H1), 1876 ASPEED_PINCTRL_PIN(H18), 1877 ASPEED_PINCTRL_PIN(H19), 1878 ASPEED_PINCTRL_PIN(H2), 1879 ASPEED_PINCTRL_PIN(H20), 1880 ASPEED_PINCTRL_PIN(H3), 1881 ASPEED_PINCTRL_PIN(H4), 1882 ASPEED_PINCTRL_PIN(J20), 1883 ASPEED_PINCTRL_PIN(J21), 1884 ASPEED_PINCTRL_PIN(J3), 1885 ASPEED_PINCTRL_PIN(J4), 1886 ASPEED_PINCTRL_PIN(J5), 1887 ASPEED_PINCTRL_PIN(K18), 1888 ASPEED_PINCTRL_PIN(K20), 1889 ASPEED_PINCTRL_PIN(K3), 1890 ASPEED_PINCTRL_PIN(K4), 1891 ASPEED_PINCTRL_PIN(K5), 1892 ASPEED_PINCTRL_PIN(L1), 1893 ASPEED_PINCTRL_PIN(L18), 1894 ASPEED_PINCTRL_PIN(L19), 1895 ASPEED_PINCTRL_PIN(L2), 1896 ASPEED_PINCTRL_PIN(L20), 1897 ASPEED_PINCTRL_PIN(L21), 1898 ASPEED_PINCTRL_PIN(L22), 1899 ASPEED_PINCTRL_PIN(L3), 1900 ASPEED_PINCTRL_PIN(L4), 1901 ASPEED_PINCTRL_PIN(L5), 1902 ASPEED_PINCTRL_PIN(M1), 1903 ASPEED_PINCTRL_PIN(M18), 1904 ASPEED_PINCTRL_PIN(M19), 1905 ASPEED_PINCTRL_PIN(M2), 1906 ASPEED_PINCTRL_PIN(M20), 1907 ASPEED_PINCTRL_PIN(M21), 1908 ASPEED_PINCTRL_PIN(M22), 1909 ASPEED_PINCTRL_PIN(M3), 1910 ASPEED_PINCTRL_PIN(M4), 1911 ASPEED_PINCTRL_PIN(M5), 1912 ASPEED_PINCTRL_PIN(N1), 1913 ASPEED_PINCTRL_PIN(N18), 1914 ASPEED_PINCTRL_PIN(N19), 1915 ASPEED_PINCTRL_PIN(N2), 1916 ASPEED_PINCTRL_PIN(N20), 1917 ASPEED_PINCTRL_PIN(N21), 1918 ASPEED_PINCTRL_PIN(N22), 1919 ASPEED_PINCTRL_PIN(N3), 1920 ASPEED_PINCTRL_PIN(N4), 1921 ASPEED_PINCTRL_PIN(N5), 1922 ASPEED_PINCTRL_PIN(P18), 1923 ASPEED_PINCTRL_PIN(P19), 1924 ASPEED_PINCTRL_PIN(P20), 1925 ASPEED_PINCTRL_PIN(P21), 1926 ASPEED_PINCTRL_PIN(P22), 1927 ASPEED_PINCTRL_PIN(P5), 1928 ASPEED_PINCTRL_PIN(R18), 1929 ASPEED_PINCTRL_PIN(R22), 1930 ASPEED_PINCTRL_PIN(T1), 1931 ASPEED_PINCTRL_PIN(T18), 1932 ASPEED_PINCTRL_PIN(T19), 1933 ASPEED_PINCTRL_PIN(T2), 1934 ASPEED_PINCTRL_PIN(T4), 1935 ASPEED_PINCTRL_PIN(T5), 1936 ASPEED_PINCTRL_PIN(U1), 1937 ASPEED_PINCTRL_PIN(U18), 1938 ASPEED_PINCTRL_PIN(U19), 1939 ASPEED_PINCTRL_PIN(U2), 1940 ASPEED_PINCTRL_PIN(U20), 1941 ASPEED_PINCTRL_PIN(U21), 1942 ASPEED_PINCTRL_PIN(U3), 1943 ASPEED_PINCTRL_PIN(U4), 1944 ASPEED_PINCTRL_PIN(U5), 1945 ASPEED_PINCTRL_PIN(V1), 1946 ASPEED_PINCTRL_PIN(V2), 1947 ASPEED_PINCTRL_PIN(V20), 1948 ASPEED_PINCTRL_PIN(V21), 1949 ASPEED_PINCTRL_PIN(V22), 1950 ASPEED_PINCTRL_PIN(V3), 1951 ASPEED_PINCTRL_PIN(V4), 1952 ASPEED_PINCTRL_PIN(V5), 1953 ASPEED_PINCTRL_PIN(V6), 1954 ASPEED_PINCTRL_PIN(V7), 1955 ASPEED_PINCTRL_PIN(W1), 1956 ASPEED_PINCTRL_PIN(W2), 1957 ASPEED_PINCTRL_PIN(W21), 1958 ASPEED_PINCTRL_PIN(W22), 1959 ASPEED_PINCTRL_PIN(W3), 1960 ASPEED_PINCTRL_PIN(W4), 1961 ASPEED_PINCTRL_PIN(W5), 1962 ASPEED_PINCTRL_PIN(W6), 1963 ASPEED_PINCTRL_PIN(W7), 1964 ASPEED_PINCTRL_PIN(Y1), 1965 ASPEED_PINCTRL_PIN(Y2), 1966 ASPEED_PINCTRL_PIN(Y21), 1967 ASPEED_PINCTRL_PIN(Y22), 1968 ASPEED_PINCTRL_PIN(Y3), 1969 ASPEED_PINCTRL_PIN(Y4), 1970 ASPEED_PINCTRL_PIN(Y5), 1971 ASPEED_PINCTRL_PIN(Y6), 1972 ASPEED_PINCTRL_PIN(Y7), 1973 }; 1974 1975 static const struct aspeed_pin_group aspeed_g4_groups[] = { 1976 ASPEED_PINCTRL_GROUP(ACPI), 1977 ASPEED_PINCTRL_GROUP(ADC0), 1978 ASPEED_PINCTRL_GROUP(ADC1), 1979 ASPEED_PINCTRL_GROUP(ADC10), 1980 ASPEED_PINCTRL_GROUP(ADC11), 1981 ASPEED_PINCTRL_GROUP(ADC12), 1982 ASPEED_PINCTRL_GROUP(ADC13), 1983 ASPEED_PINCTRL_GROUP(ADC14), 1984 ASPEED_PINCTRL_GROUP(ADC15), 1985 ASPEED_PINCTRL_GROUP(ADC2), 1986 ASPEED_PINCTRL_GROUP(ADC3), 1987 ASPEED_PINCTRL_GROUP(ADC4), 1988 ASPEED_PINCTRL_GROUP(ADC5), 1989 ASPEED_PINCTRL_GROUP(ADC6), 1990 ASPEED_PINCTRL_GROUP(ADC7), 1991 ASPEED_PINCTRL_GROUP(ADC8), 1992 ASPEED_PINCTRL_GROUP(ADC9), 1993 ASPEED_PINCTRL_GROUP(BMCINT), 1994 ASPEED_PINCTRL_GROUP(DDCCLK), 1995 ASPEED_PINCTRL_GROUP(DDCDAT), 1996 ASPEED_PINCTRL_GROUP(EXTRST), 1997 ASPEED_PINCTRL_GROUP(FLACK), 1998 ASPEED_PINCTRL_GROUP(FLBUSY), 1999 ASPEED_PINCTRL_GROUP(FLWP), 2000 ASPEED_PINCTRL_GROUP(GPID), 2001 ASPEED_PINCTRL_GROUP(GPID0), 2002 ASPEED_PINCTRL_GROUP(GPID2), 2003 ASPEED_PINCTRL_GROUP(GPID4), 2004 ASPEED_PINCTRL_GROUP(GPID6), 2005 ASPEED_PINCTRL_GROUP(GPIE0), 2006 ASPEED_PINCTRL_GROUP(GPIE2), 2007 ASPEED_PINCTRL_GROUP(GPIE4), 2008 ASPEED_PINCTRL_GROUP(GPIE6), 2009 ASPEED_PINCTRL_GROUP(I2C10), 2010 ASPEED_PINCTRL_GROUP(I2C11), 2011 ASPEED_PINCTRL_GROUP(I2C12), 2012 ASPEED_PINCTRL_GROUP(I2C13), 2013 ASPEED_PINCTRL_GROUP(I2C14), 2014 ASPEED_PINCTRL_GROUP(I2C3), 2015 ASPEED_PINCTRL_GROUP(I2C4), 2016 ASPEED_PINCTRL_GROUP(I2C5), 2017 ASPEED_PINCTRL_GROUP(I2C6), 2018 ASPEED_PINCTRL_GROUP(I2C7), 2019 ASPEED_PINCTRL_GROUP(I2C8), 2020 ASPEED_PINCTRL_GROUP(I2C9), 2021 ASPEED_PINCTRL_GROUP(LPCPD), 2022 ASPEED_PINCTRL_GROUP(LPCPME), 2023 ASPEED_PINCTRL_GROUP(LPCRST), 2024 ASPEED_PINCTRL_GROUP(LPCSMI), 2025 ASPEED_PINCTRL_GROUP(MAC1LINK), 2026 ASPEED_PINCTRL_GROUP(MAC2LINK), 2027 ASPEED_PINCTRL_GROUP(MDIO1), 2028 ASPEED_PINCTRL_GROUP(MDIO2), 2029 ASPEED_PINCTRL_GROUP(NCTS1), 2030 ASPEED_PINCTRL_GROUP(NCTS2), 2031 ASPEED_PINCTRL_GROUP(NCTS3), 2032 ASPEED_PINCTRL_GROUP(NCTS4), 2033 ASPEED_PINCTRL_GROUP(NDCD1), 2034 ASPEED_PINCTRL_GROUP(NDCD2), 2035 ASPEED_PINCTRL_GROUP(NDCD3), 2036 ASPEED_PINCTRL_GROUP(NDCD4), 2037 ASPEED_PINCTRL_GROUP(NDSR1), 2038 ASPEED_PINCTRL_GROUP(NDSR2), 2039 ASPEED_PINCTRL_GROUP(NDSR3), 2040 ASPEED_PINCTRL_GROUP(NDSR4), 2041 ASPEED_PINCTRL_GROUP(NDTR1), 2042 ASPEED_PINCTRL_GROUP(NDTR2), 2043 ASPEED_PINCTRL_GROUP(NDTR3), 2044 ASPEED_PINCTRL_GROUP(NDTR4), 2045 ASPEED_PINCTRL_GROUP(NDTS4), 2046 ASPEED_PINCTRL_GROUP(NRI1), 2047 ASPEED_PINCTRL_GROUP(NRI2), 2048 ASPEED_PINCTRL_GROUP(NRI3), 2049 ASPEED_PINCTRL_GROUP(NRI4), 2050 ASPEED_PINCTRL_GROUP(NRTS1), 2051 ASPEED_PINCTRL_GROUP(NRTS2), 2052 ASPEED_PINCTRL_GROUP(NRTS3), 2053 ASPEED_PINCTRL_GROUP(OSCCLK), 2054 ASPEED_PINCTRL_GROUP(PWM0), 2055 ASPEED_PINCTRL_GROUP(PWM1), 2056 ASPEED_PINCTRL_GROUP(PWM2), 2057 ASPEED_PINCTRL_GROUP(PWM3), 2058 ASPEED_PINCTRL_GROUP(PWM4), 2059 ASPEED_PINCTRL_GROUP(PWM5), 2060 ASPEED_PINCTRL_GROUP(PWM6), 2061 ASPEED_PINCTRL_GROUP(PWM7), 2062 ASPEED_PINCTRL_GROUP(RGMII1), 2063 ASPEED_PINCTRL_GROUP(RGMII2), 2064 ASPEED_PINCTRL_GROUP(RMII1), 2065 ASPEED_PINCTRL_GROUP(RMII2), 2066 ASPEED_PINCTRL_GROUP(ROM16), 2067 ASPEED_PINCTRL_GROUP(ROM8), 2068 ASPEED_PINCTRL_GROUP(ROMCS1), 2069 ASPEED_PINCTRL_GROUP(ROMCS2), 2070 ASPEED_PINCTRL_GROUP(ROMCS3), 2071 ASPEED_PINCTRL_GROUP(ROMCS4), 2072 ASPEED_PINCTRL_GROUP(RXD1), 2073 ASPEED_PINCTRL_GROUP(RXD2), 2074 ASPEED_PINCTRL_GROUP(RXD3), 2075 ASPEED_PINCTRL_GROUP(RXD4), 2076 ASPEED_PINCTRL_GROUP(SALT1), 2077 ASPEED_PINCTRL_GROUP(SALT2), 2078 ASPEED_PINCTRL_GROUP(SALT3), 2079 ASPEED_PINCTRL_GROUP(SALT4), 2080 ASPEED_PINCTRL_GROUP(SD1), 2081 ASPEED_PINCTRL_GROUP(SD2), 2082 ASPEED_PINCTRL_GROUP(SGPMCK), 2083 ASPEED_PINCTRL_GROUP(SGPMI), 2084 ASPEED_PINCTRL_GROUP(SGPMLD), 2085 ASPEED_PINCTRL_GROUP(SGPMO), 2086 ASPEED_PINCTRL_GROUP(SGPSCK), 2087 ASPEED_PINCTRL_GROUP(SGPSI0), 2088 ASPEED_PINCTRL_GROUP(SGPSI1), 2089 ASPEED_PINCTRL_GROUP(SGPSLD), 2090 ASPEED_PINCTRL_GROUP(SIOONCTRL), 2091 ASPEED_PINCTRL_GROUP(SIOPBI), 2092 ASPEED_PINCTRL_GROUP(SIOPBO), 2093 ASPEED_PINCTRL_GROUP(SIOPWREQ), 2094 ASPEED_PINCTRL_GROUP(SIOPWRGD), 2095 ASPEED_PINCTRL_GROUP(SIOS3), 2096 ASPEED_PINCTRL_GROUP(SIOS5), 2097 ASPEED_PINCTRL_GROUP(SIOSCI), 2098 ASPEED_PINCTRL_GROUP(SPI1), 2099 ASPEED_PINCTRL_GROUP(SPI1DEBUG), 2100 ASPEED_PINCTRL_GROUP(SPI1PASSTHRU), 2101 ASPEED_PINCTRL_GROUP(SPICS1), 2102 ASPEED_PINCTRL_GROUP(TIMER3), 2103 ASPEED_PINCTRL_GROUP(TIMER4), 2104 ASPEED_PINCTRL_GROUP(TIMER5), 2105 ASPEED_PINCTRL_GROUP(TIMER6), 2106 ASPEED_PINCTRL_GROUP(TIMER7), 2107 ASPEED_PINCTRL_GROUP(TIMER8), 2108 ASPEED_PINCTRL_GROUP(TXD1), 2109 ASPEED_PINCTRL_GROUP(TXD2), 2110 ASPEED_PINCTRL_GROUP(TXD3), 2111 ASPEED_PINCTRL_GROUP(TXD4), 2112 ASPEED_PINCTRL_GROUP(UART6), 2113 ASPEED_PINCTRL_GROUP(USB11D1), 2114 ASPEED_PINCTRL_GROUP(USB11H2), 2115 ASPEED_PINCTRL_GROUP(USB2D1), 2116 ASPEED_PINCTRL_GROUP(USB2H1), 2117 ASPEED_PINCTRL_GROUP(USBCKI), 2118 ASPEED_PINCTRL_GROUP(VGABIOS_ROM), 2119 ASPEED_PINCTRL_GROUP(VGAHS), 2120 ASPEED_PINCTRL_GROUP(VGAVS), 2121 ASPEED_PINCTRL_GROUP(VPI18), 2122 ASPEED_PINCTRL_GROUP(VPI24), 2123 ASPEED_PINCTRL_GROUP(VPI30), 2124 ASPEED_PINCTRL_GROUP(VPO12), 2125 ASPEED_PINCTRL_GROUP(VPO24), 2126 ASPEED_PINCTRL_GROUP(WDTRST1), 2127 ASPEED_PINCTRL_GROUP(WDTRST2), 2128 }; 2129 2130 static const struct aspeed_pin_function aspeed_g4_functions[] = { 2131 ASPEED_PINCTRL_FUNC(ACPI), 2132 ASPEED_PINCTRL_FUNC(ADC0), 2133 ASPEED_PINCTRL_FUNC(ADC1), 2134 ASPEED_PINCTRL_FUNC(ADC10), 2135 ASPEED_PINCTRL_FUNC(ADC11), 2136 ASPEED_PINCTRL_FUNC(ADC12), 2137 ASPEED_PINCTRL_FUNC(ADC13), 2138 ASPEED_PINCTRL_FUNC(ADC14), 2139 ASPEED_PINCTRL_FUNC(ADC15), 2140 ASPEED_PINCTRL_FUNC(ADC2), 2141 ASPEED_PINCTRL_FUNC(ADC3), 2142 ASPEED_PINCTRL_FUNC(ADC4), 2143 ASPEED_PINCTRL_FUNC(ADC5), 2144 ASPEED_PINCTRL_FUNC(ADC6), 2145 ASPEED_PINCTRL_FUNC(ADC7), 2146 ASPEED_PINCTRL_FUNC(ADC8), 2147 ASPEED_PINCTRL_FUNC(ADC9), 2148 ASPEED_PINCTRL_FUNC(BMCINT), 2149 ASPEED_PINCTRL_FUNC(DDCCLK), 2150 ASPEED_PINCTRL_FUNC(DDCDAT), 2151 ASPEED_PINCTRL_FUNC(EXTRST), 2152 ASPEED_PINCTRL_FUNC(FLACK), 2153 ASPEED_PINCTRL_FUNC(FLBUSY), 2154 ASPEED_PINCTRL_FUNC(FLWP), 2155 ASPEED_PINCTRL_FUNC(GPID), 2156 ASPEED_PINCTRL_FUNC(GPID0), 2157 ASPEED_PINCTRL_FUNC(GPID2), 2158 ASPEED_PINCTRL_FUNC(GPID4), 2159 ASPEED_PINCTRL_FUNC(GPID6), 2160 ASPEED_PINCTRL_FUNC(GPIE0), 2161 ASPEED_PINCTRL_FUNC(GPIE2), 2162 ASPEED_PINCTRL_FUNC(GPIE4), 2163 ASPEED_PINCTRL_FUNC(GPIE6), 2164 ASPEED_PINCTRL_FUNC(I2C10), 2165 ASPEED_PINCTRL_FUNC(I2C11), 2166 ASPEED_PINCTRL_FUNC(I2C12), 2167 ASPEED_PINCTRL_FUNC(I2C13), 2168 ASPEED_PINCTRL_FUNC(I2C14), 2169 ASPEED_PINCTRL_FUNC(I2C3), 2170 ASPEED_PINCTRL_FUNC(I2C4), 2171 ASPEED_PINCTRL_FUNC(I2C5), 2172 ASPEED_PINCTRL_FUNC(I2C6), 2173 ASPEED_PINCTRL_FUNC(I2C7), 2174 ASPEED_PINCTRL_FUNC(I2C8), 2175 ASPEED_PINCTRL_FUNC(I2C9), 2176 ASPEED_PINCTRL_FUNC(LPCPD), 2177 ASPEED_PINCTRL_FUNC(LPCPME), 2178 ASPEED_PINCTRL_FUNC(LPCRST), 2179 ASPEED_PINCTRL_FUNC(LPCSMI), 2180 ASPEED_PINCTRL_FUNC(MAC1LINK), 2181 ASPEED_PINCTRL_FUNC(MAC2LINK), 2182 ASPEED_PINCTRL_FUNC(MDIO1), 2183 ASPEED_PINCTRL_FUNC(MDIO2), 2184 ASPEED_PINCTRL_FUNC(NCTS1), 2185 ASPEED_PINCTRL_FUNC(NCTS2), 2186 ASPEED_PINCTRL_FUNC(NCTS3), 2187 ASPEED_PINCTRL_FUNC(NCTS4), 2188 ASPEED_PINCTRL_FUNC(NDCD1), 2189 ASPEED_PINCTRL_FUNC(NDCD2), 2190 ASPEED_PINCTRL_FUNC(NDCD3), 2191 ASPEED_PINCTRL_FUNC(NDCD4), 2192 ASPEED_PINCTRL_FUNC(NDSR1), 2193 ASPEED_PINCTRL_FUNC(NDSR2), 2194 ASPEED_PINCTRL_FUNC(NDSR3), 2195 ASPEED_PINCTRL_FUNC(NDSR4), 2196 ASPEED_PINCTRL_FUNC(NDTR1), 2197 ASPEED_PINCTRL_FUNC(NDTR2), 2198 ASPEED_PINCTRL_FUNC(NDTR3), 2199 ASPEED_PINCTRL_FUNC(NDTR4), 2200 ASPEED_PINCTRL_FUNC(NDTS4), 2201 ASPEED_PINCTRL_FUNC(NRI1), 2202 ASPEED_PINCTRL_FUNC(NRI2), 2203 ASPEED_PINCTRL_FUNC(NRI3), 2204 ASPEED_PINCTRL_FUNC(NRI4), 2205 ASPEED_PINCTRL_FUNC(NRTS1), 2206 ASPEED_PINCTRL_FUNC(NRTS2), 2207 ASPEED_PINCTRL_FUNC(NRTS3), 2208 ASPEED_PINCTRL_FUNC(OSCCLK), 2209 ASPEED_PINCTRL_FUNC(PWM0), 2210 ASPEED_PINCTRL_FUNC(PWM1), 2211 ASPEED_PINCTRL_FUNC(PWM2), 2212 ASPEED_PINCTRL_FUNC(PWM3), 2213 ASPEED_PINCTRL_FUNC(PWM4), 2214 ASPEED_PINCTRL_FUNC(PWM5), 2215 ASPEED_PINCTRL_FUNC(PWM6), 2216 ASPEED_PINCTRL_FUNC(PWM7), 2217 ASPEED_PINCTRL_FUNC(RGMII1), 2218 ASPEED_PINCTRL_FUNC(RGMII2), 2219 ASPEED_PINCTRL_FUNC(RMII1), 2220 ASPEED_PINCTRL_FUNC(RMII2), 2221 ASPEED_PINCTRL_FUNC(ROM16), 2222 ASPEED_PINCTRL_FUNC(ROM8), 2223 ASPEED_PINCTRL_FUNC(ROMCS1), 2224 ASPEED_PINCTRL_FUNC(ROMCS2), 2225 ASPEED_PINCTRL_FUNC(ROMCS3), 2226 ASPEED_PINCTRL_FUNC(ROMCS4), 2227 ASPEED_PINCTRL_FUNC(RXD1), 2228 ASPEED_PINCTRL_FUNC(RXD2), 2229 ASPEED_PINCTRL_FUNC(RXD3), 2230 ASPEED_PINCTRL_FUNC(RXD4), 2231 ASPEED_PINCTRL_FUNC(SALT1), 2232 ASPEED_PINCTRL_FUNC(SALT2), 2233 ASPEED_PINCTRL_FUNC(SALT3), 2234 ASPEED_PINCTRL_FUNC(SALT4), 2235 ASPEED_PINCTRL_FUNC(SD1), 2236 ASPEED_PINCTRL_FUNC(SD2), 2237 ASPEED_PINCTRL_FUNC(SGPMCK), 2238 ASPEED_PINCTRL_FUNC(SGPMI), 2239 ASPEED_PINCTRL_FUNC(SGPMLD), 2240 ASPEED_PINCTRL_FUNC(SGPMO), 2241 ASPEED_PINCTRL_FUNC(SGPSCK), 2242 ASPEED_PINCTRL_FUNC(SGPSI0), 2243 ASPEED_PINCTRL_FUNC(SGPSI1), 2244 ASPEED_PINCTRL_FUNC(SGPSLD), 2245 ASPEED_PINCTRL_FUNC(SIOONCTRL), 2246 ASPEED_PINCTRL_FUNC(SIOPBI), 2247 ASPEED_PINCTRL_FUNC(SIOPBO), 2248 ASPEED_PINCTRL_FUNC(SIOPWREQ), 2249 ASPEED_PINCTRL_FUNC(SIOPWRGD), 2250 ASPEED_PINCTRL_FUNC(SIOS3), 2251 ASPEED_PINCTRL_FUNC(SIOS5), 2252 ASPEED_PINCTRL_FUNC(SIOSCI), 2253 ASPEED_PINCTRL_FUNC(SPI1), 2254 ASPEED_PINCTRL_FUNC(SPI1DEBUG), 2255 ASPEED_PINCTRL_FUNC(SPI1PASSTHRU), 2256 ASPEED_PINCTRL_FUNC(SPICS1), 2257 ASPEED_PINCTRL_FUNC(TIMER3), 2258 ASPEED_PINCTRL_FUNC(TIMER4), 2259 ASPEED_PINCTRL_FUNC(TIMER5), 2260 ASPEED_PINCTRL_FUNC(TIMER6), 2261 ASPEED_PINCTRL_FUNC(TIMER7), 2262 ASPEED_PINCTRL_FUNC(TIMER8), 2263 ASPEED_PINCTRL_FUNC(TXD1), 2264 ASPEED_PINCTRL_FUNC(TXD2), 2265 ASPEED_PINCTRL_FUNC(TXD3), 2266 ASPEED_PINCTRL_FUNC(TXD4), 2267 ASPEED_PINCTRL_FUNC(UART6), 2268 ASPEED_PINCTRL_FUNC(USB11D1), 2269 ASPEED_PINCTRL_FUNC(USB11H2), 2270 ASPEED_PINCTRL_FUNC(USB2D1), 2271 ASPEED_PINCTRL_FUNC(USB2H1), 2272 ASPEED_PINCTRL_FUNC(USBCKI), 2273 ASPEED_PINCTRL_FUNC(VGABIOS_ROM), 2274 ASPEED_PINCTRL_FUNC(VGAHS), 2275 ASPEED_PINCTRL_FUNC(VGAVS), 2276 ASPEED_PINCTRL_FUNC(VPI18), 2277 ASPEED_PINCTRL_FUNC(VPI24), 2278 ASPEED_PINCTRL_FUNC(VPI30), 2279 ASPEED_PINCTRL_FUNC(VPO12), 2280 ASPEED_PINCTRL_FUNC(VPO24), 2281 ASPEED_PINCTRL_FUNC(WDTRST1), 2282 ASPEED_PINCTRL_FUNC(WDTRST2), 2283 }; 2284 2285 static const struct aspeed_pin_config aspeed_g4_configs[] = { 2286 /* GPIO banks ranges [A, B], [D, J], [M, R] */ 2287 { PIN_CONFIG_BIAS_PULL_DOWN, { D6, D5 }, SCU8C, 16 }, 2288 { PIN_CONFIG_BIAS_DISABLE, { D6, D5 }, SCU8C, 16 }, 2289 { PIN_CONFIG_BIAS_PULL_DOWN, { J21, E18 }, SCU8C, 17 }, 2290 { PIN_CONFIG_BIAS_DISABLE, { J21, E18 }, SCU8C, 17 }, 2291 { PIN_CONFIG_BIAS_PULL_DOWN, { A18, E15 }, SCU8C, 19 }, 2292 { PIN_CONFIG_BIAS_DISABLE, { A18, E15 }, SCU8C, 19 }, 2293 { PIN_CONFIG_BIAS_PULL_DOWN, { D15, B14 }, SCU8C, 20 }, 2294 { PIN_CONFIG_BIAS_DISABLE, { D15, B14 }, SCU8C, 20 }, 2295 { PIN_CONFIG_BIAS_PULL_DOWN, { D18, C17 }, SCU8C, 21 }, 2296 { PIN_CONFIG_BIAS_DISABLE, { D18, C17 }, SCU8C, 21 }, 2297 { PIN_CONFIG_BIAS_PULL_DOWN, { A14, U18 }, SCU8C, 22 }, 2298 { PIN_CONFIG_BIAS_DISABLE, { A14, U18 }, SCU8C, 22 }, 2299 { PIN_CONFIG_BIAS_PULL_DOWN, { A8, E7 }, SCU8C, 23 }, 2300 { PIN_CONFIG_BIAS_DISABLE, { A8, E7 }, SCU8C, 23 }, 2301 { PIN_CONFIG_BIAS_PULL_DOWN, { C22, E20 }, SCU8C, 24 }, 2302 { PIN_CONFIG_BIAS_DISABLE, { C22, E20 }, SCU8C, 24 }, 2303 { PIN_CONFIG_BIAS_PULL_DOWN, { J5, T1 }, SCU8C, 25 }, 2304 { PIN_CONFIG_BIAS_DISABLE, { J5, T1 }, SCU8C, 25 }, 2305 { PIN_CONFIG_BIAS_PULL_DOWN, { U1, U5 }, SCU8C, 26 }, 2306 { PIN_CONFIG_BIAS_DISABLE, { U1, U5 }, SCU8C, 26 }, 2307 { PIN_CONFIG_BIAS_PULL_DOWN, { V3, V5 }, SCU8C, 27 }, 2308 { PIN_CONFIG_BIAS_DISABLE, { V3, V5 }, SCU8C, 27 }, 2309 { PIN_CONFIG_BIAS_PULL_DOWN, { W4, AB2 }, SCU8C, 28 }, 2310 { PIN_CONFIG_BIAS_DISABLE, { W4, AB2 }, SCU8C, 28 }, 2311 { PIN_CONFIG_BIAS_PULL_DOWN, { V6, V7 }, SCU8C, 29 }, 2312 { PIN_CONFIG_BIAS_DISABLE, { V6, V7 }, SCU8C, 29 }, 2313 { PIN_CONFIG_BIAS_PULL_DOWN, { Y6, AB7 }, SCU8C, 30 }, 2314 { PIN_CONFIG_BIAS_DISABLE, { Y6, AB7 }, SCU8C, 30 }, 2315 { PIN_CONFIG_BIAS_PULL_DOWN, { V20, A5 }, SCU8C, 31 }, 2316 { PIN_CONFIG_BIAS_DISABLE, { V20, A5 }, SCU8C, 31 }, 2317 2318 /* GPIOs T[0-5] (RGMII1 Tx pins) */ 2319 { PIN_CONFIG_DRIVE_STRENGTH, { A12, A13 }, SCU90, 9 }, 2320 { PIN_CONFIG_BIAS_PULL_DOWN, { A12, A13 }, SCU90, 12 }, 2321 { PIN_CONFIG_BIAS_DISABLE, { A12, A13 }, SCU90, 12 }, 2322 2323 /* GPIOs T[6-7], U[0-3] (RGMII2 TX pins) */ 2324 { PIN_CONFIG_DRIVE_STRENGTH, { D9, D10 }, SCU90, 11 }, 2325 { PIN_CONFIG_BIAS_PULL_DOWN, { D9, D10 }, SCU90, 14 }, 2326 { PIN_CONFIG_BIAS_DISABLE, { D9, D10 }, SCU90, 14 }, 2327 2328 /* GPIOs U[4-7], V[0-1] (RGMII1 Rx pins) */ 2329 { PIN_CONFIG_BIAS_PULL_DOWN, { E11, E10 }, SCU90, 13 }, 2330 { PIN_CONFIG_BIAS_DISABLE, { E11, E10 }, SCU90, 13 }, 2331 2332 /* GPIOs V[2-7] (RGMII2 Rx pins) */ 2333 { PIN_CONFIG_BIAS_PULL_DOWN, { C9, C8 }, SCU90, 15 }, 2334 { PIN_CONFIG_BIAS_DISABLE, { C9, C8 }, SCU90, 15 }, 2335 2336 /* ADC pull-downs (SCUA8[19:4]) */ 2337 { PIN_CONFIG_BIAS_PULL_DOWN, { L5, L5 }, SCUA8, 4 }, 2338 { PIN_CONFIG_BIAS_DISABLE, { L5, L5 }, SCUA8, 4 }, 2339 { PIN_CONFIG_BIAS_PULL_DOWN, { L4, L4 }, SCUA8, 5 }, 2340 { PIN_CONFIG_BIAS_DISABLE, { L4, L4 }, SCUA8, 5 }, 2341 { PIN_CONFIG_BIAS_PULL_DOWN, { L3, L3 }, SCUA8, 6 }, 2342 { PIN_CONFIG_BIAS_DISABLE, { L3, L3 }, SCUA8, 6 }, 2343 { PIN_CONFIG_BIAS_PULL_DOWN, { L2, L2 }, SCUA8, 7 }, 2344 { PIN_CONFIG_BIAS_DISABLE, { L2, L2 }, SCUA8, 7 }, 2345 { PIN_CONFIG_BIAS_PULL_DOWN, { L1, L1 }, SCUA8, 8 }, 2346 { PIN_CONFIG_BIAS_DISABLE, { L1, L1 }, SCUA8, 8 }, 2347 { PIN_CONFIG_BIAS_PULL_DOWN, { M5, M5 }, SCUA8, 9 }, 2348 { PIN_CONFIG_BIAS_DISABLE, { M5, M5 }, SCUA8, 9 }, 2349 { PIN_CONFIG_BIAS_PULL_DOWN, { M4, M4 }, SCUA8, 10 }, 2350 { PIN_CONFIG_BIAS_DISABLE, { M4, M4 }, SCUA8, 10 }, 2351 { PIN_CONFIG_BIAS_PULL_DOWN, { M3, M3 }, SCUA8, 11 }, 2352 { PIN_CONFIG_BIAS_DISABLE, { M3, M3 }, SCUA8, 11 }, 2353 { PIN_CONFIG_BIAS_PULL_DOWN, { M2, M2 }, SCUA8, 12 }, 2354 { PIN_CONFIG_BIAS_DISABLE, { M2, M2 }, SCUA8, 12 }, 2355 { PIN_CONFIG_BIAS_PULL_DOWN, { M1, M1 }, SCUA8, 13 }, 2356 { PIN_CONFIG_BIAS_DISABLE, { M1, M1 }, SCUA8, 13 }, 2357 { PIN_CONFIG_BIAS_PULL_DOWN, { N5, N5 }, SCUA8, 14 }, 2358 { PIN_CONFIG_BIAS_DISABLE, { N5, N5 }, SCUA8, 14 }, 2359 { PIN_CONFIG_BIAS_PULL_DOWN, { N4, N4 }, SCUA8, 15 }, 2360 { PIN_CONFIG_BIAS_DISABLE, { N4, N4 }, SCUA8, 15 }, 2361 { PIN_CONFIG_BIAS_PULL_DOWN, { N3, N3 }, SCUA8, 16 }, 2362 { PIN_CONFIG_BIAS_DISABLE, { N3, N3 }, SCUA8, 16 }, 2363 { PIN_CONFIG_BIAS_PULL_DOWN, { N2, N2 }, SCUA8, 17 }, 2364 { PIN_CONFIG_BIAS_DISABLE, { N2, N2 }, SCUA8, 17 }, 2365 { PIN_CONFIG_BIAS_PULL_DOWN, { N1, N1 }, SCUA8, 18 }, 2366 { PIN_CONFIG_BIAS_DISABLE, { N1, N1 }, SCUA8, 18 }, 2367 { PIN_CONFIG_BIAS_PULL_DOWN, { P5, P5 }, SCUA8, 19 }, 2368 { PIN_CONFIG_BIAS_DISABLE, { P5, P5 }, SCUA8, 19 }, 2369 2370 /* 2371 * Debounce settings for GPIOs D and E passthrough mode are in 2372 * SCUA8[27:20] and so are managed by pinctrl. Normal GPIO debounce for 2373 * banks D and E is handled by the GPIO driver - GPIO passthrough is 2374 * treated like any other non-GPIO mux function. There is a catch 2375 * however, in that the debounce period is configured in the GPIO 2376 * controller. Due to this tangle between GPIO and pinctrl we don't yet 2377 * fully support pass-through debounce. 2378 */ 2379 { PIN_CONFIG_INPUT_DEBOUNCE, { A18, D16 }, SCUA8, 20 }, 2380 { PIN_CONFIG_INPUT_DEBOUNCE, { B17, A17 }, SCUA8, 21 }, 2381 { PIN_CONFIG_INPUT_DEBOUNCE, { C16, B16 }, SCUA8, 22 }, 2382 { PIN_CONFIG_INPUT_DEBOUNCE, { A16, E15 }, SCUA8, 23 }, 2383 { PIN_CONFIG_INPUT_DEBOUNCE, { D15, C15 }, SCUA8, 24 }, 2384 { PIN_CONFIG_INPUT_DEBOUNCE, { B15, A15 }, SCUA8, 25 }, 2385 { PIN_CONFIG_INPUT_DEBOUNCE, { E14, D14 }, SCUA8, 26 }, 2386 { PIN_CONFIG_INPUT_DEBOUNCE, { C14, B14 }, SCUA8, 27 }, 2387 }; 2388 2389 static struct aspeed_pinctrl_data aspeed_g4_pinctrl_data = { 2390 .pins = aspeed_g4_pins, 2391 .npins = ARRAY_SIZE(aspeed_g4_pins), 2392 .groups = aspeed_g4_groups, 2393 .ngroups = ARRAY_SIZE(aspeed_g4_groups), 2394 .functions = aspeed_g4_functions, 2395 .nfunctions = ARRAY_SIZE(aspeed_g4_functions), 2396 .configs = aspeed_g4_configs, 2397 .nconfigs = ARRAY_SIZE(aspeed_g4_configs), 2398 }; 2399 2400 static const struct pinmux_ops aspeed_g4_pinmux_ops = { 2401 .get_functions_count = aspeed_pinmux_get_fn_count, 2402 .get_function_name = aspeed_pinmux_get_fn_name, 2403 .get_function_groups = aspeed_pinmux_get_fn_groups, 2404 .set_mux = aspeed_pinmux_set_mux, 2405 .gpio_request_enable = aspeed_gpio_request_enable, 2406 .strict = true, 2407 }; 2408 2409 static const struct pinctrl_ops aspeed_g4_pinctrl_ops = { 2410 .get_groups_count = aspeed_pinctrl_get_groups_count, 2411 .get_group_name = aspeed_pinctrl_get_group_name, 2412 .get_group_pins = aspeed_pinctrl_get_group_pins, 2413 .pin_dbg_show = aspeed_pinctrl_pin_dbg_show, 2414 .dt_node_to_map = pinconf_generic_dt_node_to_map_all, 2415 .dt_free_map = pinctrl_utils_free_map, 2416 }; 2417 2418 static const struct pinconf_ops aspeed_g4_conf_ops = { 2419 .is_generic = true, 2420 .pin_config_get = aspeed_pin_config_get, 2421 .pin_config_set = aspeed_pin_config_set, 2422 .pin_config_group_get = aspeed_pin_config_group_get, 2423 .pin_config_group_set = aspeed_pin_config_group_set, 2424 }; 2425 2426 static struct pinctrl_desc aspeed_g4_pinctrl_desc = { 2427 .name = "aspeed-g4-pinctrl", 2428 .pins = aspeed_g4_pins, 2429 .npins = ARRAY_SIZE(aspeed_g4_pins), 2430 .pctlops = &aspeed_g4_pinctrl_ops, 2431 .pmxops = &aspeed_g4_pinmux_ops, 2432 .confops = &aspeed_g4_conf_ops, 2433 }; 2434 2435 static int aspeed_g4_pinctrl_probe(struct platform_device *pdev) 2436 { 2437 int i; 2438 2439 for (i = 0; i < ARRAY_SIZE(aspeed_g4_pins); i++) 2440 aspeed_g4_pins[i].number = i; 2441 2442 return aspeed_pinctrl_probe(pdev, &aspeed_g4_pinctrl_desc, 2443 &aspeed_g4_pinctrl_data); 2444 } 2445 2446 static const struct of_device_id aspeed_g4_pinctrl_of_match[] = { 2447 { .compatible = "aspeed,ast2400-pinctrl", }, 2448 { .compatible = "aspeed,g4-pinctrl", }, 2449 { }, 2450 }; 2451 2452 static struct platform_driver aspeed_g4_pinctrl_driver = { 2453 .probe = aspeed_g4_pinctrl_probe, 2454 .driver = { 2455 .name = "aspeed-g4-pinctrl", 2456 .of_match_table = aspeed_g4_pinctrl_of_match, 2457 }, 2458 }; 2459 2460 static int aspeed_g4_pinctrl_init(void) 2461 { 2462 return platform_driver_register(&aspeed_g4_pinctrl_driver); 2463 } 2464 2465 arch_initcall(aspeed_g4_pinctrl_init); 2466