1 /* 2 * Copyright (C) 2016 IBM Corp. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 #include <linux/bitops.h> 10 #include <linux/init.h> 11 #include <linux/io.h> 12 #include <linux/kernel.h> 13 #include <linux/mutex.h> 14 #include <linux/of.h> 15 #include <linux/platform_device.h> 16 #include <linux/pinctrl/pinctrl.h> 17 #include <linux/pinctrl/pinmux.h> 18 #include <linux/pinctrl/pinconf.h> 19 #include <linux/pinctrl/pinconf-generic.h> 20 #include <linux/string.h> 21 #include <linux/types.h> 22 23 #include "../core.h" 24 #include "../pinctrl-utils.h" 25 #include "pinctrl-aspeed.h" 26 27 /* 28 * Uses undefined macros for symbol naming and references, eg GPIOA0, MAC1LINK, 29 * TIMER3 etc. 30 * 31 * Pins are defined in GPIO bank order: 32 * 33 * GPIOA0: 0 34 * ... 35 * GPIOA7: 7 36 * GPIOB0: 8 37 * ... 38 * GPIOZ7: 207 39 * GPIOAA0: 208 40 * ... 41 * GPIOAB3: 219 42 * 43 * Not all pins have their signals defined (yet). 44 */ 45 46 #define D6 0 47 SSSF_PIN_DECL(D6, GPIOA0, MAC1LINK, SIG_DESC_SET(SCU80, 0)); 48 49 #define B5 1 50 SSSF_PIN_DECL(B5, GPIOA1, MAC2LINK, SIG_DESC_SET(SCU80, 1)); 51 52 #define A4 2 53 SSSF_PIN_DECL(A4, GPIOA2, TIMER3, SIG_DESC_SET(SCU80, 2)); 54 55 #define E6 3 56 SSSF_PIN_DECL(E6, GPIOA3, TIMER4, SIG_DESC_SET(SCU80, 3)); 57 58 #define I2C9_DESC SIG_DESC_SET(SCU90, 22) 59 60 #define C5 4 61 SIG_EXPR_LIST_DECL_SINGLE(SCL9, I2C9, I2C9_DESC); 62 SIG_EXPR_LIST_DECL_SINGLE(TIMER5, TIMER5, SIG_DESC_SET(SCU80, 4)); 63 MS_PIN_DECL(C5, GPIOA4, SCL9, TIMER5); 64 65 FUNC_GROUP_DECL(TIMER5, C5); 66 67 #define B4 5 68 SIG_EXPR_LIST_DECL_SINGLE(SDA9, I2C9, I2C9_DESC); 69 SIG_EXPR_LIST_DECL_SINGLE(TIMER6, TIMER6, SIG_DESC_SET(SCU80, 5)); 70 MS_PIN_DECL(B4, GPIOA5, SDA9, TIMER6); 71 72 FUNC_GROUP_DECL(TIMER6, B4); 73 FUNC_GROUP_DECL(I2C9, C5, B4); 74 75 #define MDIO2_DESC SIG_DESC_SET(SCU90, 2) 76 77 #define A3 6 78 SIG_EXPR_LIST_DECL_SINGLE(MDC2, MDIO2, MDIO2_DESC); 79 SIG_EXPR_LIST_DECL_SINGLE(TIMER7, TIMER7, SIG_DESC_SET(SCU80, 6)); 80 MS_PIN_DECL(A3, GPIOA6, MDC2, TIMER7); 81 82 FUNC_GROUP_DECL(TIMER7, A3); 83 84 #define D5 7 85 SIG_EXPR_LIST_DECL_SINGLE(MDIO2, MDIO2, MDIO2_DESC); 86 SIG_EXPR_LIST_DECL_SINGLE(TIMER8, TIMER8, SIG_DESC_SET(SCU80, 7)); 87 MS_PIN_DECL(D5, GPIOA7, MDIO2, TIMER8); 88 89 FUNC_GROUP_DECL(TIMER8, D5); 90 FUNC_GROUP_DECL(MDIO2, A3, D5); 91 92 #define J21 8 93 SSSF_PIN_DECL(J21, GPIOB0, SALT1, SIG_DESC_SET(SCU80, 8)); 94 95 #define J20 9 96 SSSF_PIN_DECL(J20, GPIOB1, SALT2, SIG_DESC_SET(SCU80, 9)); 97 98 #define H18 10 99 SSSF_PIN_DECL(H18, GPIOB2, SALT3, SIG_DESC_SET(SCU80, 10)); 100 101 #define F18 11 102 SSSF_PIN_DECL(F18, GPIOB3, SALT4, SIG_DESC_SET(SCU80, 11)); 103 104 #define E19 12 105 SIG_EXPR_DECL(LPCRST, LPCRST, SIG_DESC_SET(SCU80, 12)); 106 SIG_EXPR_DECL(LPCRST, LPCRSTS, SIG_DESC_SET(HW_STRAP1, 14)); 107 SIG_EXPR_LIST_DECL_DUAL(LPCRST, LPCRST, LPCRSTS); 108 SS_PIN_DECL(E19, GPIOB4, LPCRST); 109 110 FUNC_GROUP_DECL(LPCRST, E19); 111 112 #define H19 13 113 #define H19_DESC SIG_DESC_SET(SCU80, 13) 114 SIG_EXPR_LIST_DECL_SINGLE(LPCPD, LPCPD, H19_DESC); 115 SIG_EXPR_LIST_DECL_SINGLE(LPCSMI, LPCSMI, H19_DESC); 116 MS_PIN_DECL(H19, GPIOB5, LPCPD, LPCSMI); 117 118 FUNC_GROUP_DECL(LPCPD, H19); 119 FUNC_GROUP_DECL(LPCSMI, H19); 120 121 #define H20 14 122 SSSF_PIN_DECL(H20, GPIOB6, LPCPME, SIG_DESC_SET(SCU80, 14)); 123 124 #define E18 15 125 SIG_EXPR_LIST_DECL_SINGLE(EXTRST, EXTRST, 126 SIG_DESC_SET(SCU80, 15), 127 SIG_DESC_BIT(SCU90, 31, 0), 128 SIG_DESC_SET(SCU3C, 3)); 129 SIG_EXPR_LIST_DECL_SINGLE(SPICS1, SPICS1, 130 SIG_DESC_SET(SCU80, 15), 131 SIG_DESC_SET(SCU90, 31)); 132 MS_PIN_DECL(E18, GPIOB7, EXTRST, SPICS1); 133 134 FUNC_GROUP_DECL(EXTRST, E18); 135 FUNC_GROUP_DECL(SPICS1, E18); 136 137 #define SD1_DESC SIG_DESC_SET(SCU90, 0) 138 #define I2C10_DESC SIG_DESC_SET(SCU90, 23) 139 140 #define C4 16 141 SIG_EXPR_LIST_DECL_SINGLE(SD1CLK, SD1, SD1_DESC); 142 SIG_EXPR_LIST_DECL_SINGLE(SCL10, I2C10, I2C10_DESC); 143 MS_PIN_DECL(C4, GPIOC0, SD1CLK, SCL10); 144 145 #define B3 17 146 SIG_EXPR_LIST_DECL_SINGLE(SD1CMD, SD1, SD1_DESC); 147 SIG_EXPR_LIST_DECL_SINGLE(SDA10, I2C10, I2C10_DESC); 148 MS_PIN_DECL(B3, GPIOC1, SD1CMD, SDA10); 149 150 FUNC_GROUP_DECL(I2C10, C4, B3); 151 152 #define I2C11_DESC SIG_DESC_SET(SCU90, 24) 153 154 #define A2 18 155 SIG_EXPR_LIST_DECL_SINGLE(SD1DAT0, SD1, SD1_DESC); 156 SIG_EXPR_LIST_DECL_SINGLE(SCL11, I2C11, I2C11_DESC); 157 MS_PIN_DECL(A2, GPIOC2, SD1DAT0, SCL11); 158 159 #define E5 19 160 SIG_EXPR_LIST_DECL_SINGLE(SD1DAT1, SD1, SD1_DESC); 161 SIG_EXPR_LIST_DECL_SINGLE(SDA11, I2C11, I2C11_DESC); 162 MS_PIN_DECL(E5, GPIOC3, SD1DAT1, SDA11); 163 164 FUNC_GROUP_DECL(I2C11, A2, E5); 165 166 #define I2C12_DESC SIG_DESC_SET(SCU90, 25) 167 168 #define D4 20 169 SIG_EXPR_LIST_DECL_SINGLE(SD1DAT2, SD1, SD1_DESC); 170 SIG_EXPR_LIST_DECL_SINGLE(SCL12, I2C12, I2C12_DESC); 171 MS_PIN_DECL(D4, GPIOC4, SD1DAT2, SCL12); 172 173 #define C3 21 174 SIG_EXPR_LIST_DECL_SINGLE(SD1DAT3, SD1, SD1_DESC); 175 SIG_EXPR_LIST_DECL_SINGLE(SDA12, I2C12, I2C12_DESC); 176 MS_PIN_DECL(C3, GPIOC5, SD1DAT3, SDA12); 177 178 FUNC_GROUP_DECL(I2C12, D4, C3); 179 180 #define I2C13_DESC SIG_DESC_SET(SCU90, 26) 181 182 #define B2 22 183 SIG_EXPR_LIST_DECL_SINGLE(SD1CD, SD1, SD1_DESC); 184 SIG_EXPR_LIST_DECL_SINGLE(SCL13, I2C13, I2C13_DESC); 185 MS_PIN_DECL(B2, GPIOC6, SD1CD, SCL13); 186 187 #define A1 23 188 SIG_EXPR_LIST_DECL_SINGLE(SD1WP, SD1, SD1_DESC); 189 SIG_EXPR_LIST_DECL_SINGLE(SDA13, I2C13, I2C13_DESC); 190 MS_PIN_DECL(A1, GPIOC7, SD1WP, SDA13); 191 192 FUNC_GROUP_DECL(I2C13, B2, A1); 193 FUNC_GROUP_DECL(SD1, C4, B3, A2, E5, D4, C3, B2, A1); 194 195 #define SD2_DESC SIG_DESC_SET(SCU90, 1) 196 #define GPID_DESC SIG_DESC_SET(HW_STRAP1, 21) 197 #define GPID0_DESC SIG_DESC_SET(SCU8C, 8) 198 199 #define A18 24 200 SIG_EXPR_LIST_DECL_SINGLE(SD2CLK, SD2, SD2_DESC); 201 SIG_EXPR_DECL(GPID0IN, GPID0, GPID0_DESC); 202 SIG_EXPR_DECL(GPID0IN, GPID, GPID_DESC); 203 SIG_EXPR_LIST_DECL_DUAL(GPID0IN, GPID0, GPID); 204 MS_PIN_DECL(A18, GPIOD0, SD2CLK, GPID0IN); 205 206 #define D16 25 207 SIG_EXPR_LIST_DECL_SINGLE(SD2CMD, SD2, SD2_DESC); 208 SIG_EXPR_DECL(GPID0OUT, GPID0, GPID0_DESC); 209 SIG_EXPR_DECL(GPID0OUT, GPID, GPID_DESC); 210 SIG_EXPR_LIST_DECL_DUAL(GPID0OUT, GPID0, GPID); 211 MS_PIN_DECL(D16, GPIOD1, SD2CMD, GPID0OUT); 212 213 FUNC_GROUP_DECL(GPID0, A18, D16); 214 215 #define GPID2_DESC SIG_DESC_SET(SCU8C, 9) 216 217 #define B17 26 218 SIG_EXPR_LIST_DECL_SINGLE(SD2DAT0, SD2, SD2_DESC); 219 SIG_EXPR_DECL(GPID2IN, GPID2, GPID2_DESC); 220 SIG_EXPR_DECL(GPID2IN, GPID, GPID_DESC); 221 SIG_EXPR_LIST_DECL_DUAL(GPID2IN, GPID2, GPID); 222 MS_PIN_DECL(B17, GPIOD2, SD2DAT0, GPID2IN); 223 224 #define A17 27 225 SIG_EXPR_LIST_DECL_SINGLE(SD2DAT1, SD2, SD2_DESC); 226 SIG_EXPR_DECL(GPID2OUT, GPID2, GPID2_DESC); 227 SIG_EXPR_DECL(GPID2OUT, GPID, GPID_DESC); 228 SIG_EXPR_LIST_DECL_DUAL(GPID2OUT, GPID2, GPID); 229 MS_PIN_DECL(A17, GPIOD3, SD2DAT1, GPID2OUT); 230 231 FUNC_GROUP_DECL(GPID2, B17, A17); 232 233 #define GPID4_DESC SIG_DESC_SET(SCU8C, 10) 234 235 #define C16 28 236 SIG_EXPR_LIST_DECL_SINGLE(SD2DAT2, SD2, SD2_DESC); 237 SIG_EXPR_DECL(GPID4IN, GPID4, GPID4_DESC); 238 SIG_EXPR_DECL(GPID4IN, GPID, GPID_DESC); 239 SIG_EXPR_LIST_DECL_DUAL(GPID4IN, GPID4, GPID); 240 MS_PIN_DECL(C16, GPIOD4, SD2DAT2, GPID4IN); 241 242 #define B16 29 243 SIG_EXPR_LIST_DECL_SINGLE(SD2DAT3, SD2, SD2_DESC); 244 SIG_EXPR_DECL(GPID4OUT, GPID4, GPID4_DESC); 245 SIG_EXPR_DECL(GPID4OUT, GPID, GPID_DESC); 246 SIG_EXPR_LIST_DECL_DUAL(GPID4OUT, GPID4, GPID); 247 MS_PIN_DECL(B16, GPIOD5, SD2DAT3, GPID4OUT); 248 249 FUNC_GROUP_DECL(GPID4, C16, B16); 250 251 #define GPID6_DESC SIG_DESC_SET(SCU8C, 11) 252 253 #define A16 30 254 SIG_EXPR_LIST_DECL_SINGLE(SD2CD, SD2, SD2_DESC); 255 SIG_EXPR_DECL(GPID6IN, GPID6, GPID6_DESC); 256 SIG_EXPR_DECL(GPID6IN, GPID, GPID_DESC); 257 SIG_EXPR_LIST_DECL_DUAL(GPID6IN, GPID6, GPID); 258 MS_PIN_DECL(A16, GPIOD6, SD2CD, GPID6IN); 259 260 #define E15 31 261 SIG_EXPR_LIST_DECL_SINGLE(SD2WP, SD2, SD2_DESC); 262 SIG_EXPR_DECL(GPID6OUT, GPID6, GPID6_DESC); 263 SIG_EXPR_DECL(GPID6OUT, GPID, GPID_DESC); 264 SIG_EXPR_LIST_DECL_DUAL(GPID6OUT, GPID6, GPID); 265 MS_PIN_DECL(E15, GPIOD7, SD2WP, GPID6OUT); 266 267 FUNC_GROUP_DECL(GPID6, A16, E15); 268 FUNC_GROUP_DECL(SD2, A18, D16, B17, A17, C16, B16, A16, E15); 269 FUNC_GROUP_DECL(GPID, A18, D16, B17, A17, C16, B16, A16, E15); 270 271 #define GPIE_DESC SIG_DESC_SET(HW_STRAP1, 22) 272 #define GPIE0_DESC SIG_DESC_SET(SCU8C, 12) 273 #define GPIE2_DESC SIG_DESC_SET(SCU8C, 13) 274 #define GPIE4_DESC SIG_DESC_SET(SCU8C, 14) 275 #define GPIE6_DESC SIG_DESC_SET(SCU8C, 15) 276 277 #define D15 32 278 SIG_EXPR_LIST_DECL_SINGLE(NCTS3, NCTS3, SIG_DESC_SET(SCU80, 16)); 279 SIG_EXPR_DECL(GPIE0IN, GPIE0, GPIE0_DESC); 280 SIG_EXPR_DECL(GPIE0IN, GPIE, GPIE_DESC); 281 SIG_EXPR_LIST_DECL_DUAL(GPIE0IN, GPIE0, GPIE); 282 MS_PIN_DECL(D15, GPIOE0, NCTS3, GPIE0IN); 283 284 FUNC_GROUP_DECL(NCTS3, D15); 285 286 #define C15 33 287 SIG_EXPR_LIST_DECL_SINGLE(NDCD3, NDCD3, SIG_DESC_SET(SCU80, 17)); 288 SIG_EXPR_DECL(GPIE0OUT, GPIE0, GPIE0_DESC); 289 SIG_EXPR_DECL(GPIE0OUT, GPIE, GPIE_DESC); 290 SIG_EXPR_LIST_DECL_DUAL(GPIE0OUT, GPIE0, GPIE); 291 MS_PIN_DECL(C15, GPIOE1, NDCD3, GPIE0OUT); 292 293 FUNC_GROUP_DECL(NDCD3, C15); 294 FUNC_GROUP_DECL(GPIE0, D15, C15); 295 296 #define B15 34 297 SIG_EXPR_LIST_DECL_SINGLE(NDSR3, NDSR3, SIG_DESC_SET(SCU80, 18)); 298 SIG_EXPR_DECL(GPIE2IN, GPIE2, GPIE2_DESC); 299 SIG_EXPR_DECL(GPIE2IN, GPIE, GPIE_DESC); 300 SIG_EXPR_LIST_DECL_DUAL(GPIE2IN, GPIE2, GPIE); 301 MS_PIN_DECL(B15, GPIOE2, NDSR3, GPIE2IN); 302 303 FUNC_GROUP_DECL(NDSR3, B15); 304 305 #define A15 35 306 SIG_EXPR_LIST_DECL_SINGLE(NRI3, NRI3, SIG_DESC_SET(SCU80, 19)); 307 SIG_EXPR_DECL(GPIE2OUT, GPIE2, GPIE2_DESC); 308 SIG_EXPR_DECL(GPIE2OUT, GPIE, GPIE_DESC); 309 SIG_EXPR_LIST_DECL_DUAL(GPIE2OUT, GPIE2, GPIE); 310 MS_PIN_DECL(A15, GPIOE3, NRI3, GPIE2OUT); 311 312 FUNC_GROUP_DECL(NRI3, A15); 313 FUNC_GROUP_DECL(GPIE2, B15, A15); 314 315 #define E14 36 316 SIG_EXPR_LIST_DECL_SINGLE(NDTR3, NDTR3, SIG_DESC_SET(SCU80, 20)); 317 SIG_EXPR_DECL(GPIE4IN, GPIE4, GPIE4_DESC); 318 SIG_EXPR_DECL(GPIE4IN, GPIE, GPIE_DESC); 319 SIG_EXPR_LIST_DECL_DUAL(GPIE4IN, GPIE4, GPIE); 320 MS_PIN_DECL(E14, GPIOE4, NDTR3, GPIE4IN); 321 322 FUNC_GROUP_DECL(NDTR3, E14); 323 324 #define D14 37 325 SIG_EXPR_LIST_DECL_SINGLE(NRTS3, NRTS3, SIG_DESC_SET(SCU80, 21)); 326 SIG_EXPR_DECL(GPIE4OUT, GPIE4, GPIE4_DESC); 327 SIG_EXPR_DECL(GPIE4OUT, GPIE, GPIE_DESC); 328 SIG_EXPR_LIST_DECL_DUAL(GPIE4OUT, GPIE4, GPIE); 329 MS_PIN_DECL(D14, GPIOE5, NRTS3, GPIE4OUT); 330 331 FUNC_GROUP_DECL(NRTS3, D14); 332 FUNC_GROUP_DECL(GPIE4, E14, D14); 333 334 #define C14 38 335 SIG_EXPR_LIST_DECL_SINGLE(TXD3, TXD3, SIG_DESC_SET(SCU80, 22)); 336 SIG_EXPR_DECL(GPIE6IN, GPIE6, GPIE6_DESC); 337 SIG_EXPR_DECL(GPIE6IN, GPIE, GPIE_DESC); 338 SIG_EXPR_LIST_DECL_DUAL(GPIE6IN, GPIE6, GPIE); 339 MS_PIN_DECL(C14, GPIOE6, TXD3, GPIE6IN); 340 341 FUNC_GROUP_DECL(TXD3, C14); 342 343 #define B14 39 344 SIG_EXPR_LIST_DECL_SINGLE(RXD3, RXD3, SIG_DESC_SET(SCU80, 23)); 345 SIG_EXPR_DECL(GPIE6OUT, GPIE6, GPIE6_DESC); 346 SIG_EXPR_DECL(GPIE6OUT, GPIE, GPIE_DESC); 347 SIG_EXPR_LIST_DECL_DUAL(GPIE6OUT, GPIE6, GPIE); 348 MS_PIN_DECL(B14, GPIOE7, RXD3, GPIE6OUT); 349 350 FUNC_GROUP_DECL(RXD3, B14); 351 FUNC_GROUP_DECL(GPIE6, C14, B14); 352 353 #define D18 40 354 SSSF_PIN_DECL(D18, GPIOF0, NCTS4, SIG_DESC_SET(SCU80, 24)); 355 356 #define ACPI_DESC SIG_DESC_BIT(HW_STRAP1, 19, 0) 357 358 #define B19 41 359 SIG_EXPR_LIST_DECL_SINGLE(NDCD4, NDCD4, SIG_DESC_SET(SCU80, 25)); 360 SIG_EXPR_DECL(SIOPBI, SIOPBI, SIG_DESC_SET(SCUA4, 12)); 361 SIG_EXPR_DECL(SIOPBI, ACPI, ACPI_DESC); 362 SIG_EXPR_LIST_DECL_DUAL(SIOPBI, SIOPBI, ACPI); 363 MS_PIN_DECL(B19, GPIOF1, NDCD4, SIOPBI); 364 FUNC_GROUP_DECL(NDCD4, B19); 365 FUNC_GROUP_DECL(SIOPBI, B19); 366 367 #define A20 42 368 SIG_EXPR_LIST_DECL_SINGLE(NDSR4, NDSR4, SIG_DESC_SET(SCU80, 26)); 369 SIG_EXPR_DECL(SIOPWRGD, SIOPWRGD, SIG_DESC_SET(SCUA4, 12)); 370 SIG_EXPR_DECL(SIOPWRGD, ACPI, ACPI_DESC); 371 SIG_EXPR_LIST_DECL_DUAL(SIOPWRGD, SIOPWRGD, ACPI); 372 MS_PIN_DECL(A20, GPIOF2, NDSR4, SIOPWRGD); 373 FUNC_GROUP_DECL(NDSR4, A20); 374 FUNC_GROUP_DECL(SIOPWRGD, A20); 375 376 #define D17 43 377 SIG_EXPR_LIST_DECL_SINGLE(NRI4, NRI4, SIG_DESC_SET(SCU80, 27)); 378 SIG_EXPR_DECL(SIOPBO, SIOPBO, SIG_DESC_SET(SCUA4, 14)); 379 SIG_EXPR_DECL(SIOPBO, ACPI, ACPI_DESC); 380 SIG_EXPR_LIST_DECL_DUAL(SIOPBO, SIOPBO, ACPI); 381 MS_PIN_DECL(D17, GPIOF3, NRI4, SIOPBO); 382 FUNC_GROUP_DECL(NRI4, D17); 383 FUNC_GROUP_DECL(SIOPBO, D17); 384 385 #define B18 44 386 SSSF_PIN_DECL(B18, GPIOF4, NDTR4, SIG_DESC_SET(SCU80, 28)); 387 388 #define A19 45 389 SIG_EXPR_LIST_DECL_SINGLE(NDTS4, NDTS4, SIG_DESC_SET(SCU80, 29)); 390 SIG_EXPR_DECL(SIOSCI, SIOSCI, SIG_DESC_SET(SCUA4, 15)); 391 SIG_EXPR_DECL(SIOSCI, ACPI, ACPI_DESC); 392 SIG_EXPR_LIST_DECL_DUAL(SIOSCI, SIOSCI, ACPI); 393 MS_PIN_DECL(A19, GPIOF5, NDTS4, SIOSCI); 394 FUNC_GROUP_DECL(NDTS4, A19); 395 FUNC_GROUP_DECL(SIOSCI, A19); 396 397 #define E16 46 398 SSSF_PIN_DECL(E16, GPIOF6, TXD4, SIG_DESC_SET(SCU80, 30)); 399 400 #define C17 47 401 SSSF_PIN_DECL(C17, GPIOF7, RXD4, SIG_DESC_SET(SCU80, 31)); 402 403 #define A14 48 404 SSSF_PIN_DECL(A14, GPIOG0, SGPSCK, SIG_DESC_SET(SCU84, 0)); 405 406 #define E13 49 407 SSSF_PIN_DECL(E13, GPIOG1, SGPSLD, SIG_DESC_SET(SCU84, 1)); 408 409 #define D13 50 410 SSSF_PIN_DECL(D13, GPIOG2, SGPSI0, SIG_DESC_SET(SCU84, 2)); 411 412 #define C13 51 413 SSSF_PIN_DECL(C13, GPIOG3, SGPSI1, SIG_DESC_SET(SCU84, 3)); 414 415 #define B13 52 416 SIG_EXPR_LIST_DECL_SINGLE(OSCCLK, OSCCLK, SIG_DESC_SET(SCU2C, 1)); 417 SIG_EXPR_LIST_DECL_SINGLE(WDTRST1, WDTRST1, SIG_DESC_SET(SCU84, 4)); 418 MS_PIN_DECL(B13, GPIOG4, OSCCLK, WDTRST1); 419 420 FUNC_GROUP_DECL(OSCCLK, B13); 421 FUNC_GROUP_DECL(WDTRST1, B13); 422 423 #define Y21 53 424 SIG_EXPR_LIST_DECL_SINGLE(USBCKI, USBCKI, SIG_DESC_SET(HW_STRAP1, 23)); 425 SIG_EXPR_LIST_DECL_SINGLE(WDTRST2, WDTRST2, SIG_DESC_SET(SCU84, 5)); 426 MS_PIN_DECL(Y21, GPIOG5, USBCKI, WDTRST2); 427 428 FUNC_GROUP_DECL(USBCKI, Y21); 429 FUNC_GROUP_DECL(WDTRST2, Y21); 430 431 #define AA22 54 432 SSSF_PIN_DECL(AA22, GPIOG6, FLBUSY, SIG_DESC_SET(SCU84, 6)); 433 434 #define U18 55 435 SSSF_PIN_DECL(U18, GPIOG7, FLWP, SIG_DESC_SET(SCU84, 7)); 436 437 #define UART6_DESC SIG_DESC_SET(SCU90, 7) 438 #define ROM16_DESC SIG_DESC_SET(SCU90, 6) 439 #define FLASH_WIDE SIG_DESC_SET(HW_STRAP1, 4) 440 #define BOOT_SRC_NOR { ASPEED_IP_SCU, HW_STRAP1, GENMASK(1, 0), 0, 0 } 441 442 #define A8 56 443 SIG_EXPR_DECL(ROMD8, ROM16, ROM16_DESC); 444 SIG_EXPR_DECL(ROMD8, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 445 SIG_EXPR_LIST_DECL_DUAL(ROMD8, ROM16, ROM16S); 446 SIG_EXPR_LIST_DECL_SINGLE(NCTS6, NCTS6, UART6_DESC); 447 MS_PIN_DECL(A8, GPIOH0, ROMD8, NCTS6); 448 449 #define C7 57 450 SIG_EXPR_DECL(ROMD9, ROM16, ROM16_DESC); 451 SIG_EXPR_DECL(ROMD9, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 452 SIG_EXPR_LIST_DECL_DUAL(ROMD9, ROM16, ROM16S); 453 SIG_EXPR_LIST_DECL_SINGLE(NDCD6, NDCD6, UART6_DESC); 454 MS_PIN_DECL(C7, GPIOH1, ROMD9, NDCD6); 455 456 #define B7 58 457 SIG_EXPR_DECL(ROMD10, ROM16, ROM16_DESC); 458 SIG_EXPR_DECL(ROMD10, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 459 SIG_EXPR_LIST_DECL_DUAL(ROMD10, ROM16, ROM16S); 460 SIG_EXPR_LIST_DECL_SINGLE(NDSR6, NDSR6, UART6_DESC); 461 MS_PIN_DECL(B7, GPIOH2, ROMD10, NDSR6); 462 463 #define A7 59 464 SIG_EXPR_DECL(ROMD11, ROM16, ROM16_DESC); 465 SIG_EXPR_DECL(ROMD11, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 466 SIG_EXPR_LIST_DECL_DUAL(ROMD11, ROM16, ROM16S); 467 SIG_EXPR_LIST_DECL_SINGLE(NRI6, NRI6, UART6_DESC); 468 MS_PIN_DECL(A7, GPIOH3, ROMD11, NRI6); 469 470 #define D7 60 471 SIG_EXPR_DECL(ROMD12, ROM16, ROM16_DESC); 472 SIG_EXPR_DECL(ROMD12, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 473 SIG_EXPR_LIST_DECL_DUAL(ROMD12, ROM16, ROM16S); 474 SIG_EXPR_LIST_DECL_SINGLE(NDTR6, NDTR6, UART6_DESC); 475 MS_PIN_DECL(D7, GPIOH4, ROMD12, NDTR6); 476 477 #define B6 61 478 SIG_EXPR_DECL(ROMD13, ROM16, ROM16_DESC); 479 SIG_EXPR_DECL(ROMD13, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 480 SIG_EXPR_LIST_DECL_DUAL(ROMD13, ROM16, ROM16S); 481 SIG_EXPR_LIST_DECL_SINGLE(NRTS6, NRTS6, UART6_DESC); 482 MS_PIN_DECL(B6, GPIOH5, ROMD13, NRTS6); 483 484 #define A6 62 485 SIG_EXPR_DECL(ROMD14, ROM16, ROM16_DESC); 486 SIG_EXPR_DECL(ROMD14, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 487 SIG_EXPR_LIST_DECL_DUAL(ROMD14, ROM16, ROM16S); 488 SIG_EXPR_LIST_DECL_SINGLE(TXD6, TXD6, UART6_DESC); 489 MS_PIN_DECL(A6, GPIOH6, ROMD14, TXD6); 490 491 #define E7 63 492 SIG_EXPR_DECL(ROMD15, ROM16, ROM16_DESC); 493 SIG_EXPR_DECL(ROMD15, ROM16S, FLASH_WIDE, BOOT_SRC_NOR); 494 SIG_EXPR_LIST_DECL_DUAL(ROMD15, ROM16, ROM16S); 495 SIG_EXPR_LIST_DECL_SINGLE(RXD6, RXD6, UART6_DESC); 496 MS_PIN_DECL(E7, GPIOH7, ROMD15, RXD6); 497 498 FUNC_GROUP_DECL(UART6, A8, C7, B7, A7, D7, B6, A6, E7); 499 500 #define SPI1_DESC \ 501 { ASPEED_IP_SCU, HW_STRAP1, GENMASK(13, 12), 1, 0 } 502 #define SPI1DEBUG_DESC \ 503 { ASPEED_IP_SCU, HW_STRAP1, GENMASK(13, 12), 2, 0 } 504 #define SPI1PASSTHRU_DESC \ 505 { ASPEED_IP_SCU, HW_STRAP1, GENMASK(13, 12), 3, 0 } 506 507 #define C22 64 508 SIG_EXPR_DECL(SYSCS, SPI1DEBUG, SPI1DEBUG_DESC); 509 SIG_EXPR_DECL(SYSCS, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 510 SIG_EXPR_LIST_DECL_DUAL(SYSCS, SPI1DEBUG, SPI1PASSTHRU); 511 SS_PIN_DECL(C22, GPIOI0, SYSCS); 512 513 #define G18 65 514 SIG_EXPR_DECL(SYSCK, SPI1DEBUG, SPI1DEBUG_DESC); 515 SIG_EXPR_DECL(SYSCK, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 516 SIG_EXPR_LIST_DECL_DUAL(SYSCK, SPI1DEBUG, SPI1PASSTHRU); 517 SS_PIN_DECL(G18, GPIOI1, SYSCK); 518 519 #define D19 66 520 SIG_EXPR_DECL(SYSDO, SPI1DEBUG, SPI1DEBUG_DESC); 521 SIG_EXPR_DECL(SYSDO, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 522 SIG_EXPR_LIST_DECL_DUAL(SYSDO, SPI1DEBUG, SPI1PASSTHRU); 523 SS_PIN_DECL(D19, GPIOI2, SYSDO); 524 525 #define C20 67 526 SIG_EXPR_DECL(SYSDI, SPI1DEBUG, SPI1DEBUG_DESC); 527 SIG_EXPR_DECL(SYSDI, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 528 SIG_EXPR_LIST_DECL_DUAL(SYSDI, SPI1DEBUG, SPI1PASSTHRU); 529 SS_PIN_DECL(C20, GPIOI3, SYSDI); 530 531 #define VB_DESC SIG_DESC_SET(HW_STRAP1, 5) 532 533 #define B22 68 534 SIG_EXPR_DECL(SPI1CS0, SPI1, SPI1_DESC); 535 SIG_EXPR_DECL(SPI1CS0, SPI1DEBUG, SPI1DEBUG_DESC); 536 SIG_EXPR_DECL(SPI1CS0, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 537 SIG_EXPR_LIST_DECL(SPI1CS0, SIG_EXPR_PTR(SPI1CS0, SPI1), 538 SIG_EXPR_PTR(SPI1CS0, SPI1DEBUG), 539 SIG_EXPR_PTR(SPI1CS0, SPI1PASSTHRU)); 540 SIG_EXPR_LIST_DECL_SINGLE(VBCS, VGABIOS_ROM, VB_DESC); 541 MS_PIN_DECL(B22, GPIOI4, SPI1CS0, VBCS); 542 543 #define G19 69 544 SIG_EXPR_DECL(SPI1CK, SPI1, SPI1_DESC); 545 SIG_EXPR_DECL(SPI1CK, SPI1DEBUG, SPI1DEBUG_DESC); 546 SIG_EXPR_DECL(SPI1CK, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 547 SIG_EXPR_LIST_DECL(SPI1CK, SIG_EXPR_PTR(SPI1CK, SPI1), 548 SIG_EXPR_PTR(SPI1CK, SPI1DEBUG), 549 SIG_EXPR_PTR(SPI1CK, SPI1PASSTHRU)); 550 SIG_EXPR_LIST_DECL_SINGLE(VBCK, VGABIOS_ROM, VB_DESC); 551 MS_PIN_DECL(G19, GPIOI5, SPI1CK, VBCK); 552 553 #define C18 70 554 SIG_EXPR_DECL(SPI1DO, SPI1, SPI1_DESC); 555 SIG_EXPR_DECL(SPI1DO, SPI1DEBUG, SPI1DEBUG_DESC); 556 SIG_EXPR_DECL(SPI1DO, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 557 SIG_EXPR_LIST_DECL(SPI1DO, SIG_EXPR_PTR(SPI1DO, SPI1), 558 SIG_EXPR_PTR(SPI1DO, SPI1DEBUG), 559 SIG_EXPR_PTR(SPI1DO, SPI1PASSTHRU)); 560 SIG_EXPR_LIST_DECL_SINGLE(VBDO, VGABIOS_ROM, VB_DESC); 561 MS_PIN_DECL(C18, GPIOI6, SPI1DO, VBDO); 562 563 #define E20 71 564 SIG_EXPR_DECL(SPI1DI, SPI1, SPI1_DESC); 565 SIG_EXPR_DECL(SPI1DI, SPI1DEBUG, SPI1DEBUG_DESC); 566 SIG_EXPR_DECL(SPI1DI, SPI1PASSTHRU, SPI1PASSTHRU_DESC); 567 SIG_EXPR_LIST_DECL(SPI1DI, SIG_EXPR_PTR(SPI1DI, SPI1), 568 SIG_EXPR_PTR(SPI1DI, SPI1DEBUG), 569 SIG_EXPR_PTR(SPI1DI, SPI1PASSTHRU)); 570 SIG_EXPR_LIST_DECL_SINGLE(VBDI, VGABIOS_ROM, VB_DESC); 571 MS_PIN_DECL(E20, GPIOI7, SPI1DI, VBDI); 572 573 FUNC_GROUP_DECL(SPI1, B22, G19, C18, E20); 574 FUNC_GROUP_DECL(SPI1DEBUG, C22, G18, D19, C20, B22, G19, C18, E20); 575 FUNC_GROUP_DECL(SPI1PASSTHRU, C22, G18, D19, C20, B22, G19, C18, E20); 576 FUNC_GROUP_DECL(VGABIOS_ROM, B22, G19, C18, E20); 577 578 #define J5 72 579 SSSF_PIN_DECL(J5, GPIOJ0, SGPMCK, SIG_DESC_SET(SCU84, 8)); 580 581 #define J4 73 582 SSSF_PIN_DECL(J4, GPIOJ1, SGPMLD, SIG_DESC_SET(SCU84, 9)); 583 584 #define K5 74 585 SSSF_PIN_DECL(K5, GPIOJ2, SGPMO, SIG_DESC_SET(SCU84, 10)); 586 587 #define J3 75 588 SSSF_PIN_DECL(J3, GPIOJ3, SGPMI, SIG_DESC_SET(SCU84, 11)); 589 590 #define T4 76 591 SSSF_PIN_DECL(T4, GPIOJ4, VGAHS, SIG_DESC_SET(SCU84, 12)); 592 593 #define U2 77 594 SSSF_PIN_DECL(U2, GPIOJ5, VGAVS, SIG_DESC_SET(SCU84, 13)); 595 596 #define T2 78 597 SSSF_PIN_DECL(T2, GPIOJ6, DDCCLK, SIG_DESC_SET(SCU84, 14)); 598 599 #define T1 79 600 SSSF_PIN_DECL(T1, GPIOJ7, DDCDAT, SIG_DESC_SET(SCU84, 15)); 601 602 #define I2C5_DESC SIG_DESC_SET(SCU90, 18) 603 604 #define E3 80 605 SIG_EXPR_LIST_DECL_SINGLE(SCL5, I2C5, I2C5_DESC); 606 SS_PIN_DECL(E3, GPIOK0, SCL5); 607 608 #define D2 81 609 SIG_EXPR_LIST_DECL_SINGLE(SDA5, I2C5, I2C5_DESC); 610 SS_PIN_DECL(D2, GPIOK1, SDA5); 611 612 FUNC_GROUP_DECL(I2C5, E3, D2); 613 614 #define I2C6_DESC SIG_DESC_SET(SCU90, 19) 615 616 #define C1 82 617 SIG_EXPR_LIST_DECL_SINGLE(SCL6, I2C6, I2C6_DESC); 618 SS_PIN_DECL(C1, GPIOK2, SCL6); 619 620 #define F4 83 621 SIG_EXPR_LIST_DECL_SINGLE(SDA6, I2C6, I2C6_DESC); 622 SS_PIN_DECL(F4, GPIOK3, SDA6); 623 624 FUNC_GROUP_DECL(I2C6, C1, F4); 625 626 #define I2C7_DESC SIG_DESC_SET(SCU90, 20) 627 628 #define E2 84 629 SIG_EXPR_LIST_DECL_SINGLE(SCL7, I2C7, I2C7_DESC); 630 SS_PIN_DECL(E2, GPIOK4, SCL7); 631 632 #define D1 85 633 SIG_EXPR_LIST_DECL_SINGLE(SDA7, I2C7, I2C7_DESC); 634 SS_PIN_DECL(D1, GPIOK5, SDA7); 635 636 FUNC_GROUP_DECL(I2C7, E2, D1); 637 638 #define I2C8_DESC SIG_DESC_SET(SCU90, 21) 639 640 #define G5 86 641 SIG_EXPR_LIST_DECL_SINGLE(SCL8, I2C8, I2C8_DESC); 642 SS_PIN_DECL(G5, GPIOK6, SCL8); 643 644 #define F3 87 645 SIG_EXPR_LIST_DECL_SINGLE(SDA8, I2C8, I2C8_DESC); 646 SS_PIN_DECL(F3, GPIOK7, SDA8); 647 648 FUNC_GROUP_DECL(I2C8, G5, F3); 649 650 #define U1 88 651 SSSF_PIN_DECL(U1, GPIOL0, NCTS1, SIG_DESC_SET(SCU84, 16)); 652 653 #define VPI18_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 1, 0 } 654 #define VPI24_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 2, 0 } 655 #define VPI30_DESC { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 3, 0 } 656 657 #define T5 89 658 #define T5_DESC SIG_DESC_SET(SCU84, 17) 659 SIG_EXPR_DECL(VPIDE, VPI18, VPI18_DESC, T5_DESC); 660 SIG_EXPR_DECL(VPIDE, VPI24, VPI24_DESC, T5_DESC); 661 SIG_EXPR_DECL(VPIDE, VPI30, VPI30_DESC, T5_DESC); 662 SIG_EXPR_LIST_DECL(VPIDE, SIG_EXPR_PTR(VPIDE, VPI18), 663 SIG_EXPR_PTR(VPIDE, VPI24), 664 SIG_EXPR_PTR(VPIDE, VPI30)); 665 SIG_EXPR_LIST_DECL_SINGLE(NDCD1, NDCD1, T5_DESC); 666 MS_PIN_DECL(T5, GPIOL1, VPIDE, NDCD1); 667 FUNC_GROUP_DECL(NDCD1, T5); 668 669 #define U3 90 670 #define U3_DESC SIG_DESC_SET(SCU84, 18) 671 SIG_EXPR_DECL(VPIODD, VPI18, VPI18_DESC, U3_DESC); 672 SIG_EXPR_DECL(VPIODD, VPI24, VPI24_DESC, U3_DESC); 673 SIG_EXPR_DECL(VPIODD, VPI30, VPI30_DESC, U3_DESC); 674 SIG_EXPR_LIST_DECL(VPIODD, SIG_EXPR_PTR(VPIODD, VPI18), 675 SIG_EXPR_PTR(VPIODD, VPI24), 676 SIG_EXPR_PTR(VPIODD, VPI30)); 677 SIG_EXPR_LIST_DECL_SINGLE(NDSR1, NDSR1, U3_DESC); 678 MS_PIN_DECL(U3, GPIOL2, VPIODD, NDSR1); 679 FUNC_GROUP_DECL(NDSR1, U3); 680 681 #define V1 91 682 #define V1_DESC SIG_DESC_SET(SCU84, 19) 683 SIG_EXPR_DECL(VPIHS, VPI18, VPI18_DESC, V1_DESC); 684 SIG_EXPR_DECL(VPIHS, VPI24, VPI24_DESC, V1_DESC); 685 SIG_EXPR_DECL(VPIHS, VPI30, VPI30_DESC, V1_DESC); 686 SIG_EXPR_LIST_DECL(VPIHS, SIG_EXPR_PTR(VPIHS, VPI18), 687 SIG_EXPR_PTR(VPIHS, VPI24), 688 SIG_EXPR_PTR(VPIHS, VPI30)); 689 SIG_EXPR_LIST_DECL_SINGLE(NRI1, NRI1, V1_DESC); 690 MS_PIN_DECL(V1, GPIOL3, VPIHS, NRI1); 691 FUNC_GROUP_DECL(NRI1, V1); 692 693 #define U4 92 694 #define U4_DESC SIG_DESC_SET(SCU84, 20) 695 SIG_EXPR_DECL(VPIVS, VPI18, VPI18_DESC, U4_DESC); 696 SIG_EXPR_DECL(VPIVS, VPI24, VPI24_DESC, U4_DESC); 697 SIG_EXPR_DECL(VPIVS, VPI30, VPI30_DESC, U4_DESC); 698 SIG_EXPR_LIST_DECL(VPIVS, SIG_EXPR_PTR(VPIVS, VPI18), 699 SIG_EXPR_PTR(VPIVS, VPI24), 700 SIG_EXPR_PTR(VPIVS, VPI30)); 701 SIG_EXPR_LIST_DECL_SINGLE(NDTR1, NDTR1, U4_DESC); 702 MS_PIN_DECL(U4, GPIOL4, VPIVS, NDTR1); 703 FUNC_GROUP_DECL(NDTR1, U4); 704 705 #define V2 93 706 #define V2_DESC SIG_DESC_SET(SCU84, 21) 707 SIG_EXPR_DECL(VPICLK, VPI18, VPI18_DESC, V2_DESC); 708 SIG_EXPR_DECL(VPICLK, VPI24, VPI24_DESC, V2_DESC); 709 SIG_EXPR_DECL(VPICLK, VPI30, VPI30_DESC, V2_DESC); 710 SIG_EXPR_LIST_DECL(VPICLK, SIG_EXPR_PTR(VPICLK, VPI18), 711 SIG_EXPR_PTR(VPICLK, VPI24), 712 SIG_EXPR_PTR(VPICLK, VPI30)); 713 SIG_EXPR_LIST_DECL_SINGLE(NRTS1, NRTS1, V2_DESC); 714 MS_PIN_DECL(V2, GPIOL5, VPICLK, NRTS1); 715 FUNC_GROUP_DECL(NRTS1, V2); 716 717 #define W1 94 718 #define W1_DESC SIG_DESC_SET(SCU84, 22) 719 SIG_EXPR_LIST_DECL_SINGLE(VPIB0, VPI30, VPI30_DESC, W1_DESC); 720 SIG_EXPR_LIST_DECL_SINGLE(TXD1, TXD1, W1_DESC); 721 MS_PIN_DECL(W1, GPIOL6, VPIB0, TXD1); 722 FUNC_GROUP_DECL(TXD1, W1); 723 724 #define U5 95 725 #define U5_DESC SIG_DESC_SET(SCU84, 23) 726 SIG_EXPR_LIST_DECL_SINGLE(VPIB1, VPI30, VPI30_DESC, U5_DESC); 727 SIG_EXPR_LIST_DECL_SINGLE(RXD1, RXD1, U5_DESC); 728 MS_PIN_DECL(U5, GPIOL7, VPIB1, RXD1); 729 FUNC_GROUP_DECL(RXD1, U5); 730 731 #define V3 96 732 #define V3_DESC SIG_DESC_SET(SCU84, 24) 733 SIG_EXPR_DECL(VPIOB2, VPI18, VPI18_DESC, V3_DESC); 734 SIG_EXPR_DECL(VPIOB2, VPI24, VPI24_DESC, V3_DESC); 735 SIG_EXPR_DECL(VPIOB2, VPI30, VPI30_DESC, V3_DESC); 736 SIG_EXPR_LIST_DECL(VPIOB2, SIG_EXPR_PTR(VPIOB2, VPI18), 737 SIG_EXPR_PTR(VPIOB2, VPI24), 738 SIG_EXPR_PTR(VPIOB2, VPI30)); 739 SIG_EXPR_LIST_DECL_SINGLE(NCTS2, NCTS2, V3_DESC); 740 MS_PIN_DECL(V3, GPIOM0, VPIOB2, NCTS2); 741 FUNC_GROUP_DECL(NCTS2, V3); 742 743 #define W2 97 744 #define W2_DESC SIG_DESC_SET(SCU84, 25) 745 SIG_EXPR_DECL(VPIOB3, VPI18, VPI18_DESC, W2_DESC); 746 SIG_EXPR_DECL(VPIOB3, VPI24, VPI24_DESC, W2_DESC); 747 SIG_EXPR_DECL(VPIOB3, VPI30, VPI30_DESC, W2_DESC); 748 SIG_EXPR_LIST_DECL(VPIOB3, SIG_EXPR_PTR(VPIOB3, VPI18), 749 SIG_EXPR_PTR(VPIOB3, VPI24), 750 SIG_EXPR_PTR(VPIOB3, VPI30)); 751 SIG_EXPR_LIST_DECL_SINGLE(NDCD2, NDCD2, W2_DESC); 752 MS_PIN_DECL(W2, GPIOM1, VPIOB3, NDCD2); 753 FUNC_GROUP_DECL(NDCD2, W2); 754 755 #define Y1 98 756 #define Y1_DESC SIG_DESC_SET(SCU84, 26) 757 SIG_EXPR_DECL(VPIOB4, VPI18, VPI18_DESC, Y1_DESC); 758 SIG_EXPR_DECL(VPIOB4, VPI24, VPI24_DESC, Y1_DESC); 759 SIG_EXPR_DECL(VPIOB4, VPI30, VPI30_DESC, Y1_DESC); 760 SIG_EXPR_LIST_DECL(VPIOB4, SIG_EXPR_PTR(VPIOB4, VPI18), 761 SIG_EXPR_PTR(VPIOB4, VPI24), 762 SIG_EXPR_PTR(VPIOB4, VPI30)); 763 SIG_EXPR_LIST_DECL_SINGLE(NDSR2, NDSR2, Y1_DESC); 764 MS_PIN_DECL(Y1, GPIOM2, VPIOB4, NDSR2); 765 FUNC_GROUP_DECL(NDSR2, Y1); 766 767 #define V4 99 768 #define V4_DESC SIG_DESC_SET(SCU84, 27) 769 SIG_EXPR_DECL(VPIOB5, VPI18, VPI18_DESC, V4_DESC); 770 SIG_EXPR_DECL(VPIOB5, VPI24, VPI24_DESC, V4_DESC); 771 SIG_EXPR_DECL(VPIOB5, VPI30, VPI30_DESC, V4_DESC); 772 SIG_EXPR_LIST_DECL(VPIOB5, SIG_EXPR_PTR(VPIOB5, VPI18), 773 SIG_EXPR_PTR(VPIOB5, VPI24), 774 SIG_EXPR_PTR(VPIOB5, VPI30)); 775 SIG_EXPR_LIST_DECL_SINGLE(NRI2, NRI2, V4_DESC); 776 MS_PIN_DECL(V4, GPIOM3, VPIOB5, NRI2); 777 FUNC_GROUP_DECL(NRI2, V4); 778 779 #define W3 100 780 #define W3_DESC SIG_DESC_SET(SCU84, 28) 781 SIG_EXPR_DECL(VPIOB6, VPI18, VPI18_DESC, W3_DESC); 782 SIG_EXPR_DECL(VPIOB6, VPI24, VPI24_DESC, W3_DESC); 783 SIG_EXPR_DECL(VPIOB6, VPI30, VPI30_DESC, W3_DESC); 784 SIG_EXPR_LIST_DECL(VPIOB6, SIG_EXPR_PTR(VPIOB6, VPI18), 785 SIG_EXPR_PTR(VPIOB6, VPI24), 786 SIG_EXPR_PTR(VPIOB6, VPI30)); 787 SIG_EXPR_LIST_DECL_SINGLE(NDTR2, NDTR2, W3_DESC); 788 MS_PIN_DECL(W3, GPIOM4, VPIOB6, NDTR2); 789 FUNC_GROUP_DECL(NDTR2, W3); 790 791 #define Y2 101 792 #define Y2_DESC SIG_DESC_SET(SCU84, 29) 793 SIG_EXPR_DECL(VPIOB7, VPI18, VPI18_DESC, Y2_DESC); 794 SIG_EXPR_DECL(VPIOB7, VPI24, VPI24_DESC, Y2_DESC); 795 SIG_EXPR_DECL(VPIOB7, VPI30, VPI30_DESC, Y2_DESC); 796 SIG_EXPR_LIST_DECL(VPIOB7, SIG_EXPR_PTR(VPIOB7, VPI18), 797 SIG_EXPR_PTR(VPIOB7, VPI24), 798 SIG_EXPR_PTR(VPIOB7, VPI30)); 799 SIG_EXPR_LIST_DECL_SINGLE(NRTS2, NRTS2, Y2_DESC); 800 MS_PIN_DECL(Y2, GPIOM5, VPIOB7, NRTS2); 801 FUNC_GROUP_DECL(NRTS2, Y2); 802 803 #define AA1 102 804 #define AA1_DESC SIG_DESC_SET(SCU84, 30) 805 SIG_EXPR_DECL(VPIOB8, VPI18, VPI18_DESC, AA1_DESC); 806 SIG_EXPR_DECL(VPIOB8, VPI24, VPI24_DESC, AA1_DESC); 807 SIG_EXPR_DECL(VPIOB8, VPI30, VPI30_DESC, AA1_DESC); 808 SIG_EXPR_LIST_DECL(VPIOB8, SIG_EXPR_PTR(VPIOB8, VPI18), 809 SIG_EXPR_PTR(VPIOB8, VPI24), 810 SIG_EXPR_PTR(VPIOB8, VPI30)); 811 SIG_EXPR_LIST_DECL_SINGLE(TXD2, TXD2, AA1_DESC); 812 MS_PIN_DECL(AA1, GPIOM6, VPIOB8, TXD2); 813 FUNC_GROUP_DECL(TXD2, AA1); 814 815 #define V5 103 816 #define V5_DESC SIG_DESC_SET(SCU84, 31) 817 SIG_EXPR_DECL(VPIOB9, VPI18, VPI18_DESC, V5_DESC); 818 SIG_EXPR_DECL(VPIOB9, VPI24, VPI24_DESC, V5_DESC); 819 SIG_EXPR_DECL(VPIOB9, VPI30, VPI30_DESC, V5_DESC); 820 SIG_EXPR_LIST_DECL(VPIOB9, SIG_EXPR_PTR(VPIOB9, VPI18), 821 SIG_EXPR_PTR(VPIOB9, VPI24), 822 SIG_EXPR_PTR(VPIOB9, VPI30)); 823 SIG_EXPR_LIST_DECL_SINGLE(RXD2, RXD2, V5_DESC); 824 MS_PIN_DECL(V5, GPIOM7, VPIOB9, RXD2); 825 FUNC_GROUP_DECL(RXD2, V5); 826 827 #define W4 104 828 #define W4_DESC SIG_DESC_SET(SCU88, 0) 829 SIG_EXPR_LIST_DECL_SINGLE(VPIG0, VPI30, VPI30_DESC, W4_DESC); 830 SIG_EXPR_LIST_DECL_SINGLE(PWM0, PWM0, W4_DESC); 831 MS_PIN_DECL(W4, GPION0, VPIG0, PWM0); 832 FUNC_GROUP_DECL(PWM0, W4); 833 834 #define Y3 105 835 #define Y3_DESC SIG_DESC_SET(SCU88, 1) 836 SIG_EXPR_LIST_DECL_SINGLE(VPIG1, VPI30, VPI30_DESC, Y3_DESC); 837 SIG_EXPR_LIST_DECL_SINGLE(PWM1, PWM1, Y3_DESC); 838 MS_PIN_DECL(Y3, GPION1, VPIG1, PWM1); 839 FUNC_GROUP_DECL(PWM1, Y3); 840 841 #define AA2 106 842 #define AA2_DESC SIG_DESC_SET(SCU88, 2) 843 SIG_EXPR_DECL(VPIG2, VPI18, VPI18_DESC, AA2_DESC); 844 SIG_EXPR_DECL(VPIG2, VPI24, VPI24_DESC, AA2_DESC); 845 SIG_EXPR_DECL(VPIG2, VPI30, VPI30_DESC, AA2_DESC); 846 SIG_EXPR_LIST_DECL(VPIG2, SIG_EXPR_PTR(VPIG2, VPI18), 847 SIG_EXPR_PTR(VPIG2, VPI24), 848 SIG_EXPR_PTR(VPIG2, VPI30)); 849 SIG_EXPR_LIST_DECL_SINGLE(PWM2, PWM2, AA2_DESC); 850 MS_PIN_DECL(AA2, GPION2, VPIG2, PWM2); 851 FUNC_GROUP_DECL(PWM2, AA2); 852 853 #define AB1 107 854 #define AB1_DESC SIG_DESC_SET(SCU88, 3) 855 SIG_EXPR_DECL(VPIG3, VPI18, VPI18_DESC, AB1_DESC); 856 SIG_EXPR_DECL(VPIG3, VPI24, VPI24_DESC, AB1_DESC); 857 SIG_EXPR_DECL(VPIG3, VPI30, VPI30_DESC, AB1_DESC); 858 SIG_EXPR_LIST_DECL(VPIG3, SIG_EXPR_PTR(VPIG3, VPI18), 859 SIG_EXPR_PTR(VPIG3, VPI24), 860 SIG_EXPR_PTR(VPIG3, VPI30)); 861 SIG_EXPR_LIST_DECL_SINGLE(PWM3, PWM3, AB1_DESC); 862 MS_PIN_DECL(AB1, GPION3, VPIG3, PWM3); 863 FUNC_GROUP_DECL(PWM3, AB1); 864 865 #define W5 108 866 #define W5_DESC SIG_DESC_SET(SCU88, 4) 867 SIG_EXPR_DECL(VPIG4, VPI18, VPI18_DESC, W5_DESC); 868 SIG_EXPR_DECL(VPIG4, VPI24, VPI24_DESC, W5_DESC); 869 SIG_EXPR_DECL(VPIG4, VPI30, VPI30_DESC, W5_DESC); 870 SIG_EXPR_LIST_DECL(VPIG4, SIG_EXPR_PTR(VPIG4, VPI18), 871 SIG_EXPR_PTR(VPIG4, VPI24), 872 SIG_EXPR_PTR(VPIG4, VPI30)); 873 SIG_EXPR_LIST_DECL_SINGLE(PWM4, PWM4, W5_DESC); 874 MS_PIN_DECL(W5, GPION4, VPIG4, PWM4); 875 FUNC_GROUP_DECL(PWM4, W5); 876 877 #define Y4 109 878 #define Y4_DESC SIG_DESC_SET(SCU88, 5) 879 SIG_EXPR_DECL(VPIG5, VPI18, VPI18_DESC, Y4_DESC); 880 SIG_EXPR_DECL(VPIG5, VPI24, VPI24_DESC, Y4_DESC); 881 SIG_EXPR_DECL(VPIG5, VPI30, VPI30_DESC, Y4_DESC); 882 SIG_EXPR_LIST_DECL(VPIG5, SIG_EXPR_PTR(VPIG5, VPI18), 883 SIG_EXPR_PTR(VPIG5, VPI24), 884 SIG_EXPR_PTR(VPIG5, VPI30)); 885 SIG_EXPR_LIST_DECL_SINGLE(PWM5, PWM5, Y4_DESC); 886 MS_PIN_DECL(Y4, GPION5, VPIG5, PWM5); 887 FUNC_GROUP_DECL(PWM5, Y4); 888 889 #define AA3 110 890 #define AA3_DESC SIG_DESC_SET(SCU88, 6) 891 SIG_EXPR_LIST_DECL_SINGLE(VPIG6, VPI30, VPI30_DESC, AA3_DESC); 892 SIG_EXPR_LIST_DECL_SINGLE(PWM6, PWM6, AA3_DESC); 893 MS_PIN_DECL(AA3, GPION6, VPIG6, PWM6); 894 FUNC_GROUP_DECL(PWM6, AA3); 895 896 #define AB2 111 897 #define AB2_DESC SIG_DESC_SET(SCU88, 7) 898 SIG_EXPR_LIST_DECL_SINGLE(VPIG7, VPI30, VPI30_DESC, AB2_DESC); 899 SIG_EXPR_LIST_DECL_SINGLE(PWM7, PWM7, AB2_DESC); 900 MS_PIN_DECL(AB2, GPION7, VPIG7, PWM7); 901 FUNC_GROUP_DECL(PWM7, AB2); 902 903 #define V6 112 904 SIG_EXPR_LIST_DECL_SINGLE(VPIG8, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 8)); 905 SS_PIN_DECL(V6, GPIOO0, VPIG8); 906 907 #define Y5 113 908 SIG_EXPR_LIST_DECL_SINGLE(VPIG9, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 9)); 909 SS_PIN_DECL(Y5, GPIOO1, VPIG9); 910 911 #define AA4 114 912 SIG_EXPR_LIST_DECL_SINGLE(VPIR0, VPI30, VPI30_DESC, SIG_DESC_SET(SCU88, 10)); 913 SS_PIN_DECL(AA4, GPIOO2, VPIR0); 914 915 #define AB3 115 916 SIG_EXPR_LIST_DECL_SINGLE(VPIR1, VPI30, VPI30_DESC, SIG_DESC_SET(SCU88, 11)); 917 SS_PIN_DECL(AB3, GPIOO3, VPIR1); 918 919 #define W6 116 920 SIG_EXPR_LIST_DECL_SINGLE(VPIR2, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 12)); 921 SS_PIN_DECL(W6, GPIOO4, VPIR2); 922 923 #define AA5 117 924 SIG_EXPR_LIST_DECL_SINGLE(VPIR3, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 13)); 925 SS_PIN_DECL(AA5, GPIOO5, VPIR3); 926 927 #define AB4 118 928 SIG_EXPR_LIST_DECL_SINGLE(VPIR4, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 14)); 929 SS_PIN_DECL(AB4, GPIOO6, VPIR4); 930 931 #define V7 119 932 SIG_EXPR_LIST_DECL_SINGLE(VPIR5, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 15)); 933 SS_PIN_DECL(V7, GPIOO7, VPIR5); 934 935 #define Y6 120 936 SIG_EXPR_LIST_DECL_SINGLE(VPIR6, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 16)); 937 SS_PIN_DECL(Y6, GPIOP0, VPIR6); 938 939 #define AB5 121 940 SIG_EXPR_LIST_DECL_SINGLE(VPIR7, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 17)); 941 SS_PIN_DECL(AB5, GPIOP1, VPIR7); 942 943 #define W7 122 944 SIG_EXPR_LIST_DECL_SINGLE(VPIR8, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 18)); 945 SS_PIN_DECL(W7, GPIOP2, VPIR8); 946 947 #define AA6 123 948 SIG_EXPR_LIST_DECL_SINGLE(VPIR9, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 19)); 949 SS_PIN_DECL(AA6, GPIOP3, VPIR9); 950 951 FUNC_GROUP_DECL(VPI18, T5, U3, V1, U4, V2, V3, W2, Y1, V4, W3, Y2, AA1, V5, 952 AA22, W5, Y4, AA3, AB2); 953 FUNC_GROUP_DECL(VPI24, T5, U3, V1, U4, V2, V3, W2, Y1, V4, W3, Y2, AA1, V5, 954 AA22, W5, Y4, AA3, AB2, V6, Y5, W6, AA5, AB4, V7, Y6, AB5, W7, 955 AA6); 956 FUNC_GROUP_DECL(VPI30, T5, U3, V1, U4, V2, W1, U5, V3, W2, Y1, V4, W3, Y2, AA1, 957 V5, W4, Y3, AA22, W5, Y4, AA3, AB2, AA4, AB3); 958 959 #define AB6 124 960 SIG_EXPR_LIST_DECL_SINGLE(GPIOP4, GPIOP4); 961 MS_PIN_DECL_(AB6, SIG_EXPR_LIST_PTR(GPIOP4)); 962 963 #define Y7 125 964 SIG_EXPR_LIST_DECL_SINGLE(GPIOP5, GPIOP5); 965 MS_PIN_DECL_(Y7, SIG_EXPR_LIST_PTR(GPIOP5)); 966 967 #define AA7 126 968 SSSF_PIN_DECL(AA7, GPIOP6, BMCINT, SIG_DESC_SET(SCU88, 22)); 969 970 #define AB7 127 971 SSSF_PIN_DECL(AB7, GPIOP7, FLACK, SIG_DESC_SET(SCU88, 23)); 972 973 #define I2C3_DESC SIG_DESC_SET(SCU90, 16) 974 975 #define D3 128 976 SIG_EXPR_LIST_DECL_SINGLE(SCL3, I2C3, I2C3_DESC); 977 SS_PIN_DECL(D3, GPIOQ0, SCL3); 978 979 #define C2 129 980 SIG_EXPR_LIST_DECL_SINGLE(SDA3, I2C3, I2C3_DESC); 981 SS_PIN_DECL(C2, GPIOQ1, SDA3); 982 983 FUNC_GROUP_DECL(I2C3, D3, C2); 984 985 #define I2C4_DESC SIG_DESC_SET(SCU90, 17) 986 987 #define B1 130 988 SIG_EXPR_LIST_DECL_SINGLE(SCL4, I2C4, I2C4_DESC); 989 SS_PIN_DECL(B1, GPIOQ2, SCL4); 990 991 #define F5 131 992 SIG_EXPR_LIST_DECL_SINGLE(SDA4, I2C4, I2C4_DESC); 993 SS_PIN_DECL(F5, GPIOQ3, SDA4); 994 995 FUNC_GROUP_DECL(I2C4, B1, F5); 996 997 #define I2C14_DESC SIG_DESC_SET(SCU90, 27) 998 999 #define H4 132 1000 SIG_EXPR_LIST_DECL_SINGLE(SCL14, I2C14, I2C14_DESC); 1001 SS_PIN_DECL(H4, GPIOQ4, SCL14); 1002 1003 #define H3 133 1004 SIG_EXPR_LIST_DECL_SINGLE(SDA14, I2C14, I2C14_DESC); 1005 SS_PIN_DECL(H3, GPIOQ5, SDA14); 1006 1007 FUNC_GROUP_DECL(I2C14, H4, H3); 1008 1009 #define DASH9028_DESC SIG_DESC_SET(SCU90, 28) 1010 1011 #define H2 134 1012 SIG_EXPR_LIST_DECL_SINGLE(DASHH2, DASHH2, DASH9028_DESC); 1013 SS_PIN_DECL(H2, GPIOQ6, DASHH2); 1014 1015 #define H1 135 1016 SIG_EXPR_LIST_DECL_SINGLE(DASHH1, DASHH1, DASH9028_DESC); 1017 SS_PIN_DECL(H1, GPIOQ7, DASHH1); 1018 1019 #define V20 136 1020 SSSF_PIN_DECL(V20, GPIOR0, ROMCS1, SIG_DESC_SET(SCU88, 24)); 1021 1022 #define W21 137 1023 SSSF_PIN_DECL(W21, GPIOR1, ROMCS2, SIG_DESC_SET(SCU88, 25)); 1024 1025 #define Y22 138 1026 SSSF_PIN_DECL(Y22, GPIOR2, ROMCS3, SIG_DESC_SET(SCU88, 26)); 1027 1028 #define U19 139 1029 SSSF_PIN_DECL(U19, GPIOR3, ROMCS4, SIG_DESC_SET(SCU88, 27)); 1030 1031 #define VPOOFF0_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 0, 0 } 1032 #define VPO12_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 1, 0 } 1033 #define VPO24_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 2, 0 } 1034 #define VPOOFF1_DESC { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 3, 0 } 1035 #define VPO_OFF_12 { ASPEED_IP_SCU, SCU94, 0x2, 0, 0 } 1036 #define VPO_24_OFF SIG_DESC_SET(SCU94, 1) 1037 1038 #define V21 140 1039 #define V21_DESC SIG_DESC_SET(SCU88, 28) 1040 SIG_EXPR_DECL(ROMA24, ROM8, V21_DESC, VPO_OFF_12); 1041 SIG_EXPR_DECL(ROMA24, ROM16, V21_DESC, VPO_OFF_12); 1042 SIG_EXPR_DECL(ROMA24, ROM16S, V21_DESC, VPO_OFF_12); 1043 SIG_EXPR_LIST_DECL(ROMA24, SIG_EXPR_PTR(ROMA24, ROM8), 1044 SIG_EXPR_PTR(ROMA24, ROM16), 1045 SIG_EXPR_PTR(ROMA24, ROM16S)); 1046 SIG_EXPR_LIST_DECL_SINGLE(VPOR6, VPO24, V21_DESC, VPO_24_OFF); 1047 MS_PIN_DECL(V21, GPIOR4, ROMA24, VPOR6); 1048 1049 #define W22 141 1050 #define W22_DESC SIG_DESC_SET(SCU88, 29) 1051 SIG_EXPR_DECL(ROMA25, ROM8, W22_DESC, VPO_OFF_12); 1052 SIG_EXPR_DECL(ROMA25, ROM16, W22_DESC, VPO_OFF_12); 1053 SIG_EXPR_DECL(ROMA25, ROM16S, W22_DESC, VPO_OFF_12); 1054 SIG_EXPR_LIST_DECL(ROMA25, SIG_EXPR_PTR(ROMA25, ROM8), 1055 SIG_EXPR_PTR(ROMA25, ROM16), 1056 SIG_EXPR_PTR(ROMA25, ROM16S)); 1057 SIG_EXPR_LIST_DECL_SINGLE(VPOR7, VPO24, W22_DESC, VPO_24_OFF); 1058 MS_PIN_DECL(W22, GPIOR5, ROMA25, VPOR7); 1059 1060 #define C6 142 1061 SIG_EXPR_LIST_DECL_SINGLE(MDC1, MDIO1, SIG_DESC_SET(SCU88, 30)); 1062 SS_PIN_DECL(C6, GPIOR6, MDC1); 1063 1064 #define A5 143 1065 SIG_EXPR_LIST_DECL_SINGLE(MDIO1, MDIO1, SIG_DESC_SET(SCU88, 31)); 1066 SS_PIN_DECL(A5, GPIOR7, MDIO1); 1067 1068 FUNC_GROUP_DECL(MDIO1, C6, A5); 1069 1070 #define U21 144 1071 #define U21_DESC SIG_DESC_SET(SCU8C, 0) 1072 SIG_EXPR_DECL(ROMD4, ROM8, U21_DESC, VPOOFF0_DESC); 1073 SIG_EXPR_DECL(ROMD4, ROM16, U21_DESC, VPOOFF0_DESC); 1074 SIG_EXPR_DECL(ROMD4, ROM16S, U21_DESC, VPOOFF0_DESC); 1075 SIG_EXPR_LIST_DECL(ROMD4, SIG_EXPR_PTR(ROMD4, ROM8), 1076 SIG_EXPR_PTR(ROMD4, ROM16), 1077 SIG_EXPR_PTR(ROMD4, ROM16S)); 1078 SIG_EXPR_DECL(VPODE, VPO12, U21_DESC, VPO12_DESC); 1079 SIG_EXPR_DECL(VPODE, VPO24, U21_DESC, VPO12_DESC); 1080 SIG_EXPR_LIST_DECL_DUAL(VPODE, VPO12, VPO24); 1081 MS_PIN_DECL(U21, GPIOS0, ROMD4, VPODE); 1082 1083 #define T19 145 1084 #define T19_DESC SIG_DESC_SET(SCU8C, 1) 1085 SIG_EXPR_DECL(ROMD5, ROM8, T19_DESC, VPOOFF0_DESC); 1086 SIG_EXPR_DECL(ROMD5, ROM16, T19_DESC, VPOOFF0_DESC); 1087 SIG_EXPR_DECL(ROMD5, ROM16S, T19_DESC, VPOOFF0_DESC); 1088 SIG_EXPR_LIST_DECL(ROMD5, SIG_EXPR_PTR(ROMD5, ROM8), 1089 SIG_EXPR_PTR(ROMD5, ROM16), 1090 SIG_EXPR_PTR(ROMD5, ROM16S)); 1091 SIG_EXPR_DECL(VPOHS, VPO12, T19_DESC, VPO12_DESC); 1092 SIG_EXPR_DECL(VPOHS, VPO24, T19_DESC, VPO24_DESC); 1093 SIG_EXPR_LIST_DECL_DUAL(VPOHS, VPO12, VPO24); 1094 MS_PIN_DECL(T19, GPIOS1, ROMD5, VPOHS); 1095 1096 #define V22 146 1097 #define V22_DESC SIG_DESC_SET(SCU8C, 2) 1098 SIG_EXPR_DECL(ROMD6, ROM8, V22_DESC, VPOOFF0_DESC); 1099 SIG_EXPR_DECL(ROMD6, ROM16, V22_DESC, VPOOFF0_DESC); 1100 SIG_EXPR_DECL(ROMD6, ROM16S, V22_DESC, VPOOFF0_DESC); 1101 SIG_EXPR_LIST_DECL(ROMD6, SIG_EXPR_PTR(ROMD6, ROM8), 1102 SIG_EXPR_PTR(ROMD6, ROM16), 1103 SIG_EXPR_PTR(ROMD6, ROM16S)); 1104 SIG_EXPR_DECL(VPOVS, VPO12, V22_DESC, VPO12_DESC); 1105 SIG_EXPR_DECL(VPOVS, VPO24, V22_DESC, VPO24_DESC); 1106 SIG_EXPR_LIST_DECL_DUAL(VPOVS, VPO12, VPO24); 1107 MS_PIN_DECL(V22, GPIOS2, ROMD6, VPOVS); 1108 1109 #define U20 147 1110 #define U20_DESC SIG_DESC_SET(SCU8C, 3) 1111 SIG_EXPR_DECL(ROMD7, ROM8, U20_DESC, VPOOFF0_DESC); 1112 SIG_EXPR_DECL(ROMD7, ROM16, U20_DESC, VPOOFF0_DESC); 1113 SIG_EXPR_DECL(ROMD7, ROM16S, U20_DESC, VPOOFF0_DESC); 1114 SIG_EXPR_LIST_DECL(ROMD7, SIG_EXPR_PTR(ROMD7, ROM8), 1115 SIG_EXPR_PTR(ROMD7, ROM16), 1116 SIG_EXPR_PTR(ROMD7, ROM16S)); 1117 SIG_EXPR_DECL(VPOCLK, VPO12, U20_DESC, VPO12_DESC); 1118 SIG_EXPR_DECL(VPOCLK, VPO24, U20_DESC, VPO24_DESC); 1119 SIG_EXPR_LIST_DECL_DUAL(VPOCLK, VPO12, VPO24); 1120 MS_PIN_DECL(U20, GPIOS3, ROMD7, VPOCLK); 1121 1122 #define R18 148 1123 #define ROMOE_DESC SIG_DESC_SET(SCU8C, 4) 1124 SIG_EXPR_LIST_DECL_SINGLE(GPIOS4, GPIOS4); 1125 SIG_EXPR_DECL(ROMOE, ROM8, ROMOE_DESC); 1126 SIG_EXPR_DECL(ROMOE, ROM16, ROMOE_DESC); 1127 SIG_EXPR_DECL(ROMOE, ROM16S, ROMOE_DESC); 1128 SIG_EXPR_LIST_DECL(ROMOE, SIG_EXPR_PTR(ROMOE, ROM8), 1129 SIG_EXPR_PTR(ROMOE, ROM16), 1130 SIG_EXPR_PTR(ROMOE, ROM16S)); 1131 MS_PIN_DECL_(R18, SIG_EXPR_LIST_PTR(ROMOE), SIG_EXPR_LIST_PTR(GPIOS4)); 1132 1133 #define N21 149 1134 #define ROMWE_DESC SIG_DESC_SET(SCU8C, 5) 1135 SIG_EXPR_LIST_DECL_SINGLE(GPIOS5, GPIOS5); 1136 SIG_EXPR_DECL(ROMWE, ROM8, ROMWE_DESC); 1137 SIG_EXPR_DECL(ROMWE, ROM16, ROMWE_DESC); 1138 SIG_EXPR_DECL(ROMWE, ROM16S, ROMWE_DESC); 1139 SIG_EXPR_LIST_DECL(ROMWE, SIG_EXPR_PTR(ROMWE, ROM8), 1140 SIG_EXPR_PTR(ROMWE, ROM16), 1141 SIG_EXPR_PTR(ROMWE, ROM16S)); 1142 MS_PIN_DECL_(N21, SIG_EXPR_LIST_PTR(ROMWE), SIG_EXPR_LIST_PTR(GPIOS5)); 1143 1144 #define L22 150 1145 #define L22_DESC SIG_DESC_SET(SCU8C, 6) 1146 SIG_EXPR_DECL(ROMA22, ROM8, L22_DESC, VPO_OFF_12); 1147 SIG_EXPR_DECL(ROMA22, ROM16, L22_DESC, VPO_OFF_12); 1148 SIG_EXPR_DECL(ROMA22, ROM16S, L22_DESC, VPO_OFF_12); 1149 SIG_EXPR_LIST_DECL(ROMA22, SIG_EXPR_PTR(ROMA22, ROM8), 1150 SIG_EXPR_PTR(ROMA22, ROM16), 1151 SIG_EXPR_PTR(ROMA22, ROM16S)); 1152 SIG_EXPR_LIST_DECL_SINGLE(VPOR4, VPO24, L22_DESC, VPO_24_OFF); 1153 MS_PIN_DECL(L22, GPIOS6, ROMA22, VPOR4); 1154 1155 #define K18 151 1156 #define K18_DESC SIG_DESC_SET(SCU8C, 7) 1157 SIG_EXPR_DECL(ROMA23, ROM8, K18_DESC, VPO_OFF_12); 1158 SIG_EXPR_DECL(ROMA23, ROM16, K18_DESC, VPO_OFF_12); 1159 SIG_EXPR_DECL(ROMA23, ROM16S, K18_DESC, VPO_OFF_12); 1160 SIG_EXPR_LIST_DECL(ROMA23, SIG_EXPR_PTR(ROMA23, ROM8), 1161 SIG_EXPR_PTR(ROMA23, ROM16), 1162 SIG_EXPR_PTR(ROMA23, ROM16S)); 1163 SIG_EXPR_LIST_DECL_SINGLE(VPOR5, VPO24, K18_DESC, VPO_24_OFF); 1164 MS_PIN_DECL(K18, GPIOS7, ROMA23, VPOR5); 1165 1166 #define RMII1_DESC SIG_DESC_BIT(HW_STRAP1, 6, 0) 1167 1168 #define A12 152 1169 SIG_EXPR_LIST_DECL_SINGLE(GPIOT0, GPIOT0, SIG_DESC_SET(SCUA0, 0)); 1170 SIG_EXPR_LIST_DECL_SINGLE(RMII1TXEN, RMII1, RMII1_DESC); 1171 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXCK, RGMII1); 1172 MS_PIN_DECL_(A12, SIG_EXPR_LIST_PTR(GPIOT0), SIG_EXPR_LIST_PTR(RMII1TXEN), 1173 SIG_EXPR_LIST_PTR(RGMII1TXCK)); 1174 1175 #define B12 153 1176 SIG_EXPR_LIST_DECL_SINGLE(GPIOT1, GPIOT1, SIG_DESC_SET(SCUA0, 1)); 1177 SIG_EXPR_LIST_DECL_SINGLE(DASHB12, RMII1, RMII1_DESC); 1178 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXCTL, RGMII1); 1179 MS_PIN_DECL_(B12, SIG_EXPR_LIST_PTR(GPIOT1), SIG_EXPR_LIST_PTR(DASHB12), 1180 SIG_EXPR_LIST_PTR(RGMII1TXCTL)); 1181 1182 #define C12 154 1183 SIG_EXPR_LIST_DECL_SINGLE(GPIOT2, GPIOT2, SIG_DESC_SET(SCUA0, 2)); 1184 SIG_EXPR_LIST_DECL_SINGLE(RMII1TXD0, RMII1, RMII1_DESC); 1185 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD0, RGMII1); 1186 MS_PIN_DECL_(C12, SIG_EXPR_LIST_PTR(GPIOT2), SIG_EXPR_LIST_PTR(RMII1TXD0), 1187 SIG_EXPR_LIST_PTR(RGMII1TXD0)); 1188 1189 #define D12 155 1190 SIG_EXPR_LIST_DECL_SINGLE(GPIOT3, GPIOT3, SIG_DESC_SET(SCUA0, 3)); 1191 SIG_EXPR_LIST_DECL_SINGLE(RMII1TXD1, RMII1, RMII1_DESC); 1192 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD1, RGMII1); 1193 MS_PIN_DECL_(D12, SIG_EXPR_LIST_PTR(GPIOT3), SIG_EXPR_LIST_PTR(RMII1TXD1), 1194 SIG_EXPR_LIST_PTR(RGMII1TXD1)); 1195 1196 #define E12 156 1197 SIG_EXPR_LIST_DECL_SINGLE(GPIOT4, GPIOT4, SIG_DESC_SET(SCUA0, 4)); 1198 SIG_EXPR_LIST_DECL_SINGLE(DASHE12, RMII1, RMII1_DESC); 1199 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD2, RGMII1); 1200 MS_PIN_DECL_(E12, SIG_EXPR_LIST_PTR(GPIOT4), SIG_EXPR_LIST_PTR(DASHE12), 1201 SIG_EXPR_LIST_PTR(RGMII1TXD2)); 1202 1203 #define A13 157 1204 SIG_EXPR_LIST_DECL_SINGLE(GPIOT5, GPIOT5, SIG_DESC_SET(SCUA0, 5)); 1205 SIG_EXPR_LIST_DECL_SINGLE(DASHA13, RMII1, RMII1_DESC); 1206 SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD3, RGMII1); 1207 MS_PIN_DECL_(A13, SIG_EXPR_LIST_PTR(GPIOT5), SIG_EXPR_LIST_PTR(DASHA13), 1208 SIG_EXPR_LIST_PTR(RGMII1TXD3)); 1209 1210 #define RMII2_DESC SIG_DESC_BIT(HW_STRAP1, 7, 0) 1211 1212 #define D9 158 1213 SIG_EXPR_LIST_DECL_SINGLE(GPIOT6, GPIOT6, SIG_DESC_SET(SCUA0, 6)); 1214 SIG_EXPR_LIST_DECL_SINGLE(RMII2TXEN, RMII2, RMII2_DESC); 1215 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXCK, RGMII2); 1216 MS_PIN_DECL_(D9, SIG_EXPR_LIST_PTR(GPIOT6), SIG_EXPR_LIST_PTR(RMII2TXEN), 1217 SIG_EXPR_LIST_PTR(RGMII2TXCK)); 1218 1219 #define E9 159 1220 SIG_EXPR_LIST_DECL_SINGLE(GPIOT7, GPIOT7, SIG_DESC_SET(SCUA0, 7)); 1221 SIG_EXPR_LIST_DECL_SINGLE(DASHE9, RMII2, RMII2_DESC); 1222 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXCTL, RGMII2); 1223 MS_PIN_DECL_(E9, SIG_EXPR_LIST_PTR(GPIOT7), SIG_EXPR_LIST_PTR(DASHE9), 1224 SIG_EXPR_LIST_PTR(RGMII2TXCTL)); 1225 1226 #define A10 160 1227 SIG_EXPR_LIST_DECL_SINGLE(GPIOU0, GPIOU0, SIG_DESC_SET(SCUA0, 8)); 1228 SIG_EXPR_LIST_DECL_SINGLE(RMII2TXD0, RMII2, RMII2_DESC); 1229 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD0, RGMII2); 1230 MS_PIN_DECL_(A10, SIG_EXPR_LIST_PTR(GPIOU0), SIG_EXPR_LIST_PTR(RMII2TXD0), 1231 SIG_EXPR_LIST_PTR(RGMII2TXD0)); 1232 1233 #define B10 161 1234 SIG_EXPR_LIST_DECL_SINGLE(GPIOU1, GPIOU1, SIG_DESC_SET(SCUA0, 9)); 1235 SIG_EXPR_LIST_DECL_SINGLE(RMII2TXD1, RMII2, RMII2_DESC); 1236 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD1, RGMII2); 1237 MS_PIN_DECL_(B10, SIG_EXPR_LIST_PTR(GPIOU1), SIG_EXPR_LIST_PTR(RMII2TXD1), 1238 SIG_EXPR_LIST_PTR(RGMII2TXD1)); 1239 1240 #define C10 162 1241 SIG_EXPR_LIST_DECL_SINGLE(GPIOU2, GPIOU2, SIG_DESC_SET(SCUA0, 10)); 1242 SIG_EXPR_LIST_DECL_SINGLE(DASHC10, RMII2, RMII2_DESC); 1243 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD2, RGMII2); 1244 MS_PIN_DECL_(C10, SIG_EXPR_LIST_PTR(GPIOU2), SIG_EXPR_LIST_PTR(DASHC10), 1245 SIG_EXPR_LIST_PTR(RGMII2TXD2)); 1246 1247 #define D10 163 1248 SIG_EXPR_LIST_DECL_SINGLE(GPIOU3, GPIOU3, SIG_DESC_SET(SCUA0, 11)); 1249 SIG_EXPR_LIST_DECL_SINGLE(DASHD10, RMII2, RMII2_DESC); 1250 SIG_EXPR_LIST_DECL_SINGLE(RGMII2TXD3, RGMII2); 1251 MS_PIN_DECL_(D10, SIG_EXPR_LIST_PTR(GPIOU3), SIG_EXPR_LIST_PTR(DASHD10), 1252 SIG_EXPR_LIST_PTR(RGMII2TXD3)); 1253 1254 #define E11 164 1255 SIG_EXPR_LIST_DECL_SINGLE(GPIOU4, GPIOU4, SIG_DESC_SET(SCUA0, 12)); 1256 SIG_EXPR_LIST_DECL_SINGLE(RMII1RCLK, RMII1, RMII1_DESC); 1257 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXCK, RGMII1); 1258 MS_PIN_DECL_(E11, SIG_EXPR_LIST_PTR(GPIOU4), SIG_EXPR_LIST_PTR(RMII1RCLK), 1259 SIG_EXPR_LIST_PTR(RGMII1RXCK)); 1260 1261 #define D11 165 1262 SIG_EXPR_LIST_DECL_SINGLE(GPIOU5, GPIOU5, SIG_DESC_SET(SCUA0, 13)); 1263 SIG_EXPR_LIST_DECL_SINGLE(DASHD11, RMII1, RMII1_DESC); 1264 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXCTL, RGMII1); 1265 MS_PIN_DECL_(D11, SIG_EXPR_LIST_PTR(GPIOU5), SIG_EXPR_LIST_PTR(DASHD11), 1266 SIG_EXPR_LIST_PTR(RGMII1RXCTL)); 1267 1268 #define C11 166 1269 SIG_EXPR_LIST_DECL_SINGLE(GPIOU6, GPIOU6, SIG_DESC_SET(SCUA0, 14)); 1270 SIG_EXPR_LIST_DECL_SINGLE(RMII1RXD0, RMII1, RMII1_DESC); 1271 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD0, RGMII1); 1272 MS_PIN_DECL_(C11, SIG_EXPR_LIST_PTR(GPIOU6), SIG_EXPR_LIST_PTR(RMII1RXD0), 1273 SIG_EXPR_LIST_PTR(RGMII1RXD0)); 1274 1275 #define B11 167 1276 SIG_EXPR_LIST_DECL_SINGLE(GPIOU7, GPIOU7, SIG_DESC_SET(SCUA0, 15)); 1277 SIG_EXPR_LIST_DECL_SINGLE(RMII1RXD1, RMII1, RMII1_DESC); 1278 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD1, RGMII1); 1279 MS_PIN_DECL_(B11, SIG_EXPR_LIST_PTR(GPIOU7), SIG_EXPR_LIST_PTR(RMII1RXD1), 1280 SIG_EXPR_LIST_PTR(RGMII1RXD1)); 1281 1282 #define A11 168 1283 SIG_EXPR_LIST_DECL_SINGLE(GPIOV0, GPIOV0, SIG_DESC_SET(SCUA0, 16)); 1284 SIG_EXPR_LIST_DECL_SINGLE(RMII1CRSDV, RMII1, RMII1_DESC); 1285 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD2, RGMII1); 1286 MS_PIN_DECL_(A11, SIG_EXPR_LIST_PTR(GPIOV0), SIG_EXPR_LIST_PTR(RMII1CRSDV), 1287 SIG_EXPR_LIST_PTR(RGMII1RXD2)); 1288 1289 #define E10 169 1290 SIG_EXPR_LIST_DECL_SINGLE(GPIOV1, GPIOV1, SIG_DESC_SET(SCUA0, 17)); 1291 SIG_EXPR_LIST_DECL_SINGLE(RMII1RXER, RMII1, RMII1_DESC); 1292 SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD3, RGMII1); 1293 MS_PIN_DECL_(E10, SIG_EXPR_LIST_PTR(GPIOV1), SIG_EXPR_LIST_PTR(RMII1RXER), 1294 SIG_EXPR_LIST_PTR(RGMII1RXD3)); 1295 1296 #define C9 170 1297 SIG_EXPR_LIST_DECL_SINGLE(GPIOV2, GPIOV2, SIG_DESC_SET(SCUA0, 18)); 1298 SIG_EXPR_LIST_DECL_SINGLE(RMII2RCLK, RMII2, RMII2_DESC); 1299 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXCK, RGMII2); 1300 MS_PIN_DECL_(C9, SIG_EXPR_LIST_PTR(GPIOV2), SIG_EXPR_LIST_PTR(RMII2RCLK), 1301 SIG_EXPR_LIST_PTR(RGMII2RXCK)); 1302 1303 #define B9 171 1304 SIG_EXPR_LIST_DECL_SINGLE(GPIOV3, GPIOV3, SIG_DESC_SET(SCUA0, 19)); 1305 SIG_EXPR_LIST_DECL_SINGLE(DASHB9, RMII2, RMII2_DESC); 1306 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXCTL, RGMII2); 1307 MS_PIN_DECL_(B9, SIG_EXPR_LIST_PTR(GPIOV3), SIG_EXPR_LIST_PTR(DASHB9), 1308 SIG_EXPR_LIST_PTR(RGMII2RXCTL)); 1309 1310 #define A9 172 1311 SIG_EXPR_LIST_DECL_SINGLE(GPIOV4, GPIOV4, SIG_DESC_SET(SCUA0, 20)); 1312 SIG_EXPR_LIST_DECL_SINGLE(RMII2RXD0, RMII2, RMII2_DESC); 1313 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD0, RGMII2); 1314 MS_PIN_DECL_(A9, SIG_EXPR_LIST_PTR(GPIOV4), SIG_EXPR_LIST_PTR(RMII2RXD0), 1315 SIG_EXPR_LIST_PTR(RGMII2RXD0)); 1316 1317 #define E8 173 1318 SIG_EXPR_LIST_DECL_SINGLE(GPIOV5, GPIOV5, SIG_DESC_SET(SCUA0, 21)); 1319 SIG_EXPR_LIST_DECL_SINGLE(RMII2RXD1, RMII2, RMII2_DESC); 1320 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD1, RGMII2); 1321 MS_PIN_DECL_(E8, SIG_EXPR_LIST_PTR(GPIOV5), SIG_EXPR_LIST_PTR(RMII2RXD1), 1322 SIG_EXPR_LIST_PTR(RGMII2RXD1)); 1323 1324 #define D8 174 1325 SIG_EXPR_LIST_DECL_SINGLE(GPIOV6, GPIOV6, SIG_DESC_SET(SCUA0, 22)); 1326 SIG_EXPR_LIST_DECL_SINGLE(RMII2CRSDV, RMII2, RMII2_DESC); 1327 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD2, RGMII2); 1328 MS_PIN_DECL_(D8, SIG_EXPR_LIST_PTR(GPIOV6), SIG_EXPR_LIST_PTR(RMII2CRSDV), 1329 SIG_EXPR_LIST_PTR(RGMII2RXD2)); 1330 1331 #define C8 175 1332 SIG_EXPR_LIST_DECL_SINGLE(GPIOV7, GPIOV7, SIG_DESC_SET(SCUA0, 23)); 1333 SIG_EXPR_LIST_DECL_SINGLE(RMII2RXER, RMII2, RMII2_DESC); 1334 SIG_EXPR_LIST_DECL_SINGLE(RGMII2RXD3, RGMII2); 1335 MS_PIN_DECL_(C8, SIG_EXPR_LIST_PTR(GPIOV7), SIG_EXPR_LIST_PTR(RMII2RXER), 1336 SIG_EXPR_LIST_PTR(RGMII2RXD3)); 1337 1338 FUNC_GROUP_DECL(RMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11, 1339 E10); 1340 FUNC_GROUP_DECL(RGMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11, 1341 E10); 1342 1343 FUNC_GROUP_DECL(RMII2, D9, E9, A10, B10, C10, D10, C9, B9, A9, E8, D8, C8); 1344 FUNC_GROUP_DECL(RGMII2, D9, E9, A10, B10, C10, D10, C9, B9, A9, E8, D8, C8); 1345 1346 #define L5 176 1347 SIG_EXPR_LIST_DECL_SINGLE(GPIOW0, GPIOW0, SIG_DESC_SET(SCUA0, 24)); 1348 SIG_EXPR_LIST_DECL_SINGLE(ADC0, ADC0); 1349 MS_PIN_DECL_(L5, SIG_EXPR_LIST_PTR(GPIOW0), SIG_EXPR_LIST_PTR(ADC0)); 1350 FUNC_GROUP_DECL(ADC0, L5); 1351 1352 #define L4 177 1353 SIG_EXPR_LIST_DECL_SINGLE(GPIOW1, GPIOW1, SIG_DESC_SET(SCUA0, 25)); 1354 SIG_EXPR_LIST_DECL_SINGLE(ADC1, ADC1); 1355 MS_PIN_DECL_(L4, SIG_EXPR_LIST_PTR(GPIOW1), SIG_EXPR_LIST_PTR(ADC1)); 1356 FUNC_GROUP_DECL(ADC1, L4); 1357 1358 #define L3 178 1359 SIG_EXPR_LIST_DECL_SINGLE(GPIOW2, GPIOW2, SIG_DESC_SET(SCUA0, 26)); 1360 SIG_EXPR_LIST_DECL_SINGLE(ADC2, ADC2); 1361 MS_PIN_DECL_(L3, SIG_EXPR_LIST_PTR(GPIOW2), SIG_EXPR_LIST_PTR(ADC2)); 1362 FUNC_GROUP_DECL(ADC2, L3); 1363 1364 #define L2 179 1365 SIG_EXPR_LIST_DECL_SINGLE(GPIOW3, GPIOW3, SIG_DESC_SET(SCUA0, 27)); 1366 SIG_EXPR_LIST_DECL_SINGLE(ADC3, ADC3); 1367 MS_PIN_DECL_(L2, SIG_EXPR_LIST_PTR(GPIOW3), SIG_EXPR_LIST_PTR(ADC3)); 1368 FUNC_GROUP_DECL(ADC3, L2); 1369 1370 #define L1 180 1371 SIG_EXPR_LIST_DECL_SINGLE(GPIOW4, GPIOW4, SIG_DESC_SET(SCUA0, 28)); 1372 SIG_EXPR_LIST_DECL_SINGLE(ADC4, ADC4); 1373 MS_PIN_DECL_(L1, SIG_EXPR_LIST_PTR(GPIOW4), SIG_EXPR_LIST_PTR(ADC4)); 1374 FUNC_GROUP_DECL(ADC4, L1); 1375 1376 #define M5 181 1377 SIG_EXPR_LIST_DECL_SINGLE(GPIOW5, GPIOW5, SIG_DESC_SET(SCUA0, 29)); 1378 SIG_EXPR_LIST_DECL_SINGLE(ADC5, ADC5); 1379 MS_PIN_DECL_(M5, SIG_EXPR_LIST_PTR(GPIOW5), SIG_EXPR_LIST_PTR(ADC5)); 1380 FUNC_GROUP_DECL(ADC5, M5); 1381 1382 #define M4 182 1383 SIG_EXPR_LIST_DECL_SINGLE(GPIOW6, GPIOW6, SIG_DESC_SET(SCUA0, 30)); 1384 SIG_EXPR_LIST_DECL_SINGLE(ADC6, ADC6); 1385 MS_PIN_DECL_(M4, SIG_EXPR_LIST_PTR(GPIOW6), SIG_EXPR_LIST_PTR(ADC6)); 1386 FUNC_GROUP_DECL(ADC6, M4); 1387 1388 #define M3 183 1389 SIG_EXPR_LIST_DECL_SINGLE(GPIOW7, GPIOW7, SIG_DESC_SET(SCUA0, 31)); 1390 SIG_EXPR_LIST_DECL_SINGLE(ADC7, ADC7); 1391 MS_PIN_DECL_(M3, SIG_EXPR_LIST_PTR(GPIOW7), SIG_EXPR_LIST_PTR(ADC7)); 1392 FUNC_GROUP_DECL(ADC7, M3); 1393 1394 #define M2 184 1395 SIG_EXPR_LIST_DECL_SINGLE(GPIOX0, GPIOX0, SIG_DESC_SET(SCUA4, 0)); 1396 SIG_EXPR_LIST_DECL_SINGLE(ADC8, ADC8); 1397 MS_PIN_DECL_(M2, SIG_EXPR_LIST_PTR(GPIOX0), SIG_EXPR_LIST_PTR(ADC8)); 1398 FUNC_GROUP_DECL(ADC8, M2); 1399 1400 #define M1 185 1401 SIG_EXPR_LIST_DECL_SINGLE(GPIOX1, GPIOX1, SIG_DESC_SET(SCUA4, 1)); 1402 SIG_EXPR_LIST_DECL_SINGLE(ADC9, ADC9); 1403 MS_PIN_DECL_(M1, SIG_EXPR_LIST_PTR(GPIOX1), SIG_EXPR_LIST_PTR(ADC9)); 1404 FUNC_GROUP_DECL(ADC9, M1); 1405 1406 #define N5 186 1407 SIG_EXPR_LIST_DECL_SINGLE(GPIOX2, GPIOX2, SIG_DESC_SET(SCUA4, 2)); 1408 SIG_EXPR_LIST_DECL_SINGLE(ADC10, ADC10); 1409 MS_PIN_DECL_(N5, SIG_EXPR_LIST_PTR(GPIOX2), SIG_EXPR_LIST_PTR(ADC10)); 1410 FUNC_GROUP_DECL(ADC10, N5); 1411 1412 #define N4 187 1413 SIG_EXPR_LIST_DECL_SINGLE(GPIOX3, GPIOX3, SIG_DESC_SET(SCUA4, 3)); 1414 SIG_EXPR_LIST_DECL_SINGLE(ADC11, ADC11); 1415 MS_PIN_DECL_(N4, SIG_EXPR_LIST_PTR(GPIOX3), SIG_EXPR_LIST_PTR(ADC11)); 1416 FUNC_GROUP_DECL(ADC11, N4); 1417 1418 #define N3 188 1419 SIG_EXPR_LIST_DECL_SINGLE(GPIOX4, GPIOX4, SIG_DESC_SET(SCUA4, 4)); 1420 SIG_EXPR_LIST_DECL_SINGLE(ADC12, ADC12); 1421 MS_PIN_DECL_(N3, SIG_EXPR_LIST_PTR(GPIOX4), SIG_EXPR_LIST_PTR(ADC12)); 1422 FUNC_GROUP_DECL(ADC12, N3); 1423 1424 #define N2 189 1425 SIG_EXPR_LIST_DECL_SINGLE(GPIOX5, GPIOX5, SIG_DESC_SET(SCUA4, 5)); 1426 SIG_EXPR_LIST_DECL_SINGLE(ADC13, ADC13); 1427 MS_PIN_DECL_(N2, SIG_EXPR_LIST_PTR(GPIOX5), SIG_EXPR_LIST_PTR(ADC13)); 1428 FUNC_GROUP_DECL(ADC13, N2); 1429 1430 #define N1 190 1431 SIG_EXPR_LIST_DECL_SINGLE(GPIOX6, GPIOX6, SIG_DESC_SET(SCUA4, 6)); 1432 SIG_EXPR_LIST_DECL_SINGLE(ADC14, ADC14); 1433 MS_PIN_DECL_(N1, SIG_EXPR_LIST_PTR(GPIOX6), SIG_EXPR_LIST_PTR(ADC14)); 1434 FUNC_GROUP_DECL(ADC14, N1); 1435 1436 #define P5 191 1437 SIG_EXPR_LIST_DECL_SINGLE(GPIOX7, GPIOX7, SIG_DESC_SET(SCUA4, 7)); 1438 SIG_EXPR_LIST_DECL_SINGLE(ADC15, ADC15); 1439 MS_PIN_DECL_(P5, SIG_EXPR_LIST_PTR(GPIOX7), SIG_EXPR_LIST_PTR(ADC15)); 1440 FUNC_GROUP_DECL(ADC15, P5); 1441 1442 #define C21 192 1443 SIG_EXPR_DECL(SIOS3, SIOS3, SIG_DESC_SET(SCUA4, 8)); 1444 SIG_EXPR_DECL(SIOS3, ACPI, ACPI_DESC); 1445 SIG_EXPR_LIST_DECL_DUAL(SIOS3, SIOS3, ACPI); 1446 SS_PIN_DECL(C21, GPIOY0, SIOS3); 1447 FUNC_GROUP_DECL(SIOS3, C21); 1448 1449 #define F20 193 1450 SIG_EXPR_DECL(SIOS5, SIOS5, SIG_DESC_SET(SCUA4, 9)); 1451 SIG_EXPR_DECL(SIOS5, ACPI, ACPI_DESC); 1452 SIG_EXPR_LIST_DECL_DUAL(SIOS5, SIOS5, ACPI); 1453 SS_PIN_DECL(F20, GPIOY1, SIOS5); 1454 FUNC_GROUP_DECL(SIOS5, F20); 1455 1456 #define G20 194 1457 SIG_EXPR_DECL(SIOPWREQ, SIOPWREQ, SIG_DESC_SET(SCUA4, 10)); 1458 SIG_EXPR_DECL(SIOPWREQ, ACPI, ACPI_DESC); 1459 SIG_EXPR_LIST_DECL_DUAL(SIOPWREQ, SIOPWREQ, ACPI); 1460 SS_PIN_DECL(G20, GPIOY2, SIOPWREQ); 1461 FUNC_GROUP_DECL(SIOPWREQ, G20); 1462 1463 #define K20 195 1464 SIG_EXPR_DECL(SIOONCTRL, SIOONCTRL, SIG_DESC_SET(SCUA4, 11)); 1465 SIG_EXPR_DECL(SIOONCTRL, ACPI, ACPI_DESC); 1466 SIG_EXPR_LIST_DECL_DUAL(SIOONCTRL, SIOONCTRL, ACPI); 1467 SS_PIN_DECL(K20, GPIOY3, SIOONCTRL); 1468 FUNC_GROUP_DECL(SIOONCTRL, K20); 1469 1470 FUNC_GROUP_DECL(ACPI, B19, A20, D17, A19, C21, F20, G20, K20); 1471 1472 #define R22 200 1473 #define R22_DESC SIG_DESC_SET(SCUA4, 16) 1474 SIG_EXPR_DECL(ROMA2, ROM8, R22_DESC, VPOOFF0_DESC); 1475 SIG_EXPR_DECL(ROMA2, ROM16, R22_DESC, VPOOFF0_DESC); 1476 SIG_EXPR_LIST_DECL_DUAL(ROMA2, ROM8, ROM16); 1477 SIG_EXPR_DECL(VPOB0, VPO12, R22_DESC, VPO12_DESC); 1478 SIG_EXPR_DECL(VPOB0, VPO24, R22_DESC, VPO24_DESC); 1479 SIG_EXPR_DECL(VPOB0, VPOOFF1, R22_DESC, VPOOFF1_DESC); 1480 SIG_EXPR_LIST_DECL(VPOB0, SIG_EXPR_PTR(VPOB0, VPO12), 1481 SIG_EXPR_PTR(VPOB0, VPO24), SIG_EXPR_PTR(VPOB0, VPOOFF1)); 1482 MS_PIN_DECL(R22, GPIOZ0, ROMA2, VPOB0); 1483 1484 #define P18 201 1485 #define P18_DESC SIG_DESC_SET(SCUA4, 17) 1486 SIG_EXPR_DECL(ROMA3, ROM8, P18_DESC, VPOOFF0_DESC); 1487 SIG_EXPR_DECL(ROMA3, ROM16, P18_DESC, VPOOFF0_DESC); 1488 SIG_EXPR_LIST_DECL_DUAL(ROMA3, ROM8, ROM16); 1489 SIG_EXPR_DECL(VPOB1, VPO12, P18_DESC, VPO12_DESC); 1490 SIG_EXPR_DECL(VPOB1, VPO24, P18_DESC, VPO24_DESC); 1491 SIG_EXPR_DECL(VPOB1, VPOOFF1, P18_DESC, VPOOFF1_DESC); 1492 SIG_EXPR_LIST_DECL(VPOB1, SIG_EXPR_PTR(VPOB1, VPO12), 1493 SIG_EXPR_PTR(VPOB1, VPO24), SIG_EXPR_PTR(VPOB1, VPOOFF1)); 1494 MS_PIN_DECL(P18, GPIOZ1, ROMA3, VPOB1); 1495 1496 #define P19 202 1497 #define P19_DESC SIG_DESC_SET(SCUA4, 18) 1498 SIG_EXPR_DECL(ROMA4, ROM8, P19_DESC, VPOOFF0_DESC); 1499 SIG_EXPR_DECL(ROMA4, ROM16, P19_DESC, VPOOFF0_DESC); 1500 SIG_EXPR_LIST_DECL_DUAL(ROMA4, ROM8, ROM16); 1501 SIG_EXPR_DECL(VPOB2, VPO12, P19_DESC, VPO12_DESC); 1502 SIG_EXPR_DECL(VPOB2, VPO24, P19_DESC, VPO24_DESC); 1503 SIG_EXPR_DECL(VPOB2, VPOOFF1, P19_DESC, VPOOFF1_DESC); 1504 SIG_EXPR_LIST_DECL(VPOB2, SIG_EXPR_PTR(VPOB2, VPO12), 1505 SIG_EXPR_PTR(VPOB2, VPO24), SIG_EXPR_PTR(VPOB2, VPOOFF1)); 1506 MS_PIN_DECL(P19, GPIOZ2, ROMA4, VPOB2); 1507 1508 #define P20 203 1509 #define P20_DESC SIG_DESC_SET(SCUA4, 19) 1510 SIG_EXPR_DECL(ROMA5, ROM8, P20_DESC, VPOOFF0_DESC); 1511 SIG_EXPR_DECL(ROMA5, ROM16, P20_DESC, VPOOFF0_DESC); 1512 SIG_EXPR_LIST_DECL_DUAL(ROMA5, ROM8, ROM16); 1513 SIG_EXPR_DECL(VPOB3, VPO12, P20_DESC, VPO12_DESC); 1514 SIG_EXPR_DECL(VPOB3, VPO24, P20_DESC, VPO24_DESC); 1515 SIG_EXPR_DECL(VPOB3, VPOOFF1, P20_DESC, VPOOFF1_DESC); 1516 SIG_EXPR_LIST_DECL(VPOB3, SIG_EXPR_PTR(VPOB3, VPO12), 1517 SIG_EXPR_PTR(VPOB3, VPO24), SIG_EXPR_PTR(VPOB3, VPOOFF1)); 1518 MS_PIN_DECL(P20, GPIOZ3, ROMA5, VPOB3); 1519 1520 #define P21 204 1521 #define P21_DESC SIG_DESC_SET(SCUA4, 20) 1522 SIG_EXPR_DECL(ROMA6, ROM8, P21_DESC, VPOOFF0_DESC); 1523 SIG_EXPR_DECL(ROMA6, ROM16, P21_DESC, VPOOFF0_DESC); 1524 SIG_EXPR_LIST_DECL_DUAL(ROMA6, ROM8, ROM16); 1525 SIG_EXPR_DECL(VPOB4, VPO12, P21_DESC, VPO12_DESC); 1526 SIG_EXPR_DECL(VPOB4, VPO24, P21_DESC, VPO24_DESC); 1527 SIG_EXPR_DECL(VPOB4, VPOOFF1, P21_DESC, VPOOFF1_DESC); 1528 SIG_EXPR_LIST_DECL(VPOB4, SIG_EXPR_PTR(VPOB4, VPO12), 1529 SIG_EXPR_PTR(VPOB4, VPO24), SIG_EXPR_PTR(VPOB4, VPOOFF1)); 1530 MS_PIN_DECL(P21, GPIOZ4, ROMA6, VPOB4); 1531 1532 #define P22 205 1533 #define P22_DESC SIG_DESC_SET(SCUA4, 21) 1534 SIG_EXPR_DECL(ROMA7, ROM8, P22_DESC, VPOOFF0_DESC); 1535 SIG_EXPR_DECL(ROMA7, ROM16, P22_DESC, VPOOFF0_DESC); 1536 SIG_EXPR_LIST_DECL_DUAL(ROMA7, ROM8, ROM16); 1537 SIG_EXPR_DECL(VPOB5, VPO12, P22_DESC, VPO12_DESC); 1538 SIG_EXPR_DECL(VPOB5, VPO24, P22_DESC, VPO24_DESC); 1539 SIG_EXPR_DECL(VPOB5, VPOOFF1, P22_DESC, VPOOFF1_DESC); 1540 SIG_EXPR_LIST_DECL(VPOB5, SIG_EXPR_PTR(VPOB5, VPO12), 1541 SIG_EXPR_PTR(VPOB5, VPO24), SIG_EXPR_PTR(VPOB5, VPOOFF1)); 1542 MS_PIN_DECL(P22, GPIOZ5, ROMA7, VPOB5); 1543 1544 #define M19 206 1545 #define M19_DESC SIG_DESC_SET(SCUA4, 22) 1546 SIG_EXPR_DECL(ROMA8, ROM8, M19_DESC, VPOOFF0_DESC); 1547 SIG_EXPR_DECL(ROMA8, ROM16, M19_DESC, VPOOFF0_DESC); 1548 SIG_EXPR_LIST_DECL_DUAL(ROMA8, ROM8, ROM16); 1549 SIG_EXPR_DECL(VPOB6, VPO12, M19_DESC, VPO12_DESC); 1550 SIG_EXPR_DECL(VPOB6, VPO24, M19_DESC, VPO24_DESC); 1551 SIG_EXPR_DECL(VPOB6, VPOOFF1, M19_DESC, VPOOFF1_DESC); 1552 SIG_EXPR_LIST_DECL(VPOB6, SIG_EXPR_PTR(VPOB6, VPO12), 1553 SIG_EXPR_PTR(VPOB6, VPO24), SIG_EXPR_PTR(VPOB6, VPOOFF1)); 1554 MS_PIN_DECL(M19, GPIOZ6, ROMA8, VPOB6); 1555 1556 #define M20 207 1557 #define M20_DESC SIG_DESC_SET(SCUA4, 23) 1558 SIG_EXPR_DECL(ROMA9, ROM8, M20_DESC, VPOOFF0_DESC); 1559 SIG_EXPR_DECL(ROMA9, ROM16, M20_DESC, VPOOFF0_DESC); 1560 SIG_EXPR_LIST_DECL_DUAL(ROMA9, ROM8, ROM16); 1561 SIG_EXPR_DECL(VPOB7, VPO12, M20_DESC, VPO12_DESC); 1562 SIG_EXPR_DECL(VPOB7, VPO24, M20_DESC, VPO24_DESC); 1563 SIG_EXPR_DECL(VPOB7, VPOOFF1, M20_DESC, VPOOFF1_DESC); 1564 SIG_EXPR_LIST_DECL(VPOB7, SIG_EXPR_PTR(VPOB7, VPO12), 1565 SIG_EXPR_PTR(VPOB7, VPO24), SIG_EXPR_PTR(VPOB7, VPOOFF1)); 1566 MS_PIN_DECL(M20, GPIOZ7, ROMA9, VPOB7); 1567 1568 #define M21 208 1569 #define M21_DESC SIG_DESC_SET(SCUA4, 24) 1570 SIG_EXPR_DECL(ROMA10, ROM8, M21_DESC, VPOOFF0_DESC); 1571 SIG_EXPR_DECL(ROMA10, ROM16, M21_DESC, VPOOFF0_DESC); 1572 SIG_EXPR_LIST_DECL_DUAL(ROMA10, ROM8, ROM16); 1573 SIG_EXPR_DECL(VPOG0, VPO12, M21_DESC, VPO12_DESC); 1574 SIG_EXPR_DECL(VPOG0, VPO24, M21_DESC, VPO24_DESC); 1575 SIG_EXPR_DECL(VPOG0, VPOOFF1, M21_DESC, VPOOFF1_DESC); 1576 SIG_EXPR_LIST_DECL(VPOG0, SIG_EXPR_PTR(VPOG0, VPO12), 1577 SIG_EXPR_PTR(VPOG0, VPO24), SIG_EXPR_PTR(VPOG0, VPOOFF1)); 1578 MS_PIN_DECL(M21, GPIOAA0, ROMA10, VPOG0); 1579 1580 #define M22 209 1581 #define M22_DESC SIG_DESC_SET(SCUA4, 25) 1582 SIG_EXPR_DECL(ROMA11, ROM8, M22_DESC, VPOOFF0_DESC); 1583 SIG_EXPR_DECL(ROMA11, ROM16, M22_DESC, VPOOFF0_DESC); 1584 SIG_EXPR_LIST_DECL_DUAL(ROMA11, ROM8, ROM16); 1585 SIG_EXPR_DECL(VPOG1, VPO12, M22_DESC, VPO12_DESC); 1586 SIG_EXPR_DECL(VPOG1, VPO24, M22_DESC, VPO24_DESC); 1587 SIG_EXPR_DECL(VPOG1, VPOOFF1, M22_DESC, VPOOFF1_DESC); 1588 SIG_EXPR_LIST_DECL(VPOG1, SIG_EXPR_PTR(VPOG1, VPO12), 1589 SIG_EXPR_PTR(VPOG1, VPO24), SIG_EXPR_PTR(VPOG1, VPOOFF1)); 1590 MS_PIN_DECL(M22, GPIOAA1, ROMA11, VPOG1); 1591 1592 #define L18 210 1593 #define L18_DESC SIG_DESC_SET(SCUA4, 26) 1594 SIG_EXPR_DECL(ROMA12, ROM8, L18_DESC, VPOOFF0_DESC); 1595 SIG_EXPR_DECL(ROMA12, ROM16, L18_DESC, VPOOFF0_DESC); 1596 SIG_EXPR_LIST_DECL_DUAL(ROMA12, ROM8, ROM16); 1597 SIG_EXPR_DECL(VPOG2, VPO12, L18_DESC, VPO12_DESC); 1598 SIG_EXPR_DECL(VPOG2, VPO24, L18_DESC, VPO24_DESC); 1599 SIG_EXPR_DECL(VPOG2, VPOOFF1, L18_DESC, VPOOFF1_DESC); 1600 SIG_EXPR_LIST_DECL(VPOG2, SIG_EXPR_PTR(VPOG2, VPO12), 1601 SIG_EXPR_PTR(VPOG2, VPO24), SIG_EXPR_PTR(VPOG2, VPOOFF1)); 1602 MS_PIN_DECL(L18, GPIOAA2, ROMA12, VPOG2); 1603 1604 #define L19 211 1605 #define L19_DESC SIG_DESC_SET(SCUA4, 27) 1606 SIG_EXPR_DECL(ROMA13, ROM8, L19_DESC, VPOOFF0_DESC); 1607 SIG_EXPR_DECL(ROMA13, ROM16, L19_DESC, VPOOFF0_DESC); 1608 SIG_EXPR_LIST_DECL_DUAL(ROMA13, ROM8, ROM16); 1609 SIG_EXPR_DECL(VPOG3, VPO12, L19_DESC, VPO12_DESC); 1610 SIG_EXPR_DECL(VPOG3, VPO24, L19_DESC, VPO24_DESC); 1611 SIG_EXPR_DECL(VPOG3, VPOOFF1, L19_DESC, VPOOFF1_DESC); 1612 SIG_EXPR_LIST_DECL(VPOG3, SIG_EXPR_PTR(VPOG3, VPO12), 1613 SIG_EXPR_PTR(VPOG3, VPO24), SIG_EXPR_PTR(VPOG3, VPOOFF1)); 1614 MS_PIN_DECL(L19, GPIOAA3, ROMA13, VPOG3); 1615 1616 #define L20 212 1617 #define L20_DESC SIG_DESC_SET(SCUA4, 28) 1618 SIG_EXPR_DECL(ROMA14, ROM8, L20_DESC, VPO_OFF_12); 1619 SIG_EXPR_DECL(ROMA14, ROM16, L20_DESC, VPO_OFF_12); 1620 SIG_EXPR_LIST_DECL_DUAL(ROMA14, ROM8, ROM16); 1621 SIG_EXPR_DECL(VPOG4, VPO24, L20_DESC, VPO24_DESC); 1622 SIG_EXPR_DECL(VPOG4, VPOOFF1, L20_DESC, VPOOFF1_DESC); 1623 SIG_EXPR_LIST_DECL_DUAL(VPOG4, VPO24, VPOOFF1); 1624 MS_PIN_DECL(L20, GPIOAA4, ROMA14, VPOG4); 1625 1626 #define L21 213 1627 #define L21_DESC SIG_DESC_SET(SCUA4, 29) 1628 SIG_EXPR_DECL(ROMA15, ROM8, L21_DESC, VPO_OFF_12); 1629 SIG_EXPR_DECL(ROMA15, ROM16, L21_DESC, VPO_OFF_12); 1630 SIG_EXPR_LIST_DECL_DUAL(ROMA15, ROM8, ROM16); 1631 SIG_EXPR_DECL(VPOG5, VPO24, L21_DESC, VPO24_DESC); 1632 SIG_EXPR_DECL(VPOG5, VPOOFF1, L21_DESC, VPOOFF1_DESC); 1633 SIG_EXPR_LIST_DECL_DUAL(VPOG5, VPO24, VPOOFF1); 1634 MS_PIN_DECL(L21, GPIOAA5, ROMA15, VPOG5); 1635 1636 #define T18 214 1637 #define T18_DESC SIG_DESC_SET(SCUA4, 30) 1638 SIG_EXPR_DECL(ROMA16, ROM8, T18_DESC, VPO_OFF_12); 1639 SIG_EXPR_DECL(ROMA16, ROM16, T18_DESC, VPO_OFF_12); 1640 SIG_EXPR_LIST_DECL_DUAL(ROMA16, ROM8, ROM16); 1641 SIG_EXPR_DECL(VPOG6, VPO24, T18_DESC, VPO24_DESC); 1642 SIG_EXPR_DECL(VPOG6, VPOOFF1, T18_DESC, VPOOFF1_DESC); 1643 SIG_EXPR_LIST_DECL_DUAL(VPOG6, VPO24, VPOOFF1); 1644 MS_PIN_DECL(T18, GPIOAA6, ROMA16, VPOG6); 1645 1646 #define N18 215 1647 #define N18_DESC SIG_DESC_SET(SCUA4, 31) 1648 SIG_EXPR_DECL(ROMA17, ROM8, N18_DESC, VPO_OFF_12); 1649 SIG_EXPR_DECL(ROMA17, ROM16, N18_DESC, VPO_OFF_12); 1650 SIG_EXPR_LIST_DECL_DUAL(ROMA17, ROM8, ROM16); 1651 SIG_EXPR_DECL(VPOG7, VPO24, N18_DESC, VPO24_DESC); 1652 SIG_EXPR_DECL(VPOG7, VPOOFF1, N18_DESC, VPOOFF1_DESC); 1653 SIG_EXPR_LIST_DECL_DUAL(VPOG7, VPO24, VPOOFF1); 1654 MS_PIN_DECL(N18, GPIOAA7, ROMA17, VPOG7); 1655 1656 #define N19 216 1657 #define N19_DESC SIG_DESC_SET(SCUA8, 0) 1658 SIG_EXPR_DECL(ROMA18, ROM8, N19_DESC, VPO_OFF_12); 1659 SIG_EXPR_DECL(ROMA18, ROM16, N19_DESC, VPO_OFF_12); 1660 SIG_EXPR_LIST_DECL_DUAL(ROMA18, ROM8, ROM16); 1661 SIG_EXPR_DECL(VPOR0, VPO24, N19_DESC, VPO24_DESC); 1662 SIG_EXPR_DECL(VPOR0, VPOOFF1, N19_DESC, VPOOFF1_DESC); 1663 SIG_EXPR_LIST_DECL_DUAL(VPOR0, VPO24, VPOOFF1); 1664 MS_PIN_DECL(N19, GPIOAB0, ROMA18, VPOR0); 1665 1666 #define M18 217 1667 #define M18_DESC SIG_DESC_SET(SCUA8, 1) 1668 SIG_EXPR_DECL(ROMA19, ROM8, M18_DESC, VPO_OFF_12); 1669 SIG_EXPR_DECL(ROMA19, ROM16, M18_DESC, VPO_OFF_12); 1670 SIG_EXPR_LIST_DECL_DUAL(ROMA19, ROM8, ROM16); 1671 SIG_EXPR_DECL(VPOR1, VPO24, M18_DESC, VPO24_DESC); 1672 SIG_EXPR_DECL(VPOR1, VPOOFF1, M18_DESC, VPOOFF1_DESC); 1673 SIG_EXPR_LIST_DECL_DUAL(VPOR1, VPO24, VPOOFF1); 1674 MS_PIN_DECL(M18, GPIOAB1, ROMA19, VPOR1); 1675 1676 #define N22 218 1677 #define N22_DESC SIG_DESC_SET(SCUA8, 2) 1678 SIG_EXPR_DECL(ROMA20, ROM8, N22_DESC, VPO_OFF_12); 1679 SIG_EXPR_DECL(ROMA20, ROM16, N22_DESC, VPO_OFF_12); 1680 SIG_EXPR_LIST_DECL_DUAL(ROMA20, ROM8, ROM16); 1681 SIG_EXPR_DECL(VPOR2, VPO24, N22_DESC, VPO24_DESC); 1682 SIG_EXPR_DECL(VPOR2, VPOOFF1, N22_DESC, VPOOFF1_DESC); 1683 SIG_EXPR_LIST_DECL_DUAL(VPOR2, VPO24, VPOOFF1); 1684 MS_PIN_DECL(N22, GPIOAB2, ROMA20, VPOR2); 1685 1686 #define N20 219 1687 #define N20_DESC SIG_DESC_SET(SCUA8, 3) 1688 SIG_EXPR_DECL(ROMA21, ROM8, N20_DESC, VPO_OFF_12); 1689 SIG_EXPR_DECL(ROMA21, ROM16, N20_DESC, VPO_OFF_12); 1690 SIG_EXPR_LIST_DECL_DUAL(ROMA21, ROM8, ROM16); 1691 SIG_EXPR_DECL(VPOR3, VPO24, N20_DESC, VPO24_DESC); 1692 SIG_EXPR_DECL(VPOR3, VPOOFF1, N20_DESC, VPOOFF1_DESC); 1693 SIG_EXPR_LIST_DECL_DUAL(VPOR3, VPO24, VPOOFF1); 1694 MS_PIN_DECL(N20, GPIOAB3, ROMA21, VPOR3); 1695 1696 FUNC_GROUP_DECL(ROM8, V20, U21, T19, V22, U20, R18, N21, L22, K18, W21, Y22, 1697 U19, R22, P18, P19, P20, P21, P22, M19, M20, M21, M22, L18, 1698 L19, L20, L21, T18, N18, N19, M18, N22, N20); 1699 FUNC_GROUP_DECL(ROM16, V20, U21, T19, V22, U20, R18, N21, L22, K18, 1700 A8, C7, B7, A7, D7, B6, A6, E7, W21, Y22, U19, R22, P18, P19, 1701 P20, P21, P22, M19, M20, M21, M22, L18, L19, L20, L21, T18, 1702 N18, N19, M18, N22, N20); 1703 FUNC_GROUP_DECL(VPO12, U21, T19, V22, U20, R22, P18, P19, P20, P21, P22, M19, 1704 M20, M21, M22, L18, L19, L20, L21, T18, N18, N19, M18, N22, 1705 N20); 1706 FUNC_GROUP_DECL(VPO24, U21, T19, V22, U20, L22, K18, V21, W22, R22, P18, P19, 1707 P20, P21, P22, M19, M20, M21, M22, L18, L19); 1708 1709 /* Note we account for GPIOY4-GPIOY7 even though they're not valid, thus 216 1710 * pins becomes 220. 1711 */ 1712 #define ASPEED_G4_NR_PINS 220 1713 1714 /* Pins, groups and functions are sort(1):ed alphabetically for sanity */ 1715 1716 static struct pinctrl_pin_desc aspeed_g4_pins[ASPEED_G4_NR_PINS] = { 1717 ASPEED_PINCTRL_PIN(A1), 1718 ASPEED_PINCTRL_PIN(A10), 1719 ASPEED_PINCTRL_PIN(A11), 1720 ASPEED_PINCTRL_PIN(A12), 1721 ASPEED_PINCTRL_PIN(A13), 1722 ASPEED_PINCTRL_PIN(A14), 1723 ASPEED_PINCTRL_PIN(A15), 1724 ASPEED_PINCTRL_PIN(A16), 1725 ASPEED_PINCTRL_PIN(A17), 1726 ASPEED_PINCTRL_PIN(A18), 1727 ASPEED_PINCTRL_PIN(A19), 1728 ASPEED_PINCTRL_PIN(A2), 1729 ASPEED_PINCTRL_PIN(A20), 1730 ASPEED_PINCTRL_PIN(A3), 1731 ASPEED_PINCTRL_PIN(A4), 1732 ASPEED_PINCTRL_PIN(A5), 1733 ASPEED_PINCTRL_PIN(A6), 1734 ASPEED_PINCTRL_PIN(A7), 1735 ASPEED_PINCTRL_PIN(A8), 1736 ASPEED_PINCTRL_PIN(A9), 1737 ASPEED_PINCTRL_PIN(AA1), 1738 ASPEED_PINCTRL_PIN(AA2), 1739 ASPEED_PINCTRL_PIN(AA22), 1740 ASPEED_PINCTRL_PIN(AA3), 1741 ASPEED_PINCTRL_PIN(AA4), 1742 ASPEED_PINCTRL_PIN(AA5), 1743 ASPEED_PINCTRL_PIN(AA6), 1744 ASPEED_PINCTRL_PIN(AA7), 1745 ASPEED_PINCTRL_PIN(AB1), 1746 ASPEED_PINCTRL_PIN(AB2), 1747 ASPEED_PINCTRL_PIN(AB3), 1748 ASPEED_PINCTRL_PIN(AB4), 1749 ASPEED_PINCTRL_PIN(AB5), 1750 ASPEED_PINCTRL_PIN(AB6), 1751 ASPEED_PINCTRL_PIN(AB7), 1752 ASPEED_PINCTRL_PIN(B1), 1753 ASPEED_PINCTRL_PIN(B10), 1754 ASPEED_PINCTRL_PIN(B11), 1755 ASPEED_PINCTRL_PIN(B12), 1756 ASPEED_PINCTRL_PIN(B13), 1757 ASPEED_PINCTRL_PIN(B14), 1758 ASPEED_PINCTRL_PIN(B15), 1759 ASPEED_PINCTRL_PIN(B16), 1760 ASPEED_PINCTRL_PIN(B17), 1761 ASPEED_PINCTRL_PIN(B18), 1762 ASPEED_PINCTRL_PIN(B19), 1763 ASPEED_PINCTRL_PIN(B2), 1764 ASPEED_PINCTRL_PIN(B22), 1765 ASPEED_PINCTRL_PIN(B3), 1766 ASPEED_PINCTRL_PIN(B4), 1767 ASPEED_PINCTRL_PIN(B5), 1768 ASPEED_PINCTRL_PIN(B6), 1769 ASPEED_PINCTRL_PIN(B7), 1770 ASPEED_PINCTRL_PIN(B9), 1771 ASPEED_PINCTRL_PIN(C1), 1772 ASPEED_PINCTRL_PIN(C10), 1773 ASPEED_PINCTRL_PIN(C11), 1774 ASPEED_PINCTRL_PIN(C12), 1775 ASPEED_PINCTRL_PIN(C13), 1776 ASPEED_PINCTRL_PIN(C14), 1777 ASPEED_PINCTRL_PIN(C15), 1778 ASPEED_PINCTRL_PIN(C16), 1779 ASPEED_PINCTRL_PIN(C17), 1780 ASPEED_PINCTRL_PIN(C18), 1781 ASPEED_PINCTRL_PIN(C2), 1782 ASPEED_PINCTRL_PIN(C20), 1783 ASPEED_PINCTRL_PIN(C21), 1784 ASPEED_PINCTRL_PIN(C22), 1785 ASPEED_PINCTRL_PIN(C3), 1786 ASPEED_PINCTRL_PIN(C4), 1787 ASPEED_PINCTRL_PIN(C5), 1788 ASPEED_PINCTRL_PIN(C6), 1789 ASPEED_PINCTRL_PIN(C7), 1790 ASPEED_PINCTRL_PIN(C8), 1791 ASPEED_PINCTRL_PIN(C9), 1792 ASPEED_PINCTRL_PIN(D1), 1793 ASPEED_PINCTRL_PIN(D10), 1794 ASPEED_PINCTRL_PIN(D11), 1795 ASPEED_PINCTRL_PIN(D12), 1796 ASPEED_PINCTRL_PIN(D13), 1797 ASPEED_PINCTRL_PIN(D14), 1798 ASPEED_PINCTRL_PIN(D15), 1799 ASPEED_PINCTRL_PIN(D16), 1800 ASPEED_PINCTRL_PIN(D17), 1801 ASPEED_PINCTRL_PIN(D18), 1802 ASPEED_PINCTRL_PIN(D19), 1803 ASPEED_PINCTRL_PIN(D2), 1804 ASPEED_PINCTRL_PIN(D3), 1805 ASPEED_PINCTRL_PIN(D4), 1806 ASPEED_PINCTRL_PIN(D5), 1807 ASPEED_PINCTRL_PIN(D6), 1808 ASPEED_PINCTRL_PIN(D7), 1809 ASPEED_PINCTRL_PIN(D8), 1810 ASPEED_PINCTRL_PIN(D9), 1811 ASPEED_PINCTRL_PIN(E10), 1812 ASPEED_PINCTRL_PIN(E11), 1813 ASPEED_PINCTRL_PIN(E12), 1814 ASPEED_PINCTRL_PIN(E13), 1815 ASPEED_PINCTRL_PIN(E14), 1816 ASPEED_PINCTRL_PIN(E15), 1817 ASPEED_PINCTRL_PIN(E16), 1818 ASPEED_PINCTRL_PIN(E18), 1819 ASPEED_PINCTRL_PIN(E19), 1820 ASPEED_PINCTRL_PIN(E2), 1821 ASPEED_PINCTRL_PIN(E20), 1822 ASPEED_PINCTRL_PIN(E3), 1823 ASPEED_PINCTRL_PIN(E5), 1824 ASPEED_PINCTRL_PIN(E6), 1825 ASPEED_PINCTRL_PIN(E7), 1826 ASPEED_PINCTRL_PIN(E8), 1827 ASPEED_PINCTRL_PIN(E9), 1828 ASPEED_PINCTRL_PIN(F18), 1829 ASPEED_PINCTRL_PIN(F20), 1830 ASPEED_PINCTRL_PIN(F3), 1831 ASPEED_PINCTRL_PIN(F4), 1832 ASPEED_PINCTRL_PIN(F5), 1833 ASPEED_PINCTRL_PIN(G18), 1834 ASPEED_PINCTRL_PIN(G19), 1835 ASPEED_PINCTRL_PIN(G20), 1836 ASPEED_PINCTRL_PIN(G5), 1837 ASPEED_PINCTRL_PIN(H1), 1838 ASPEED_PINCTRL_PIN(H18), 1839 ASPEED_PINCTRL_PIN(H19), 1840 ASPEED_PINCTRL_PIN(H2), 1841 ASPEED_PINCTRL_PIN(H20), 1842 ASPEED_PINCTRL_PIN(H3), 1843 ASPEED_PINCTRL_PIN(H4), 1844 ASPEED_PINCTRL_PIN(J20), 1845 ASPEED_PINCTRL_PIN(J21), 1846 ASPEED_PINCTRL_PIN(J3), 1847 ASPEED_PINCTRL_PIN(J4), 1848 ASPEED_PINCTRL_PIN(J5), 1849 ASPEED_PINCTRL_PIN(K18), 1850 ASPEED_PINCTRL_PIN(K20), 1851 ASPEED_PINCTRL_PIN(K5), 1852 ASPEED_PINCTRL_PIN(L1), 1853 ASPEED_PINCTRL_PIN(L18), 1854 ASPEED_PINCTRL_PIN(L19), 1855 ASPEED_PINCTRL_PIN(L2), 1856 ASPEED_PINCTRL_PIN(L20), 1857 ASPEED_PINCTRL_PIN(L21), 1858 ASPEED_PINCTRL_PIN(L22), 1859 ASPEED_PINCTRL_PIN(L3), 1860 ASPEED_PINCTRL_PIN(L4), 1861 ASPEED_PINCTRL_PIN(L5), 1862 ASPEED_PINCTRL_PIN(M1), 1863 ASPEED_PINCTRL_PIN(M18), 1864 ASPEED_PINCTRL_PIN(M19), 1865 ASPEED_PINCTRL_PIN(M2), 1866 ASPEED_PINCTRL_PIN(M20), 1867 ASPEED_PINCTRL_PIN(M21), 1868 ASPEED_PINCTRL_PIN(M22), 1869 ASPEED_PINCTRL_PIN(M3), 1870 ASPEED_PINCTRL_PIN(M4), 1871 ASPEED_PINCTRL_PIN(M5), 1872 ASPEED_PINCTRL_PIN(N1), 1873 ASPEED_PINCTRL_PIN(N18), 1874 ASPEED_PINCTRL_PIN(N19), 1875 ASPEED_PINCTRL_PIN(N2), 1876 ASPEED_PINCTRL_PIN(N20), 1877 ASPEED_PINCTRL_PIN(N21), 1878 ASPEED_PINCTRL_PIN(N22), 1879 ASPEED_PINCTRL_PIN(N3), 1880 ASPEED_PINCTRL_PIN(N4), 1881 ASPEED_PINCTRL_PIN(N5), 1882 ASPEED_PINCTRL_PIN(P18), 1883 ASPEED_PINCTRL_PIN(P19), 1884 ASPEED_PINCTRL_PIN(P20), 1885 ASPEED_PINCTRL_PIN(P21), 1886 ASPEED_PINCTRL_PIN(P22), 1887 ASPEED_PINCTRL_PIN(P5), 1888 ASPEED_PINCTRL_PIN(R18), 1889 ASPEED_PINCTRL_PIN(R22), 1890 ASPEED_PINCTRL_PIN(T1), 1891 ASPEED_PINCTRL_PIN(T18), 1892 ASPEED_PINCTRL_PIN(T19), 1893 ASPEED_PINCTRL_PIN(T2), 1894 ASPEED_PINCTRL_PIN(T4), 1895 ASPEED_PINCTRL_PIN(T5), 1896 ASPEED_PINCTRL_PIN(U1), 1897 ASPEED_PINCTRL_PIN(U18), 1898 ASPEED_PINCTRL_PIN(U19), 1899 ASPEED_PINCTRL_PIN(U2), 1900 ASPEED_PINCTRL_PIN(U20), 1901 ASPEED_PINCTRL_PIN(U21), 1902 ASPEED_PINCTRL_PIN(U3), 1903 ASPEED_PINCTRL_PIN(U4), 1904 ASPEED_PINCTRL_PIN(U5), 1905 ASPEED_PINCTRL_PIN(V1), 1906 ASPEED_PINCTRL_PIN(V2), 1907 ASPEED_PINCTRL_PIN(V20), 1908 ASPEED_PINCTRL_PIN(V21), 1909 ASPEED_PINCTRL_PIN(V22), 1910 ASPEED_PINCTRL_PIN(V3), 1911 ASPEED_PINCTRL_PIN(V4), 1912 ASPEED_PINCTRL_PIN(V5), 1913 ASPEED_PINCTRL_PIN(V6), 1914 ASPEED_PINCTRL_PIN(V7), 1915 ASPEED_PINCTRL_PIN(W1), 1916 ASPEED_PINCTRL_PIN(W2), 1917 ASPEED_PINCTRL_PIN(W21), 1918 ASPEED_PINCTRL_PIN(W22), 1919 ASPEED_PINCTRL_PIN(W3), 1920 ASPEED_PINCTRL_PIN(W4), 1921 ASPEED_PINCTRL_PIN(W5), 1922 ASPEED_PINCTRL_PIN(W6), 1923 ASPEED_PINCTRL_PIN(W7), 1924 ASPEED_PINCTRL_PIN(Y1), 1925 ASPEED_PINCTRL_PIN(Y2), 1926 ASPEED_PINCTRL_PIN(Y21), 1927 ASPEED_PINCTRL_PIN(Y22), 1928 ASPEED_PINCTRL_PIN(Y3), 1929 ASPEED_PINCTRL_PIN(Y4), 1930 ASPEED_PINCTRL_PIN(Y5), 1931 ASPEED_PINCTRL_PIN(Y6), 1932 ASPEED_PINCTRL_PIN(Y7), 1933 }; 1934 1935 static const struct aspeed_pin_group aspeed_g4_groups[] = { 1936 ASPEED_PINCTRL_GROUP(ACPI), 1937 ASPEED_PINCTRL_GROUP(ADC0), 1938 ASPEED_PINCTRL_GROUP(ADC1), 1939 ASPEED_PINCTRL_GROUP(ADC10), 1940 ASPEED_PINCTRL_GROUP(ADC11), 1941 ASPEED_PINCTRL_GROUP(ADC12), 1942 ASPEED_PINCTRL_GROUP(ADC13), 1943 ASPEED_PINCTRL_GROUP(ADC14), 1944 ASPEED_PINCTRL_GROUP(ADC15), 1945 ASPEED_PINCTRL_GROUP(ADC2), 1946 ASPEED_PINCTRL_GROUP(ADC3), 1947 ASPEED_PINCTRL_GROUP(ADC4), 1948 ASPEED_PINCTRL_GROUP(ADC5), 1949 ASPEED_PINCTRL_GROUP(ADC6), 1950 ASPEED_PINCTRL_GROUP(ADC7), 1951 ASPEED_PINCTRL_GROUP(ADC8), 1952 ASPEED_PINCTRL_GROUP(ADC9), 1953 ASPEED_PINCTRL_GROUP(BMCINT), 1954 ASPEED_PINCTRL_GROUP(DDCCLK), 1955 ASPEED_PINCTRL_GROUP(DDCDAT), 1956 ASPEED_PINCTRL_GROUP(EXTRST), 1957 ASPEED_PINCTRL_GROUP(FLACK), 1958 ASPEED_PINCTRL_GROUP(FLBUSY), 1959 ASPEED_PINCTRL_GROUP(FLWP), 1960 ASPEED_PINCTRL_GROUP(GPID), 1961 ASPEED_PINCTRL_GROUP(GPID0), 1962 ASPEED_PINCTRL_GROUP(GPID2), 1963 ASPEED_PINCTRL_GROUP(GPID4), 1964 ASPEED_PINCTRL_GROUP(GPID6), 1965 ASPEED_PINCTRL_GROUP(GPIE0), 1966 ASPEED_PINCTRL_GROUP(GPIE2), 1967 ASPEED_PINCTRL_GROUP(GPIE4), 1968 ASPEED_PINCTRL_GROUP(GPIE6), 1969 ASPEED_PINCTRL_GROUP(I2C10), 1970 ASPEED_PINCTRL_GROUP(I2C11), 1971 ASPEED_PINCTRL_GROUP(I2C12), 1972 ASPEED_PINCTRL_GROUP(I2C13), 1973 ASPEED_PINCTRL_GROUP(I2C14), 1974 ASPEED_PINCTRL_GROUP(I2C3), 1975 ASPEED_PINCTRL_GROUP(I2C4), 1976 ASPEED_PINCTRL_GROUP(I2C5), 1977 ASPEED_PINCTRL_GROUP(I2C6), 1978 ASPEED_PINCTRL_GROUP(I2C7), 1979 ASPEED_PINCTRL_GROUP(I2C8), 1980 ASPEED_PINCTRL_GROUP(I2C9), 1981 ASPEED_PINCTRL_GROUP(LPCPD), 1982 ASPEED_PINCTRL_GROUP(LPCPME), 1983 ASPEED_PINCTRL_GROUP(LPCRST), 1984 ASPEED_PINCTRL_GROUP(LPCSMI), 1985 ASPEED_PINCTRL_GROUP(MAC1LINK), 1986 ASPEED_PINCTRL_GROUP(MAC2LINK), 1987 ASPEED_PINCTRL_GROUP(MDIO1), 1988 ASPEED_PINCTRL_GROUP(MDIO2), 1989 ASPEED_PINCTRL_GROUP(NCTS1), 1990 ASPEED_PINCTRL_GROUP(NCTS2), 1991 ASPEED_PINCTRL_GROUP(NCTS3), 1992 ASPEED_PINCTRL_GROUP(NCTS4), 1993 ASPEED_PINCTRL_GROUP(NDCD1), 1994 ASPEED_PINCTRL_GROUP(NDCD2), 1995 ASPEED_PINCTRL_GROUP(NDCD3), 1996 ASPEED_PINCTRL_GROUP(NDCD4), 1997 ASPEED_PINCTRL_GROUP(NDSR1), 1998 ASPEED_PINCTRL_GROUP(NDSR2), 1999 ASPEED_PINCTRL_GROUP(NDSR3), 2000 ASPEED_PINCTRL_GROUP(NDSR4), 2001 ASPEED_PINCTRL_GROUP(NDTR1), 2002 ASPEED_PINCTRL_GROUP(NDTR2), 2003 ASPEED_PINCTRL_GROUP(NDTR3), 2004 ASPEED_PINCTRL_GROUP(NDTR4), 2005 ASPEED_PINCTRL_GROUP(NDTS4), 2006 ASPEED_PINCTRL_GROUP(NRI1), 2007 ASPEED_PINCTRL_GROUP(NRI2), 2008 ASPEED_PINCTRL_GROUP(NRI3), 2009 ASPEED_PINCTRL_GROUP(NRI4), 2010 ASPEED_PINCTRL_GROUP(NRTS1), 2011 ASPEED_PINCTRL_GROUP(NRTS2), 2012 ASPEED_PINCTRL_GROUP(NRTS3), 2013 ASPEED_PINCTRL_GROUP(OSCCLK), 2014 ASPEED_PINCTRL_GROUP(PWM0), 2015 ASPEED_PINCTRL_GROUP(PWM1), 2016 ASPEED_PINCTRL_GROUP(PWM2), 2017 ASPEED_PINCTRL_GROUP(PWM3), 2018 ASPEED_PINCTRL_GROUP(PWM4), 2019 ASPEED_PINCTRL_GROUP(PWM5), 2020 ASPEED_PINCTRL_GROUP(PWM6), 2021 ASPEED_PINCTRL_GROUP(PWM7), 2022 ASPEED_PINCTRL_GROUP(RGMII1), 2023 ASPEED_PINCTRL_GROUP(RGMII2), 2024 ASPEED_PINCTRL_GROUP(RMII1), 2025 ASPEED_PINCTRL_GROUP(RMII2), 2026 ASPEED_PINCTRL_GROUP(ROM16), 2027 ASPEED_PINCTRL_GROUP(ROM8), 2028 ASPEED_PINCTRL_GROUP(ROMCS1), 2029 ASPEED_PINCTRL_GROUP(ROMCS2), 2030 ASPEED_PINCTRL_GROUP(ROMCS3), 2031 ASPEED_PINCTRL_GROUP(ROMCS4), 2032 ASPEED_PINCTRL_GROUP(RXD1), 2033 ASPEED_PINCTRL_GROUP(RXD2), 2034 ASPEED_PINCTRL_GROUP(RXD3), 2035 ASPEED_PINCTRL_GROUP(RXD4), 2036 ASPEED_PINCTRL_GROUP(SALT1), 2037 ASPEED_PINCTRL_GROUP(SALT2), 2038 ASPEED_PINCTRL_GROUP(SALT3), 2039 ASPEED_PINCTRL_GROUP(SALT4), 2040 ASPEED_PINCTRL_GROUP(SD1), 2041 ASPEED_PINCTRL_GROUP(SD2), 2042 ASPEED_PINCTRL_GROUP(SGPMCK), 2043 ASPEED_PINCTRL_GROUP(SGPMI), 2044 ASPEED_PINCTRL_GROUP(SGPMLD), 2045 ASPEED_PINCTRL_GROUP(SGPMO), 2046 ASPEED_PINCTRL_GROUP(SGPSCK), 2047 ASPEED_PINCTRL_GROUP(SGPSI0), 2048 ASPEED_PINCTRL_GROUP(SGPSI1), 2049 ASPEED_PINCTRL_GROUP(SGPSLD), 2050 ASPEED_PINCTRL_GROUP(SIOONCTRL), 2051 ASPEED_PINCTRL_GROUP(SIOPBI), 2052 ASPEED_PINCTRL_GROUP(SIOPBO), 2053 ASPEED_PINCTRL_GROUP(SIOPWREQ), 2054 ASPEED_PINCTRL_GROUP(SIOPWRGD), 2055 ASPEED_PINCTRL_GROUP(SIOS3), 2056 ASPEED_PINCTRL_GROUP(SIOS5), 2057 ASPEED_PINCTRL_GROUP(SIOSCI), 2058 ASPEED_PINCTRL_GROUP(SPI1), 2059 ASPEED_PINCTRL_GROUP(SPI1DEBUG), 2060 ASPEED_PINCTRL_GROUP(SPI1PASSTHRU), 2061 ASPEED_PINCTRL_GROUP(SPICS1), 2062 ASPEED_PINCTRL_GROUP(TIMER3), 2063 ASPEED_PINCTRL_GROUP(TIMER4), 2064 ASPEED_PINCTRL_GROUP(TIMER5), 2065 ASPEED_PINCTRL_GROUP(TIMER6), 2066 ASPEED_PINCTRL_GROUP(TIMER7), 2067 ASPEED_PINCTRL_GROUP(TIMER8), 2068 ASPEED_PINCTRL_GROUP(TXD1), 2069 ASPEED_PINCTRL_GROUP(TXD2), 2070 ASPEED_PINCTRL_GROUP(TXD3), 2071 ASPEED_PINCTRL_GROUP(TXD4), 2072 ASPEED_PINCTRL_GROUP(UART6), 2073 ASPEED_PINCTRL_GROUP(USBCKI), 2074 ASPEED_PINCTRL_GROUP(VGABIOS_ROM), 2075 ASPEED_PINCTRL_GROUP(VGAHS), 2076 ASPEED_PINCTRL_GROUP(VGAVS), 2077 ASPEED_PINCTRL_GROUP(VPI18), 2078 ASPEED_PINCTRL_GROUP(VPI24), 2079 ASPEED_PINCTRL_GROUP(VPI30), 2080 ASPEED_PINCTRL_GROUP(VPO12), 2081 ASPEED_PINCTRL_GROUP(VPO24), 2082 ASPEED_PINCTRL_GROUP(WDTRST1), 2083 ASPEED_PINCTRL_GROUP(WDTRST2), 2084 }; 2085 2086 static const struct aspeed_pin_function aspeed_g4_functions[] = { 2087 ASPEED_PINCTRL_FUNC(ACPI), 2088 ASPEED_PINCTRL_FUNC(ADC0), 2089 ASPEED_PINCTRL_FUNC(ADC1), 2090 ASPEED_PINCTRL_FUNC(ADC10), 2091 ASPEED_PINCTRL_FUNC(ADC11), 2092 ASPEED_PINCTRL_FUNC(ADC12), 2093 ASPEED_PINCTRL_FUNC(ADC13), 2094 ASPEED_PINCTRL_FUNC(ADC14), 2095 ASPEED_PINCTRL_FUNC(ADC15), 2096 ASPEED_PINCTRL_FUNC(ADC2), 2097 ASPEED_PINCTRL_FUNC(ADC3), 2098 ASPEED_PINCTRL_FUNC(ADC4), 2099 ASPEED_PINCTRL_FUNC(ADC5), 2100 ASPEED_PINCTRL_FUNC(ADC6), 2101 ASPEED_PINCTRL_FUNC(ADC7), 2102 ASPEED_PINCTRL_FUNC(ADC8), 2103 ASPEED_PINCTRL_FUNC(ADC9), 2104 ASPEED_PINCTRL_FUNC(BMCINT), 2105 ASPEED_PINCTRL_FUNC(DDCCLK), 2106 ASPEED_PINCTRL_FUNC(DDCDAT), 2107 ASPEED_PINCTRL_FUNC(EXTRST), 2108 ASPEED_PINCTRL_FUNC(FLACK), 2109 ASPEED_PINCTRL_FUNC(FLBUSY), 2110 ASPEED_PINCTRL_FUNC(FLWP), 2111 ASPEED_PINCTRL_FUNC(GPID), 2112 ASPEED_PINCTRL_FUNC(GPID0), 2113 ASPEED_PINCTRL_FUNC(GPID2), 2114 ASPEED_PINCTRL_FUNC(GPID4), 2115 ASPEED_PINCTRL_FUNC(GPID6), 2116 ASPEED_PINCTRL_FUNC(GPIE0), 2117 ASPEED_PINCTRL_FUNC(GPIE2), 2118 ASPEED_PINCTRL_FUNC(GPIE4), 2119 ASPEED_PINCTRL_FUNC(GPIE6), 2120 ASPEED_PINCTRL_FUNC(I2C10), 2121 ASPEED_PINCTRL_FUNC(I2C11), 2122 ASPEED_PINCTRL_FUNC(I2C12), 2123 ASPEED_PINCTRL_FUNC(I2C13), 2124 ASPEED_PINCTRL_FUNC(I2C14), 2125 ASPEED_PINCTRL_FUNC(I2C3), 2126 ASPEED_PINCTRL_FUNC(I2C4), 2127 ASPEED_PINCTRL_FUNC(I2C5), 2128 ASPEED_PINCTRL_FUNC(I2C6), 2129 ASPEED_PINCTRL_FUNC(I2C7), 2130 ASPEED_PINCTRL_FUNC(I2C8), 2131 ASPEED_PINCTRL_FUNC(I2C9), 2132 ASPEED_PINCTRL_FUNC(LPCPD), 2133 ASPEED_PINCTRL_FUNC(LPCPME), 2134 ASPEED_PINCTRL_FUNC(LPCRST), 2135 ASPEED_PINCTRL_FUNC(LPCSMI), 2136 ASPEED_PINCTRL_FUNC(MAC1LINK), 2137 ASPEED_PINCTRL_FUNC(MAC2LINK), 2138 ASPEED_PINCTRL_FUNC(MDIO1), 2139 ASPEED_PINCTRL_FUNC(MDIO2), 2140 ASPEED_PINCTRL_FUNC(NCTS1), 2141 ASPEED_PINCTRL_FUNC(NCTS2), 2142 ASPEED_PINCTRL_FUNC(NCTS3), 2143 ASPEED_PINCTRL_FUNC(NCTS4), 2144 ASPEED_PINCTRL_FUNC(NDCD1), 2145 ASPEED_PINCTRL_FUNC(NDCD2), 2146 ASPEED_PINCTRL_FUNC(NDCD3), 2147 ASPEED_PINCTRL_FUNC(NDCD4), 2148 ASPEED_PINCTRL_FUNC(NDSR1), 2149 ASPEED_PINCTRL_FUNC(NDSR2), 2150 ASPEED_PINCTRL_FUNC(NDSR3), 2151 ASPEED_PINCTRL_FUNC(NDSR4), 2152 ASPEED_PINCTRL_FUNC(NDTR1), 2153 ASPEED_PINCTRL_FUNC(NDTR2), 2154 ASPEED_PINCTRL_FUNC(NDTR3), 2155 ASPEED_PINCTRL_FUNC(NDTR4), 2156 ASPEED_PINCTRL_FUNC(NDTS4), 2157 ASPEED_PINCTRL_FUNC(NRI1), 2158 ASPEED_PINCTRL_FUNC(NRI2), 2159 ASPEED_PINCTRL_FUNC(NRI3), 2160 ASPEED_PINCTRL_FUNC(NRI4), 2161 ASPEED_PINCTRL_FUNC(NRTS1), 2162 ASPEED_PINCTRL_FUNC(NRTS2), 2163 ASPEED_PINCTRL_FUNC(NRTS3), 2164 ASPEED_PINCTRL_FUNC(OSCCLK), 2165 ASPEED_PINCTRL_FUNC(PWM0), 2166 ASPEED_PINCTRL_FUNC(PWM1), 2167 ASPEED_PINCTRL_FUNC(PWM2), 2168 ASPEED_PINCTRL_FUNC(PWM3), 2169 ASPEED_PINCTRL_FUNC(PWM4), 2170 ASPEED_PINCTRL_FUNC(PWM5), 2171 ASPEED_PINCTRL_FUNC(PWM6), 2172 ASPEED_PINCTRL_FUNC(PWM7), 2173 ASPEED_PINCTRL_FUNC(RGMII1), 2174 ASPEED_PINCTRL_FUNC(RGMII2), 2175 ASPEED_PINCTRL_FUNC(RMII1), 2176 ASPEED_PINCTRL_FUNC(RMII2), 2177 ASPEED_PINCTRL_FUNC(ROM16), 2178 ASPEED_PINCTRL_FUNC(ROM8), 2179 ASPEED_PINCTRL_FUNC(ROMCS1), 2180 ASPEED_PINCTRL_FUNC(ROMCS2), 2181 ASPEED_PINCTRL_FUNC(ROMCS3), 2182 ASPEED_PINCTRL_FUNC(ROMCS4), 2183 ASPEED_PINCTRL_FUNC(RXD1), 2184 ASPEED_PINCTRL_FUNC(RXD2), 2185 ASPEED_PINCTRL_FUNC(RXD3), 2186 ASPEED_PINCTRL_FUNC(RXD4), 2187 ASPEED_PINCTRL_FUNC(SALT1), 2188 ASPEED_PINCTRL_FUNC(SALT2), 2189 ASPEED_PINCTRL_FUNC(SALT3), 2190 ASPEED_PINCTRL_FUNC(SALT4), 2191 ASPEED_PINCTRL_FUNC(SD1), 2192 ASPEED_PINCTRL_FUNC(SD2), 2193 ASPEED_PINCTRL_FUNC(SGPMCK), 2194 ASPEED_PINCTRL_FUNC(SGPMI), 2195 ASPEED_PINCTRL_FUNC(SGPMLD), 2196 ASPEED_PINCTRL_FUNC(SGPMO), 2197 ASPEED_PINCTRL_FUNC(SGPSCK), 2198 ASPEED_PINCTRL_FUNC(SGPSI0), 2199 ASPEED_PINCTRL_FUNC(SGPSI1), 2200 ASPEED_PINCTRL_FUNC(SGPSLD), 2201 ASPEED_PINCTRL_FUNC(SIOONCTRL), 2202 ASPEED_PINCTRL_FUNC(SIOPBI), 2203 ASPEED_PINCTRL_FUNC(SIOPBO), 2204 ASPEED_PINCTRL_FUNC(SIOPWREQ), 2205 ASPEED_PINCTRL_FUNC(SIOPWRGD), 2206 ASPEED_PINCTRL_FUNC(SIOS3), 2207 ASPEED_PINCTRL_FUNC(SIOS5), 2208 ASPEED_PINCTRL_FUNC(SIOSCI), 2209 ASPEED_PINCTRL_FUNC(SPI1), 2210 ASPEED_PINCTRL_FUNC(SPI1DEBUG), 2211 ASPEED_PINCTRL_FUNC(SPI1PASSTHRU), 2212 ASPEED_PINCTRL_FUNC(SPICS1), 2213 ASPEED_PINCTRL_FUNC(TIMER3), 2214 ASPEED_PINCTRL_FUNC(TIMER4), 2215 ASPEED_PINCTRL_FUNC(TIMER5), 2216 ASPEED_PINCTRL_FUNC(TIMER6), 2217 ASPEED_PINCTRL_FUNC(TIMER7), 2218 ASPEED_PINCTRL_FUNC(TIMER8), 2219 ASPEED_PINCTRL_FUNC(TXD1), 2220 ASPEED_PINCTRL_FUNC(TXD2), 2221 ASPEED_PINCTRL_FUNC(TXD3), 2222 ASPEED_PINCTRL_FUNC(TXD4), 2223 ASPEED_PINCTRL_FUNC(UART6), 2224 ASPEED_PINCTRL_FUNC(USBCKI), 2225 ASPEED_PINCTRL_FUNC(VGABIOS_ROM), 2226 ASPEED_PINCTRL_FUNC(VGAHS), 2227 ASPEED_PINCTRL_FUNC(VGAVS), 2228 ASPEED_PINCTRL_FUNC(VPI18), 2229 ASPEED_PINCTRL_FUNC(VPI24), 2230 ASPEED_PINCTRL_FUNC(VPI30), 2231 ASPEED_PINCTRL_FUNC(VPO12), 2232 ASPEED_PINCTRL_FUNC(VPO24), 2233 ASPEED_PINCTRL_FUNC(WDTRST1), 2234 ASPEED_PINCTRL_FUNC(WDTRST2), 2235 }; 2236 2237 static const struct aspeed_pin_config aspeed_g4_configs[] = { 2238 /* GPIO banks ranges [A, B], [D, J], [M, R] */ 2239 { PIN_CONFIG_BIAS_PULL_DOWN, { D6, D5 }, SCU8C, 16 }, 2240 { PIN_CONFIG_BIAS_DISABLE, { D6, D5 }, SCU8C, 16 }, 2241 { PIN_CONFIG_BIAS_PULL_DOWN, { J21, E18 }, SCU8C, 17 }, 2242 { PIN_CONFIG_BIAS_DISABLE, { J21, E18 }, SCU8C, 17 }, 2243 { PIN_CONFIG_BIAS_PULL_DOWN, { A18, E15 }, SCU8C, 19 }, 2244 { PIN_CONFIG_BIAS_DISABLE, { A18, E15 }, SCU8C, 19 }, 2245 { PIN_CONFIG_BIAS_PULL_DOWN, { D15, B14 }, SCU8C, 20 }, 2246 { PIN_CONFIG_BIAS_DISABLE, { D15, B14 }, SCU8C, 20 }, 2247 { PIN_CONFIG_BIAS_PULL_DOWN, { D18, C17 }, SCU8C, 21 }, 2248 { PIN_CONFIG_BIAS_DISABLE, { D18, C17 }, SCU8C, 21 }, 2249 { PIN_CONFIG_BIAS_PULL_DOWN, { A14, U18 }, SCU8C, 22 }, 2250 { PIN_CONFIG_BIAS_DISABLE, { A14, U18 }, SCU8C, 22 }, 2251 { PIN_CONFIG_BIAS_PULL_DOWN, { A8, E7 }, SCU8C, 23 }, 2252 { PIN_CONFIG_BIAS_DISABLE, { A8, E7 }, SCU8C, 23 }, 2253 { PIN_CONFIG_BIAS_PULL_DOWN, { C22, E20 }, SCU8C, 24 }, 2254 { PIN_CONFIG_BIAS_DISABLE, { C22, E20 }, SCU8C, 24 }, 2255 { PIN_CONFIG_BIAS_PULL_DOWN, { J5, T1 }, SCU8C, 25 }, 2256 { PIN_CONFIG_BIAS_DISABLE, { J5, T1 }, SCU8C, 25 }, 2257 { PIN_CONFIG_BIAS_PULL_DOWN, { U1, U5 }, SCU8C, 26 }, 2258 { PIN_CONFIG_BIAS_DISABLE, { U1, U5 }, SCU8C, 26 }, 2259 { PIN_CONFIG_BIAS_PULL_DOWN, { V3, V5 }, SCU8C, 27 }, 2260 { PIN_CONFIG_BIAS_DISABLE, { V3, V5 }, SCU8C, 27 }, 2261 { PIN_CONFIG_BIAS_PULL_DOWN, { W4, AB2 }, SCU8C, 28 }, 2262 { PIN_CONFIG_BIAS_DISABLE, { W4, AB2 }, SCU8C, 28 }, 2263 { PIN_CONFIG_BIAS_PULL_DOWN, { V6, V7 }, SCU8C, 29 }, 2264 { PIN_CONFIG_BIAS_DISABLE, { V6, V7 }, SCU8C, 29 }, 2265 { PIN_CONFIG_BIAS_PULL_DOWN, { Y6, AB7 }, SCU8C, 30 }, 2266 { PIN_CONFIG_BIAS_DISABLE, { Y6, AB7 }, SCU8C, 30 }, 2267 { PIN_CONFIG_BIAS_PULL_DOWN, { V20, A5 }, SCU8C, 31 }, 2268 { PIN_CONFIG_BIAS_DISABLE, { V20, A5 }, SCU8C, 31 }, 2269 2270 /* GPIOs T[0-5] (RGMII1 Tx pins) */ 2271 { PIN_CONFIG_DRIVE_STRENGTH, { A12, A13 }, SCU90, 9 }, 2272 { PIN_CONFIG_BIAS_PULL_DOWN, { A12, A13 }, SCU90, 12 }, 2273 { PIN_CONFIG_BIAS_DISABLE, { A12, A13 }, SCU90, 12 }, 2274 2275 /* GPIOs T[6-7], U[0-3] (RGMII2 TX pins) */ 2276 { PIN_CONFIG_DRIVE_STRENGTH, { D9, D10 }, SCU90, 11 }, 2277 { PIN_CONFIG_BIAS_PULL_DOWN, { D9, D10 }, SCU90, 14 }, 2278 { PIN_CONFIG_BIAS_DISABLE, { D9, D10 }, SCU90, 14 }, 2279 2280 /* GPIOs U[4-7], V[0-1] (RGMII1 Rx pins) */ 2281 { PIN_CONFIG_BIAS_PULL_DOWN, { E11, E10 }, SCU90, 13 }, 2282 { PIN_CONFIG_BIAS_DISABLE, { E11, E10 }, SCU90, 13 }, 2283 2284 /* GPIOs V[2-7] (RGMII2 Rx pins) */ 2285 { PIN_CONFIG_BIAS_PULL_DOWN, { C9, C8 }, SCU90, 15 }, 2286 { PIN_CONFIG_BIAS_DISABLE, { C9, C8 }, SCU90, 15 }, 2287 2288 /* ADC pull-downs (SCUA8[19:4]) */ 2289 { PIN_CONFIG_BIAS_PULL_DOWN, { L5, L5 }, SCUA8, 4 }, 2290 { PIN_CONFIG_BIAS_DISABLE, { L5, L5 }, SCUA8, 4 }, 2291 { PIN_CONFIG_BIAS_PULL_DOWN, { L4, L4 }, SCUA8, 5 }, 2292 { PIN_CONFIG_BIAS_DISABLE, { L4, L4 }, SCUA8, 5 }, 2293 { PIN_CONFIG_BIAS_PULL_DOWN, { L3, L3 }, SCUA8, 6 }, 2294 { PIN_CONFIG_BIAS_DISABLE, { L3, L3 }, SCUA8, 6 }, 2295 { PIN_CONFIG_BIAS_PULL_DOWN, { L2, L2 }, SCUA8, 7 }, 2296 { PIN_CONFIG_BIAS_DISABLE, { L2, L2 }, SCUA8, 7 }, 2297 { PIN_CONFIG_BIAS_PULL_DOWN, { L1, L1 }, SCUA8, 8 }, 2298 { PIN_CONFIG_BIAS_DISABLE, { L1, L1 }, SCUA8, 8 }, 2299 { PIN_CONFIG_BIAS_PULL_DOWN, { M5, M5 }, SCUA8, 9 }, 2300 { PIN_CONFIG_BIAS_DISABLE, { M5, M5 }, SCUA8, 9 }, 2301 { PIN_CONFIG_BIAS_PULL_DOWN, { M4, M4 }, SCUA8, 10 }, 2302 { PIN_CONFIG_BIAS_DISABLE, { M4, M4 }, SCUA8, 10 }, 2303 { PIN_CONFIG_BIAS_PULL_DOWN, { M3, M3 }, SCUA8, 11 }, 2304 { PIN_CONFIG_BIAS_DISABLE, { M3, M3 }, SCUA8, 11 }, 2305 { PIN_CONFIG_BIAS_PULL_DOWN, { M2, M2 }, SCUA8, 12 }, 2306 { PIN_CONFIG_BIAS_DISABLE, { M2, M2 }, SCUA8, 12 }, 2307 { PIN_CONFIG_BIAS_PULL_DOWN, { M1, M1 }, SCUA8, 13 }, 2308 { PIN_CONFIG_BIAS_DISABLE, { M1, M1 }, SCUA8, 13 }, 2309 { PIN_CONFIG_BIAS_PULL_DOWN, { N5, N5 }, SCUA8, 14 }, 2310 { PIN_CONFIG_BIAS_DISABLE, { N5, N5 }, SCUA8, 14 }, 2311 { PIN_CONFIG_BIAS_PULL_DOWN, { N4, N4 }, SCUA8, 15 }, 2312 { PIN_CONFIG_BIAS_DISABLE, { N4, N4 }, SCUA8, 15 }, 2313 { PIN_CONFIG_BIAS_PULL_DOWN, { N3, N3 }, SCUA8, 16 }, 2314 { PIN_CONFIG_BIAS_DISABLE, { N3, N3 }, SCUA8, 16 }, 2315 { PIN_CONFIG_BIAS_PULL_DOWN, { N2, N2 }, SCUA8, 17 }, 2316 { PIN_CONFIG_BIAS_DISABLE, { N2, N2 }, SCUA8, 17 }, 2317 { PIN_CONFIG_BIAS_PULL_DOWN, { N1, N1 }, SCUA8, 18 }, 2318 { PIN_CONFIG_BIAS_DISABLE, { N1, N1 }, SCUA8, 18 }, 2319 { PIN_CONFIG_BIAS_PULL_DOWN, { P5, P5 }, SCUA8, 19 }, 2320 { PIN_CONFIG_BIAS_DISABLE, { P5, P5 }, SCUA8, 19 }, 2321 2322 /* 2323 * Debounce settings for GPIOs D and E passthrough mode are in 2324 * SCUA8[27:20] and so are managed by pinctrl. Normal GPIO debounce for 2325 * banks D and E is handled by the GPIO driver - GPIO passthrough is 2326 * treated like any other non-GPIO mux function. There is a catch 2327 * however, in that the debounce period is configured in the GPIO 2328 * controller. Due to this tangle between GPIO and pinctrl we don't yet 2329 * fully support pass-through debounce. 2330 */ 2331 { PIN_CONFIG_INPUT_DEBOUNCE, { A18, D16 }, SCUA8, 20 }, 2332 { PIN_CONFIG_INPUT_DEBOUNCE, { B17, A17 }, SCUA8, 21 }, 2333 { PIN_CONFIG_INPUT_DEBOUNCE, { C16, B16 }, SCUA8, 22 }, 2334 { PIN_CONFIG_INPUT_DEBOUNCE, { A16, E15 }, SCUA8, 23 }, 2335 { PIN_CONFIG_INPUT_DEBOUNCE, { D15, C15 }, SCUA8, 24 }, 2336 { PIN_CONFIG_INPUT_DEBOUNCE, { B15, A15 }, SCUA8, 25 }, 2337 { PIN_CONFIG_INPUT_DEBOUNCE, { E14, D14 }, SCUA8, 26 }, 2338 { PIN_CONFIG_INPUT_DEBOUNCE, { C14, B14 }, SCUA8, 27 }, 2339 }; 2340 2341 static struct aspeed_pinctrl_data aspeed_g4_pinctrl_data = { 2342 .pins = aspeed_g4_pins, 2343 .npins = ARRAY_SIZE(aspeed_g4_pins), 2344 .groups = aspeed_g4_groups, 2345 .ngroups = ARRAY_SIZE(aspeed_g4_groups), 2346 .functions = aspeed_g4_functions, 2347 .nfunctions = ARRAY_SIZE(aspeed_g4_functions), 2348 .configs = aspeed_g4_configs, 2349 .nconfigs = ARRAY_SIZE(aspeed_g4_configs), 2350 }; 2351 2352 static struct pinmux_ops aspeed_g4_pinmux_ops = { 2353 .get_functions_count = aspeed_pinmux_get_fn_count, 2354 .get_function_name = aspeed_pinmux_get_fn_name, 2355 .get_function_groups = aspeed_pinmux_get_fn_groups, 2356 .set_mux = aspeed_pinmux_set_mux, 2357 .gpio_request_enable = aspeed_gpio_request_enable, 2358 .strict = true, 2359 }; 2360 2361 static struct pinctrl_ops aspeed_g4_pinctrl_ops = { 2362 .get_groups_count = aspeed_pinctrl_get_groups_count, 2363 .get_group_name = aspeed_pinctrl_get_group_name, 2364 .get_group_pins = aspeed_pinctrl_get_group_pins, 2365 .pin_dbg_show = aspeed_pinctrl_pin_dbg_show, 2366 .dt_node_to_map = pinconf_generic_dt_node_to_map_all, 2367 .dt_free_map = pinctrl_utils_free_map, 2368 }; 2369 2370 static const struct pinconf_ops aspeed_g4_conf_ops = { 2371 .is_generic = true, 2372 .pin_config_get = aspeed_pin_config_get, 2373 .pin_config_set = aspeed_pin_config_set, 2374 .pin_config_group_get = aspeed_pin_config_group_get, 2375 .pin_config_group_set = aspeed_pin_config_group_set, 2376 }; 2377 2378 static struct pinctrl_desc aspeed_g4_pinctrl_desc = { 2379 .name = "aspeed-g4-pinctrl", 2380 .pins = aspeed_g4_pins, 2381 .npins = ARRAY_SIZE(aspeed_g4_pins), 2382 .pctlops = &aspeed_g4_pinctrl_ops, 2383 .pmxops = &aspeed_g4_pinmux_ops, 2384 .confops = &aspeed_g4_conf_ops, 2385 }; 2386 2387 static int aspeed_g4_pinctrl_probe(struct platform_device *pdev) 2388 { 2389 int i; 2390 2391 for (i = 0; i < ARRAY_SIZE(aspeed_g4_pins); i++) 2392 aspeed_g4_pins[i].number = i; 2393 2394 return aspeed_pinctrl_probe(pdev, &aspeed_g4_pinctrl_desc, 2395 &aspeed_g4_pinctrl_data); 2396 } 2397 2398 static const struct of_device_id aspeed_g4_pinctrl_of_match[] = { 2399 { .compatible = "aspeed,ast2400-pinctrl", }, 2400 { .compatible = "aspeed,g4-pinctrl", }, 2401 { }, 2402 }; 2403 2404 static struct platform_driver aspeed_g4_pinctrl_driver = { 2405 .probe = aspeed_g4_pinctrl_probe, 2406 .driver = { 2407 .name = "aspeed-g4-pinctrl", 2408 .of_match_table = aspeed_g4_pinctrl_of_match, 2409 }, 2410 }; 2411 2412 static int aspeed_g4_pinctrl_init(void) 2413 { 2414 return platform_driver_register(&aspeed_g4_pinctrl_driver); 2415 } 2416 2417 arch_initcall(aspeed_g4_pinctrl_init); 2418