1 /* 2 * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller 3 * 4 * Copyright (C) 2004-2007 Texas Instruments 5 * Copyright (C) 2008 Nokia Corporation 6 * Contact: Felipe Balbi <felipe.balbi@nokia.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 * 22 * Current status: 23 * - HS USB ULPI mode works. 24 * - 3-pin mode support may be added in future. 25 */ 26 27 #include <linux/module.h> 28 #include <linux/init.h> 29 #include <linux/interrupt.h> 30 #include <linux/platform_device.h> 31 #include <linux/workqueue.h> 32 #include <linux/io.h> 33 #include <linux/delay.h> 34 #include <linux/usb/otg.h> 35 #include <linux/phy/phy.h> 36 #include <linux/pm_runtime.h> 37 #include <linux/usb/musb.h> 38 #include <linux/usb/ulpi.h> 39 #include <linux/mfd/twl.h> 40 #include <linux/regulator/consumer.h> 41 #include <linux/err.h> 42 #include <linux/slab.h> 43 44 /* Register defines */ 45 46 #define MCPC_CTRL 0x30 47 #define MCPC_CTRL_RTSOL (1 << 7) 48 #define MCPC_CTRL_EXTSWR (1 << 6) 49 #define MCPC_CTRL_EXTSWC (1 << 5) 50 #define MCPC_CTRL_VOICESW (1 << 4) 51 #define MCPC_CTRL_OUT64K (1 << 3) 52 #define MCPC_CTRL_RTSCTSSW (1 << 2) 53 #define MCPC_CTRL_HS_UART (1 << 0) 54 55 #define MCPC_IO_CTRL 0x33 56 #define MCPC_IO_CTRL_MICBIASEN (1 << 5) 57 #define MCPC_IO_CTRL_CTS_NPU (1 << 4) 58 #define MCPC_IO_CTRL_RXD_PU (1 << 3) 59 #define MCPC_IO_CTRL_TXDTYP (1 << 2) 60 #define MCPC_IO_CTRL_CTSTYP (1 << 1) 61 #define MCPC_IO_CTRL_RTSTYP (1 << 0) 62 63 #define MCPC_CTRL2 0x36 64 #define MCPC_CTRL2_MCPC_CK_EN (1 << 0) 65 66 #define OTHER_FUNC_CTRL 0x80 67 #define OTHER_FUNC_CTRL_BDIS_ACON_EN (1 << 4) 68 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE (1 << 2) 69 70 #define OTHER_IFC_CTRL 0x83 71 #define OTHER_IFC_CTRL_OE_INT_EN (1 << 6) 72 #define OTHER_IFC_CTRL_CEA2011_MODE (1 << 5) 73 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN (1 << 4) 74 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT (1 << 3) 75 #define OTHER_IFC_CTRL_HIZ_ULPI (1 << 2) 76 #define OTHER_IFC_CTRL_ALT_INT_REROUTE (1 << 0) 77 78 #define OTHER_INT_EN_RISE 0x86 79 #define OTHER_INT_EN_FALL 0x89 80 #define OTHER_INT_STS 0x8C 81 #define OTHER_INT_LATCH 0x8D 82 #define OTHER_INT_VB_SESS_VLD (1 << 7) 83 #define OTHER_INT_DM_HI (1 << 6) /* not valid for "latch" reg */ 84 #define OTHER_INT_DP_HI (1 << 5) /* not valid for "latch" reg */ 85 #define OTHER_INT_BDIS_ACON (1 << 3) /* not valid for "fall" regs */ 86 #define OTHER_INT_MANU (1 << 1) 87 #define OTHER_INT_ABNORMAL_STRESS (1 << 0) 88 89 #define ID_STATUS 0x96 90 #define ID_RES_FLOAT (1 << 4) 91 #define ID_RES_440K (1 << 3) 92 #define ID_RES_200K (1 << 2) 93 #define ID_RES_102K (1 << 1) 94 #define ID_RES_GND (1 << 0) 95 96 #define POWER_CTRL 0xAC 97 #define POWER_CTRL_OTG_ENAB (1 << 5) 98 99 #define OTHER_IFC_CTRL2 0xAF 100 #define OTHER_IFC_CTRL2_ULPI_STP_LOW (1 << 4) 101 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL (1 << 3) 102 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430 (1 << 2) 103 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK (3 << 0) /* bits 0 and 1 */ 104 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N (0 << 0) 105 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N (1 << 0) 106 107 #define REG_CTRL_EN 0xB2 108 #define REG_CTRL_ERROR 0xB5 109 #define ULPI_I2C_CONFLICT_INTEN (1 << 0) 110 111 #define OTHER_FUNC_CTRL2 0xB8 112 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN (1 << 0) 113 114 /* following registers do not have separate _clr and _set registers */ 115 #define VBUS_DEBOUNCE 0xC0 116 #define ID_DEBOUNCE 0xC1 117 #define VBAT_TIMER 0xD3 118 #define PHY_PWR_CTRL 0xFD 119 #define PHY_PWR_PHYPWD (1 << 0) 120 #define PHY_CLK_CTRL 0xFE 121 #define PHY_CLK_CTRL_CLOCKGATING_EN (1 << 2) 122 #define PHY_CLK_CTRL_CLK32K_EN (1 << 1) 123 #define REQ_PHY_DPLL_CLK (1 << 0) 124 #define PHY_CLK_CTRL_STS 0xFF 125 #define PHY_DPLL_CLK (1 << 0) 126 127 /* In module TWL_MODULE_PM_MASTER */ 128 #define STS_HW_CONDITIONS 0x0F 129 130 /* In module TWL_MODULE_PM_RECEIVER */ 131 #define VUSB_DEDICATED1 0x7D 132 #define VUSB_DEDICATED2 0x7E 133 #define VUSB1V5_DEV_GRP 0x71 134 #define VUSB1V5_TYPE 0x72 135 #define VUSB1V5_REMAP 0x73 136 #define VUSB1V8_DEV_GRP 0x74 137 #define VUSB1V8_TYPE 0x75 138 #define VUSB1V8_REMAP 0x76 139 #define VUSB3V1_DEV_GRP 0x77 140 #define VUSB3V1_TYPE 0x78 141 #define VUSB3V1_REMAP 0x79 142 143 /* In module TWL4030_MODULE_INTBR */ 144 #define PMBR1 0x0D 145 #define GPIO_USB_4PIN_ULPI_2430C (3 << 0) 146 147 static irqreturn_t twl4030_usb_irq(int irq, void *_twl); 148 /* 149 * If VBUS is valid or ID is ground, then we know a 150 * cable is present and we need to be runtime-enabled 151 */ 152 static inline bool cable_present(enum musb_vbus_id_status stat) 153 { 154 return stat == MUSB_VBUS_VALID || 155 stat == MUSB_ID_GROUND; 156 } 157 158 struct twl4030_usb { 159 struct usb_phy phy; 160 struct device *dev; 161 162 /* TWL4030 internal USB regulator supplies */ 163 struct regulator *usb1v5; 164 struct regulator *usb1v8; 165 struct regulator *usb3v1; 166 167 /* for vbus reporting with irqs disabled */ 168 struct mutex lock; 169 170 /* pin configuration */ 171 enum twl4030_usb_mode usb_mode; 172 173 int irq; 174 enum musb_vbus_id_status linkstat; 175 atomic_t connected; 176 bool vbus_supplied; 177 bool musb_mailbox_pending; 178 179 struct delayed_work id_workaround_work; 180 }; 181 182 /* internal define on top of container_of */ 183 #define phy_to_twl(x) container_of((x), struct twl4030_usb, phy) 184 185 /*-------------------------------------------------------------------------*/ 186 187 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl, 188 u8 module, u8 data, u8 address) 189 { 190 u8 check = 0xFF; 191 192 if ((twl_i2c_write_u8(module, data, address) >= 0) && 193 (twl_i2c_read_u8(module, &check, address) >= 0) && 194 (check == data)) 195 return 0; 196 dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n", 197 1, module, address, check, data); 198 199 /* Failed once: Try again */ 200 if ((twl_i2c_write_u8(module, data, address) >= 0) && 201 (twl_i2c_read_u8(module, &check, address) >= 0) && 202 (check == data)) 203 return 0; 204 dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n", 205 2, module, address, check, data); 206 207 /* Failed again: Return error */ 208 return -EBUSY; 209 } 210 211 #define twl4030_usb_write_verify(twl, address, data) \ 212 twl4030_i2c_write_u8_verify(twl, TWL_MODULE_USB, (data), (address)) 213 214 static inline int twl4030_usb_write(struct twl4030_usb *twl, 215 u8 address, u8 data) 216 { 217 int ret = 0; 218 219 ret = twl_i2c_write_u8(TWL_MODULE_USB, data, address); 220 if (ret < 0) 221 dev_dbg(twl->dev, 222 "TWL4030:USB:Write[0x%x] Error %d\n", address, ret); 223 return ret; 224 } 225 226 static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address) 227 { 228 u8 data; 229 int ret = 0; 230 231 ret = twl_i2c_read_u8(module, &data, address); 232 if (ret >= 0) 233 ret = data; 234 else 235 dev_dbg(twl->dev, 236 "TWL4030:readb[0x%x,0x%x] Error %d\n", 237 module, address, ret); 238 239 return ret; 240 } 241 242 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address) 243 { 244 return twl4030_readb(twl, TWL_MODULE_USB, address); 245 } 246 247 /*-------------------------------------------------------------------------*/ 248 249 static inline int 250 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits) 251 { 252 return twl4030_usb_write(twl, ULPI_SET(reg), bits); 253 } 254 255 static inline int 256 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits) 257 { 258 return twl4030_usb_write(twl, ULPI_CLR(reg), bits); 259 } 260 261 /*-------------------------------------------------------------------------*/ 262 263 static bool twl4030_is_driving_vbus(struct twl4030_usb *twl) 264 { 265 int ret; 266 267 ret = twl4030_usb_read(twl, PHY_CLK_CTRL_STS); 268 if (ret < 0 || !(ret & PHY_DPLL_CLK)) 269 /* 270 * if clocks are off, registers are not updated, 271 * but we can assume we don't drive VBUS in this case 272 */ 273 return false; 274 275 ret = twl4030_usb_read(twl, ULPI_OTG_CTRL); 276 if (ret < 0) 277 return false; 278 279 return (ret & (ULPI_OTG_DRVVBUS | ULPI_OTG_CHRGVBUS)) ? true : false; 280 } 281 282 static enum musb_vbus_id_status 283 twl4030_usb_linkstat(struct twl4030_usb *twl) 284 { 285 int status; 286 enum musb_vbus_id_status linkstat = MUSB_UNKNOWN; 287 288 twl->vbus_supplied = false; 289 290 /* 291 * For ID/VBUS sensing, see manual section 15.4.8 ... 292 * except when using only battery backup power, two 293 * comparators produce VBUS_PRES and ID_PRES signals, 294 * which don't match docs elsewhere. But ... BIT(7) 295 * and BIT(2) of STS_HW_CONDITIONS, respectively, do 296 * seem to match up. If either is true the USB_PRES 297 * signal is active, the OTG module is activated, and 298 * its interrupt may be raised (may wake the system). 299 */ 300 status = twl4030_readb(twl, TWL_MODULE_PM_MASTER, STS_HW_CONDITIONS); 301 if (status < 0) 302 dev_err(twl->dev, "USB link status err %d\n", status); 303 else if (status & (BIT(7) | BIT(2))) { 304 if (status & BIT(7)) { 305 if (twl4030_is_driving_vbus(twl)) 306 status &= ~BIT(7); 307 else 308 twl->vbus_supplied = true; 309 } 310 311 if (status & BIT(2)) 312 linkstat = MUSB_ID_GROUND; 313 else if (status & BIT(7)) 314 linkstat = MUSB_VBUS_VALID; 315 else 316 linkstat = MUSB_VBUS_OFF; 317 } else { 318 if (twl->linkstat != MUSB_UNKNOWN) 319 linkstat = MUSB_VBUS_OFF; 320 } 321 322 kobject_uevent(&twl->dev->kobj, linkstat == MUSB_VBUS_VALID 323 ? KOBJ_ONLINE : KOBJ_OFFLINE); 324 325 dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n", 326 status, status, linkstat); 327 328 /* REVISIT this assumes host and peripheral controllers 329 * are registered, and that both are active... 330 */ 331 332 return linkstat; 333 } 334 335 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode) 336 { 337 twl->usb_mode = mode; 338 339 switch (mode) { 340 case T2_USB_MODE_ULPI: 341 twl4030_usb_clear_bits(twl, ULPI_IFC_CTRL, 342 ULPI_IFC_CTRL_CARKITMODE); 343 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB); 344 twl4030_usb_clear_bits(twl, ULPI_FUNC_CTRL, 345 ULPI_FUNC_CTRL_XCVRSEL_MASK | 346 ULPI_FUNC_CTRL_OPMODE_MASK); 347 break; 348 case -1: 349 /* FIXME: power on defaults */ 350 break; 351 default: 352 dev_err(twl->dev, "unsupported T2 transceiver mode %d\n", 353 mode); 354 break; 355 } 356 } 357 358 static void twl4030_i2c_access(struct twl4030_usb *twl, int on) 359 { 360 unsigned long timeout; 361 int val = twl4030_usb_read(twl, PHY_CLK_CTRL); 362 363 if (val >= 0) { 364 if (on) { 365 /* enable DPLL to access PHY registers over I2C */ 366 val |= REQ_PHY_DPLL_CLK; 367 WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL, 368 (u8)val) < 0); 369 370 timeout = jiffies + HZ; 371 while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) & 372 PHY_DPLL_CLK) 373 && time_before(jiffies, timeout)) 374 udelay(10); 375 if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) & 376 PHY_DPLL_CLK)) 377 dev_err(twl->dev, "Timeout setting T2 HSUSB " 378 "PHY DPLL clock\n"); 379 } else { 380 /* let ULPI control the DPLL clock */ 381 val &= ~REQ_PHY_DPLL_CLK; 382 WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL, 383 (u8)val) < 0); 384 } 385 } 386 } 387 388 static void __twl4030_phy_power(struct twl4030_usb *twl, int on) 389 { 390 u8 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL); 391 392 if (on) 393 pwr &= ~PHY_PWR_PHYPWD; 394 else 395 pwr |= PHY_PWR_PHYPWD; 396 397 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0); 398 } 399 400 static int __maybe_unused twl4030_usb_suspend(struct device *dev) 401 { 402 struct twl4030_usb *twl = dev_get_drvdata(dev); 403 404 /* 405 * we need enabled runtime on resume, 406 * so turn irq off here, so we do not get it early 407 * note: wakeup on usb plug works independently of this 408 */ 409 dev_dbg(twl->dev, "%s\n", __func__); 410 disable_irq(twl->irq); 411 412 return 0; 413 } 414 415 static int __maybe_unused twl4030_usb_resume(struct device *dev) 416 { 417 struct twl4030_usb *twl = dev_get_drvdata(dev); 418 419 dev_dbg(twl->dev, "%s\n", __func__); 420 enable_irq(twl->irq); 421 /* check whether cable status changed */ 422 twl4030_usb_irq(0, twl); 423 424 return 0; 425 } 426 427 static int __maybe_unused twl4030_usb_runtime_suspend(struct device *dev) 428 { 429 struct twl4030_usb *twl = dev_get_drvdata(dev); 430 431 dev_dbg(twl->dev, "%s\n", __func__); 432 433 __twl4030_phy_power(twl, 0); 434 regulator_disable(twl->usb1v5); 435 regulator_disable(twl->usb1v8); 436 regulator_disable(twl->usb3v1); 437 438 return 0; 439 } 440 441 static int __maybe_unused twl4030_usb_runtime_resume(struct device *dev) 442 { 443 struct twl4030_usb *twl = dev_get_drvdata(dev); 444 int res; 445 446 dev_dbg(twl->dev, "%s\n", __func__); 447 448 res = regulator_enable(twl->usb3v1); 449 if (res) 450 dev_err(twl->dev, "Failed to enable usb3v1\n"); 451 452 res = regulator_enable(twl->usb1v8); 453 if (res) 454 dev_err(twl->dev, "Failed to enable usb1v8\n"); 455 456 /* 457 * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP 458 * in twl4030) resets the VUSB_DEDICATED2 register. This reset 459 * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to 460 * SLEEP. We work around this by clearing the bit after usv3v1 461 * is re-activated. This ensures that VUSB3V1 is really active. 462 */ 463 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2); 464 465 res = regulator_enable(twl->usb1v5); 466 if (res) 467 dev_err(twl->dev, "Failed to enable usb1v5\n"); 468 469 __twl4030_phy_power(twl, 1); 470 twl4030_usb_write(twl, PHY_CLK_CTRL, 471 twl4030_usb_read(twl, PHY_CLK_CTRL) | 472 (PHY_CLK_CTRL_CLOCKGATING_EN | 473 PHY_CLK_CTRL_CLK32K_EN)); 474 475 twl4030_i2c_access(twl, 1); 476 twl4030_usb_set_mode(twl, twl->usb_mode); 477 if (twl->usb_mode == T2_USB_MODE_ULPI) 478 twl4030_i2c_access(twl, 0); 479 /* 480 * According to the TPS65950 TRM, there has to be at least 50ms 481 * delay between setting POWER_CTRL_OTG_ENAB and enabling charging 482 * so wait here so that a fully enabled phy can be expected after 483 * resume 484 */ 485 msleep(50); 486 return 0; 487 } 488 489 static int twl4030_phy_power_off(struct phy *phy) 490 { 491 struct twl4030_usb *twl = phy_get_drvdata(phy); 492 493 dev_dbg(twl->dev, "%s\n", __func__); 494 495 return 0; 496 } 497 498 static int twl4030_phy_power_on(struct phy *phy) 499 { 500 struct twl4030_usb *twl = phy_get_drvdata(phy); 501 502 dev_dbg(twl->dev, "%s\n", __func__); 503 pm_runtime_get_sync(twl->dev); 504 schedule_delayed_work(&twl->id_workaround_work, HZ); 505 pm_runtime_mark_last_busy(twl->dev); 506 pm_runtime_put_autosuspend(twl->dev); 507 508 return 0; 509 } 510 511 static int twl4030_usb_ldo_init(struct twl4030_usb *twl) 512 { 513 /* Enable writing to power configuration registers */ 514 twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1, 515 TWL4030_PM_MASTER_PROTECT_KEY); 516 517 twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2, 518 TWL4030_PM_MASTER_PROTECT_KEY); 519 520 /* Keep VUSB3V1 LDO in sleep state until VBUS/ID change detected*/ 521 /*twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);*/ 522 523 /* input to VUSB3V1 LDO is from VBAT, not VBUS */ 524 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1); 525 526 /* Initialize 3.1V regulator */ 527 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_DEV_GRP); 528 529 twl->usb3v1 = devm_regulator_get(twl->dev, "usb3v1"); 530 if (IS_ERR(twl->usb3v1)) 531 return -ENODEV; 532 533 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE); 534 535 /* Initialize 1.5V regulator */ 536 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_DEV_GRP); 537 538 twl->usb1v5 = devm_regulator_get(twl->dev, "usb1v5"); 539 if (IS_ERR(twl->usb1v5)) 540 return -ENODEV; 541 542 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE); 543 544 /* Initialize 1.8V regulator */ 545 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_DEV_GRP); 546 547 twl->usb1v8 = devm_regulator_get(twl->dev, "usb1v8"); 548 if (IS_ERR(twl->usb1v8)) 549 return -ENODEV; 550 551 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE); 552 553 /* disable access to power configuration registers */ 554 twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0, 555 TWL4030_PM_MASTER_PROTECT_KEY); 556 557 return 0; 558 } 559 560 static ssize_t twl4030_usb_vbus_show(struct device *dev, 561 struct device_attribute *attr, char *buf) 562 { 563 struct twl4030_usb *twl = dev_get_drvdata(dev); 564 int ret = -EINVAL; 565 566 mutex_lock(&twl->lock); 567 ret = sprintf(buf, "%s\n", 568 twl->vbus_supplied ? "on" : "off"); 569 mutex_unlock(&twl->lock); 570 571 return ret; 572 } 573 static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL); 574 575 static irqreturn_t twl4030_usb_irq(int irq, void *_twl) 576 { 577 struct twl4030_usb *twl = _twl; 578 enum musb_vbus_id_status status; 579 int err; 580 581 status = twl4030_usb_linkstat(twl); 582 583 mutex_lock(&twl->lock); 584 twl->linkstat = status; 585 mutex_unlock(&twl->lock); 586 587 if (cable_present(status)) { 588 if (atomic_add_unless(&twl->connected, 1, 1)) { 589 dev_dbg(twl->dev, "%s: cable connected %i\n", 590 __func__, status); 591 pm_runtime_get_sync(twl->dev); 592 twl->musb_mailbox_pending = true; 593 } 594 } else { 595 if (atomic_add_unless(&twl->connected, -1, 0)) { 596 dev_dbg(twl->dev, "%s: cable disconnected %i\n", 597 __func__, status); 598 pm_runtime_mark_last_busy(twl->dev); 599 pm_runtime_put_autosuspend(twl->dev); 600 twl->musb_mailbox_pending = true; 601 } 602 } 603 if (twl->musb_mailbox_pending) { 604 err = musb_mailbox(status); 605 if (!err) 606 twl->musb_mailbox_pending = false; 607 } 608 609 /* don't schedule during sleep - irq works right then */ 610 if (status == MUSB_ID_GROUND && pm_runtime_active(twl->dev)) { 611 cancel_delayed_work(&twl->id_workaround_work); 612 schedule_delayed_work(&twl->id_workaround_work, HZ); 613 } 614 615 if (irq) 616 sysfs_notify(&twl->dev->kobj, NULL, "vbus"); 617 618 return IRQ_HANDLED; 619 } 620 621 static void twl4030_id_workaround_work(struct work_struct *work) 622 { 623 struct twl4030_usb *twl = container_of(work, struct twl4030_usb, 624 id_workaround_work.work); 625 626 twl4030_usb_irq(0, twl); 627 } 628 629 static int twl4030_phy_init(struct phy *phy) 630 { 631 struct twl4030_usb *twl = phy_get_drvdata(phy); 632 633 pm_runtime_get_sync(twl->dev); 634 twl->linkstat = MUSB_UNKNOWN; 635 schedule_delayed_work(&twl->id_workaround_work, HZ); 636 pm_runtime_mark_last_busy(twl->dev); 637 pm_runtime_put_autosuspend(twl->dev); 638 639 return 0; 640 } 641 642 static int twl4030_set_peripheral(struct usb_otg *otg, 643 struct usb_gadget *gadget) 644 { 645 if (!otg) 646 return -ENODEV; 647 648 otg->gadget = gadget; 649 if (!gadget) 650 otg->state = OTG_STATE_UNDEFINED; 651 652 return 0; 653 } 654 655 static int twl4030_set_host(struct usb_otg *otg, struct usb_bus *host) 656 { 657 if (!otg) 658 return -ENODEV; 659 660 otg->host = host; 661 if (!host) 662 otg->state = OTG_STATE_UNDEFINED; 663 664 return 0; 665 } 666 667 static const struct phy_ops ops = { 668 .init = twl4030_phy_init, 669 .power_on = twl4030_phy_power_on, 670 .power_off = twl4030_phy_power_off, 671 .owner = THIS_MODULE, 672 }; 673 674 static const struct dev_pm_ops twl4030_usb_pm_ops = { 675 SET_RUNTIME_PM_OPS(twl4030_usb_runtime_suspend, 676 twl4030_usb_runtime_resume, NULL) 677 SET_SYSTEM_SLEEP_PM_OPS(twl4030_usb_suspend, twl4030_usb_resume) 678 }; 679 680 static int twl4030_usb_probe(struct platform_device *pdev) 681 { 682 struct twl4030_usb_data *pdata = dev_get_platdata(&pdev->dev); 683 struct twl4030_usb *twl; 684 struct phy *phy; 685 int status, err; 686 struct usb_otg *otg; 687 struct device_node *np = pdev->dev.of_node; 688 struct phy_provider *phy_provider; 689 690 twl = devm_kzalloc(&pdev->dev, sizeof(*twl), GFP_KERNEL); 691 if (!twl) 692 return -ENOMEM; 693 694 if (np) 695 of_property_read_u32(np, "usb_mode", 696 (enum twl4030_usb_mode *)&twl->usb_mode); 697 else if (pdata) { 698 twl->usb_mode = pdata->usb_mode; 699 } else { 700 dev_err(&pdev->dev, "twl4030 initialized without pdata\n"); 701 return -EINVAL; 702 } 703 704 otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL); 705 if (!otg) 706 return -ENOMEM; 707 708 twl->dev = &pdev->dev; 709 twl->irq = platform_get_irq(pdev, 0); 710 twl->vbus_supplied = false; 711 twl->linkstat = MUSB_UNKNOWN; 712 twl->musb_mailbox_pending = false; 713 714 twl->phy.dev = twl->dev; 715 twl->phy.label = "twl4030"; 716 twl->phy.otg = otg; 717 twl->phy.type = USB_PHY_TYPE_USB2; 718 719 otg->usb_phy = &twl->phy; 720 otg->set_host = twl4030_set_host; 721 otg->set_peripheral = twl4030_set_peripheral; 722 723 phy = devm_phy_create(twl->dev, NULL, &ops); 724 if (IS_ERR(phy)) { 725 dev_dbg(&pdev->dev, "Failed to create PHY\n"); 726 return PTR_ERR(phy); 727 } 728 729 phy_set_drvdata(phy, twl); 730 731 phy_provider = devm_of_phy_provider_register(twl->dev, 732 of_phy_simple_xlate); 733 if (IS_ERR(phy_provider)) 734 return PTR_ERR(phy_provider); 735 736 /* init mutex for workqueue */ 737 mutex_init(&twl->lock); 738 739 INIT_DELAYED_WORK(&twl->id_workaround_work, twl4030_id_workaround_work); 740 741 err = twl4030_usb_ldo_init(twl); 742 if (err) { 743 dev_err(&pdev->dev, "ldo init failed\n"); 744 return err; 745 } 746 usb_add_phy_dev(&twl->phy); 747 748 platform_set_drvdata(pdev, twl); 749 if (device_create_file(&pdev->dev, &dev_attr_vbus)) 750 dev_warn(&pdev->dev, "could not create sysfs file\n"); 751 752 ATOMIC_INIT_NOTIFIER_HEAD(&twl->phy.notifier); 753 754 pm_runtime_use_autosuspend(&pdev->dev); 755 pm_runtime_set_autosuspend_delay(&pdev->dev, 2000); 756 pm_runtime_enable(&pdev->dev); 757 pm_runtime_get_sync(&pdev->dev); 758 759 /* Our job is to use irqs and status from the power module 760 * to keep the transceiver disabled when nothing's connected. 761 * 762 * FIXME we actually shouldn't start enabling it until the 763 * USB controller drivers have said they're ready, by calling 764 * set_host() and/or set_peripheral() ... OTG_capable boards 765 * need both handles, otherwise just one suffices. 766 */ 767 status = devm_request_threaded_irq(twl->dev, twl->irq, NULL, 768 twl4030_usb_irq, IRQF_TRIGGER_FALLING | 769 IRQF_TRIGGER_RISING | IRQF_ONESHOT, "twl4030_usb", twl); 770 if (status < 0) { 771 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n", 772 twl->irq, status); 773 return status; 774 } 775 776 if (pdata) 777 err = phy_create_lookup(phy, "usb", "musb-hdrc.0"); 778 if (err) 779 return err; 780 781 pm_runtime_mark_last_busy(&pdev->dev); 782 pm_runtime_put_autosuspend(twl->dev); 783 784 dev_info(&pdev->dev, "Initialized TWL4030 USB module\n"); 785 return 0; 786 } 787 788 static int twl4030_usb_remove(struct platform_device *pdev) 789 { 790 struct twl4030_usb *twl = platform_get_drvdata(pdev); 791 int val; 792 793 usb_remove_phy(&twl->phy); 794 pm_runtime_get_sync(twl->dev); 795 cancel_delayed_work(&twl->id_workaround_work); 796 device_remove_file(twl->dev, &dev_attr_vbus); 797 798 /* set transceiver mode to power on defaults */ 799 twl4030_usb_set_mode(twl, -1); 800 801 /* idle ulpi before powering off */ 802 if (cable_present(twl->linkstat)) 803 pm_runtime_put_noidle(twl->dev); 804 pm_runtime_mark_last_busy(twl->dev); 805 pm_runtime_dont_use_autosuspend(&pdev->dev); 806 pm_runtime_put_sync(twl->dev); 807 pm_runtime_disable(twl->dev); 808 809 /* autogate 60MHz ULPI clock, 810 * clear dpll clock request for i2c access, 811 * disable 32KHz 812 */ 813 val = twl4030_usb_read(twl, PHY_CLK_CTRL); 814 if (val >= 0) { 815 val |= PHY_CLK_CTRL_CLOCKGATING_EN; 816 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK); 817 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val); 818 } 819 820 /* disable complete OTG block */ 821 twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB); 822 823 return 0; 824 } 825 826 #ifdef CONFIG_OF 827 static const struct of_device_id twl4030_usb_id_table[] = { 828 { .compatible = "ti,twl4030-usb" }, 829 {} 830 }; 831 MODULE_DEVICE_TABLE(of, twl4030_usb_id_table); 832 #endif 833 834 static struct platform_driver twl4030_usb_driver = { 835 .probe = twl4030_usb_probe, 836 .remove = twl4030_usb_remove, 837 .driver = { 838 .name = "twl4030_usb", 839 .pm = &twl4030_usb_pm_ops, 840 .of_match_table = of_match_ptr(twl4030_usb_id_table), 841 }, 842 }; 843 844 static int __init twl4030_usb_init(void) 845 { 846 return platform_driver_register(&twl4030_usb_driver); 847 } 848 subsys_initcall(twl4030_usb_init); 849 850 static void __exit twl4030_usb_exit(void) 851 { 852 platform_driver_unregister(&twl4030_usb_driver); 853 } 854 module_exit(twl4030_usb_exit); 855 856 MODULE_ALIAS("platform:twl4030_usb"); 857 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation"); 858 MODULE_DESCRIPTION("TWL4030 USB transceiver driver"); 859 MODULE_LICENSE("GPL"); 860