1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller 4 * 5 * Copyright (C) 2004-2007 Texas Instruments 6 * Copyright (C) 2008 Nokia Corporation 7 * Contact: Felipe Balbi <felipe.balbi@nokia.com> 8 * 9 * Current status: 10 * - HS USB ULPI mode works. 11 * - 3-pin mode support may be added in future. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/init.h> 16 #include <linux/interrupt.h> 17 #include <linux/of.h> 18 #include <linux/platform_device.h> 19 #include <linux/workqueue.h> 20 #include <linux/io.h> 21 #include <linux/delay.h> 22 #include <linux/usb/otg.h> 23 #include <linux/phy/phy.h> 24 #include <linux/pm_runtime.h> 25 #include <linux/usb/musb.h> 26 #include <linux/usb/ulpi.h> 27 #include <linux/mfd/twl.h> 28 #include <linux/regulator/consumer.h> 29 #include <linux/err.h> 30 #include <linux/slab.h> 31 32 /* Register defines */ 33 34 #define MCPC_CTRL 0x30 35 #define MCPC_CTRL_RTSOL (1 << 7) 36 #define MCPC_CTRL_EXTSWR (1 << 6) 37 #define MCPC_CTRL_EXTSWC (1 << 5) 38 #define MCPC_CTRL_VOICESW (1 << 4) 39 #define MCPC_CTRL_OUT64K (1 << 3) 40 #define MCPC_CTRL_RTSCTSSW (1 << 2) 41 #define MCPC_CTRL_HS_UART (1 << 0) 42 43 #define MCPC_IO_CTRL 0x33 44 #define MCPC_IO_CTRL_MICBIASEN (1 << 5) 45 #define MCPC_IO_CTRL_CTS_NPU (1 << 4) 46 #define MCPC_IO_CTRL_RXD_PU (1 << 3) 47 #define MCPC_IO_CTRL_TXDTYP (1 << 2) 48 #define MCPC_IO_CTRL_CTSTYP (1 << 1) 49 #define MCPC_IO_CTRL_RTSTYP (1 << 0) 50 51 #define MCPC_CTRL2 0x36 52 #define MCPC_CTRL2_MCPC_CK_EN (1 << 0) 53 54 #define OTHER_FUNC_CTRL 0x80 55 #define OTHER_FUNC_CTRL_BDIS_ACON_EN (1 << 4) 56 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE (1 << 2) 57 58 #define OTHER_IFC_CTRL 0x83 59 #define OTHER_IFC_CTRL_OE_INT_EN (1 << 6) 60 #define OTHER_IFC_CTRL_CEA2011_MODE (1 << 5) 61 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN (1 << 4) 62 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT (1 << 3) 63 #define OTHER_IFC_CTRL_HIZ_ULPI (1 << 2) 64 #define OTHER_IFC_CTRL_ALT_INT_REROUTE (1 << 0) 65 66 #define OTHER_INT_EN_RISE 0x86 67 #define OTHER_INT_EN_FALL 0x89 68 #define OTHER_INT_STS 0x8C 69 #define OTHER_INT_LATCH 0x8D 70 #define OTHER_INT_VB_SESS_VLD (1 << 7) 71 #define OTHER_INT_DM_HI (1 << 6) /* not valid for "latch" reg */ 72 #define OTHER_INT_DP_HI (1 << 5) /* not valid for "latch" reg */ 73 #define OTHER_INT_BDIS_ACON (1 << 3) /* not valid for "fall" regs */ 74 #define OTHER_INT_MANU (1 << 1) 75 #define OTHER_INT_ABNORMAL_STRESS (1 << 0) 76 77 #define ID_STATUS 0x96 78 #define ID_RES_FLOAT (1 << 4) 79 #define ID_RES_440K (1 << 3) 80 #define ID_RES_200K (1 << 2) 81 #define ID_RES_102K (1 << 1) 82 #define ID_RES_GND (1 << 0) 83 84 #define POWER_CTRL 0xAC 85 #define POWER_CTRL_OTG_ENAB (1 << 5) 86 87 #define OTHER_IFC_CTRL2 0xAF 88 #define OTHER_IFC_CTRL2_ULPI_STP_LOW (1 << 4) 89 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL (1 << 3) 90 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430 (1 << 2) 91 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK (3 << 0) /* bits 0 and 1 */ 92 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N (0 << 0) 93 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N (1 << 0) 94 95 #define REG_CTRL_EN 0xB2 96 #define REG_CTRL_ERROR 0xB5 97 #define ULPI_I2C_CONFLICT_INTEN (1 << 0) 98 99 #define OTHER_FUNC_CTRL2 0xB8 100 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN (1 << 0) 101 102 /* following registers do not have separate _clr and _set registers */ 103 #define VBUS_DEBOUNCE 0xC0 104 #define ID_DEBOUNCE 0xC1 105 #define VBAT_TIMER 0xD3 106 #define PHY_PWR_CTRL 0xFD 107 #define PHY_PWR_PHYPWD (1 << 0) 108 #define PHY_CLK_CTRL 0xFE 109 #define PHY_CLK_CTRL_CLOCKGATING_EN (1 << 2) 110 #define PHY_CLK_CTRL_CLK32K_EN (1 << 1) 111 #define REQ_PHY_DPLL_CLK (1 << 0) 112 #define PHY_CLK_CTRL_STS 0xFF 113 #define PHY_DPLL_CLK (1 << 0) 114 115 /* In module TWL_MODULE_PM_MASTER */ 116 #define STS_HW_CONDITIONS 0x0F 117 118 /* In module TWL_MODULE_PM_RECEIVER */ 119 #define VUSB_DEDICATED1 0x7D 120 #define VUSB_DEDICATED2 0x7E 121 #define VUSB1V5_DEV_GRP 0x71 122 #define VUSB1V5_TYPE 0x72 123 #define VUSB1V5_REMAP 0x73 124 #define VUSB1V8_DEV_GRP 0x74 125 #define VUSB1V8_TYPE 0x75 126 #define VUSB1V8_REMAP 0x76 127 #define VUSB3V1_DEV_GRP 0x77 128 #define VUSB3V1_TYPE 0x78 129 #define VUSB3V1_REMAP 0x79 130 131 /* In module TWL4030_MODULE_INTBR */ 132 #define PMBR1 0x0D 133 #define GPIO_USB_4PIN_ULPI_2430C (3 << 0) 134 135 static irqreturn_t twl4030_usb_irq(int irq, void *_twl); 136 /* 137 * If VBUS is valid or ID is ground, then we know a 138 * cable is present and we need to be runtime-enabled 139 */ 140 static inline bool cable_present(enum musb_vbus_id_status stat) 141 { 142 return stat == MUSB_VBUS_VALID || 143 stat == MUSB_ID_GROUND; 144 } 145 146 struct twl4030_usb { 147 struct usb_phy phy; 148 struct device *dev; 149 150 /* TWL4030 internal USB regulator supplies */ 151 struct regulator *usb1v5; 152 struct regulator *usb1v8; 153 struct regulator *usb3v1; 154 155 /* for vbus reporting with irqs disabled */ 156 struct mutex lock; 157 158 /* pin configuration */ 159 enum twl4030_usb_mode usb_mode; 160 161 int irq; 162 enum musb_vbus_id_status linkstat; 163 atomic_t connected; 164 bool vbus_supplied; 165 bool musb_mailbox_pending; 166 unsigned long runtime_suspended:1; 167 unsigned long needs_resume:1; 168 169 struct delayed_work id_workaround_work; 170 }; 171 172 /* internal define on top of container_of */ 173 #define phy_to_twl(x) container_of((x), struct twl4030_usb, phy) 174 175 /*-------------------------------------------------------------------------*/ 176 177 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl, 178 u8 module, u8 data, u8 address) 179 { 180 u8 check = 0xFF; 181 182 if ((twl_i2c_write_u8(module, data, address) >= 0) && 183 (twl_i2c_read_u8(module, &check, address) >= 0) && 184 (check == data)) 185 return 0; 186 dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n", 187 1, module, address, check, data); 188 189 /* Failed once: Try again */ 190 if ((twl_i2c_write_u8(module, data, address) >= 0) && 191 (twl_i2c_read_u8(module, &check, address) >= 0) && 192 (check == data)) 193 return 0; 194 dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n", 195 2, module, address, check, data); 196 197 /* Failed again: Return error */ 198 return -EBUSY; 199 } 200 201 #define twl4030_usb_write_verify(twl, address, data) \ 202 twl4030_i2c_write_u8_verify(twl, TWL_MODULE_USB, (data), (address)) 203 204 static inline int twl4030_usb_write(struct twl4030_usb *twl, 205 u8 address, u8 data) 206 { 207 int ret = 0; 208 209 ret = twl_i2c_write_u8(TWL_MODULE_USB, data, address); 210 if (ret < 0) 211 dev_dbg(twl->dev, 212 "TWL4030:USB:Write[0x%x] Error %d\n", address, ret); 213 return ret; 214 } 215 216 static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address) 217 { 218 u8 data; 219 int ret = 0; 220 221 ret = twl_i2c_read_u8(module, &data, address); 222 if (ret >= 0) 223 ret = data; 224 else 225 dev_dbg(twl->dev, 226 "TWL4030:readb[0x%x,0x%x] Error %d\n", 227 module, address, ret); 228 229 return ret; 230 } 231 232 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address) 233 { 234 return twl4030_readb(twl, TWL_MODULE_USB, address); 235 } 236 237 /*-------------------------------------------------------------------------*/ 238 239 static inline int 240 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits) 241 { 242 return twl4030_usb_write(twl, ULPI_SET(reg), bits); 243 } 244 245 static inline int 246 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits) 247 { 248 return twl4030_usb_write(twl, ULPI_CLR(reg), bits); 249 } 250 251 /*-------------------------------------------------------------------------*/ 252 253 static bool twl4030_is_driving_vbus(struct twl4030_usb *twl) 254 { 255 int ret; 256 257 ret = twl4030_usb_read(twl, PHY_CLK_CTRL_STS); 258 if (ret < 0 || !(ret & PHY_DPLL_CLK)) 259 /* 260 * if clocks are off, registers are not updated, 261 * but we can assume we don't drive VBUS in this case 262 */ 263 return false; 264 265 ret = twl4030_usb_read(twl, ULPI_OTG_CTRL); 266 if (ret < 0) 267 return false; 268 269 return (ret & (ULPI_OTG_DRVVBUS | ULPI_OTG_CHRGVBUS)) ? true : false; 270 } 271 272 static enum musb_vbus_id_status 273 twl4030_usb_linkstat(struct twl4030_usb *twl) 274 { 275 int status; 276 enum musb_vbus_id_status linkstat = MUSB_UNKNOWN; 277 278 twl->vbus_supplied = false; 279 280 /* 281 * For ID/VBUS sensing, see manual section 15.4.8 ... 282 * except when using only battery backup power, two 283 * comparators produce VBUS_PRES and ID_PRES signals, 284 * which don't match docs elsewhere. But ... BIT(7) 285 * and BIT(2) of STS_HW_CONDITIONS, respectively, do 286 * seem to match up. If either is true the USB_PRES 287 * signal is active, the OTG module is activated, and 288 * its interrupt may be raised (may wake the system). 289 */ 290 status = twl4030_readb(twl, TWL_MODULE_PM_MASTER, STS_HW_CONDITIONS); 291 if (status < 0) 292 dev_err(twl->dev, "USB link status err %d\n", status); 293 else if (status & (BIT(7) | BIT(2))) { 294 if (status & BIT(7)) { 295 if (twl4030_is_driving_vbus(twl)) 296 status &= ~BIT(7); 297 else 298 twl->vbus_supplied = true; 299 } 300 301 if (status & BIT(2)) 302 linkstat = MUSB_ID_GROUND; 303 else if (status & BIT(7)) 304 linkstat = MUSB_VBUS_VALID; 305 else 306 linkstat = MUSB_VBUS_OFF; 307 } else { 308 if (twl->linkstat != MUSB_UNKNOWN) 309 linkstat = MUSB_VBUS_OFF; 310 } 311 312 kobject_uevent(&twl->dev->kobj, linkstat == MUSB_VBUS_VALID 313 ? KOBJ_ONLINE : KOBJ_OFFLINE); 314 315 dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n", 316 status, status, linkstat); 317 318 /* REVISIT this assumes host and peripheral controllers 319 * are registered, and that both are active... 320 */ 321 322 return linkstat; 323 } 324 325 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode) 326 { 327 twl->usb_mode = mode; 328 329 switch (mode) { 330 case T2_USB_MODE_ULPI: 331 twl4030_usb_clear_bits(twl, ULPI_IFC_CTRL, 332 ULPI_IFC_CTRL_CARKITMODE); 333 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB); 334 twl4030_usb_clear_bits(twl, ULPI_FUNC_CTRL, 335 ULPI_FUNC_CTRL_XCVRSEL_MASK | 336 ULPI_FUNC_CTRL_OPMODE_MASK); 337 break; 338 case -1: 339 /* FIXME: power on defaults */ 340 break; 341 default: 342 dev_err(twl->dev, "unsupported T2 transceiver mode %d\n", 343 mode); 344 break; 345 } 346 } 347 348 static void twl4030_i2c_access(struct twl4030_usb *twl, int on) 349 { 350 unsigned long timeout; 351 int val = twl4030_usb_read(twl, PHY_CLK_CTRL); 352 353 if (val >= 0) { 354 if (on) { 355 /* enable DPLL to access PHY registers over I2C */ 356 val |= REQ_PHY_DPLL_CLK; 357 WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL, 358 (u8)val) < 0); 359 360 timeout = jiffies + HZ; 361 while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) & 362 PHY_DPLL_CLK) 363 && time_before(jiffies, timeout)) 364 udelay(10); 365 if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) & 366 PHY_DPLL_CLK)) 367 dev_err(twl->dev, "Timeout setting T2 HSUSB " 368 "PHY DPLL clock\n"); 369 } else { 370 /* let ULPI control the DPLL clock */ 371 val &= ~REQ_PHY_DPLL_CLK; 372 WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL, 373 (u8)val) < 0); 374 } 375 } 376 } 377 378 static void __twl4030_phy_power(struct twl4030_usb *twl, int on) 379 { 380 u8 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL); 381 382 if (on) 383 pwr &= ~PHY_PWR_PHYPWD; 384 else 385 pwr |= PHY_PWR_PHYPWD; 386 387 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0); 388 } 389 390 static int twl4030_usb_runtime_suspend(struct device *dev); 391 static int twl4030_usb_runtime_resume(struct device *dev); 392 393 static int __maybe_unused twl4030_usb_suspend(struct device *dev) 394 { 395 struct twl4030_usb *twl = dev_get_drvdata(dev); 396 397 /* 398 * we need enabled runtime on resume, 399 * so turn irq off here, so we do not get it early 400 * note: wakeup on usb plug works independently of this 401 */ 402 dev_dbg(twl->dev, "%s\n", __func__); 403 disable_irq(twl->irq); 404 if (!twl->runtime_suspended && !atomic_read(&twl->connected)) { 405 twl4030_usb_runtime_suspend(dev); 406 twl->needs_resume = 1; 407 } 408 409 return 0; 410 } 411 412 static int __maybe_unused twl4030_usb_resume(struct device *dev) 413 { 414 struct twl4030_usb *twl = dev_get_drvdata(dev); 415 416 dev_dbg(twl->dev, "%s\n", __func__); 417 enable_irq(twl->irq); 418 if (twl->needs_resume) 419 twl4030_usb_runtime_resume(dev); 420 /* check whether cable status changed */ 421 twl4030_usb_irq(0, twl); 422 423 twl->runtime_suspended = 0; 424 425 return 0; 426 } 427 428 static int __maybe_unused twl4030_usb_runtime_suspend(struct device *dev) 429 { 430 struct twl4030_usb *twl = dev_get_drvdata(dev); 431 432 dev_dbg(twl->dev, "%s\n", __func__); 433 434 __twl4030_phy_power(twl, 0); 435 regulator_disable(twl->usb1v5); 436 regulator_disable(twl->usb1v8); 437 regulator_disable(twl->usb3v1); 438 439 twl->runtime_suspended = 1; 440 441 return 0; 442 } 443 444 static int __maybe_unused twl4030_usb_runtime_resume(struct device *dev) 445 { 446 struct twl4030_usb *twl = dev_get_drvdata(dev); 447 int res; 448 449 dev_dbg(twl->dev, "%s\n", __func__); 450 451 res = regulator_enable(twl->usb3v1); 452 if (res) 453 dev_err(twl->dev, "Failed to enable usb3v1\n"); 454 455 res = regulator_enable(twl->usb1v8); 456 if (res) 457 dev_err(twl->dev, "Failed to enable usb1v8\n"); 458 459 /* 460 * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP 461 * in twl4030) resets the VUSB_DEDICATED2 register. This reset 462 * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to 463 * SLEEP. We work around this by clearing the bit after usv3v1 464 * is re-activated. This ensures that VUSB3V1 is really active. 465 */ 466 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2); 467 468 res = regulator_enable(twl->usb1v5); 469 if (res) 470 dev_err(twl->dev, "Failed to enable usb1v5\n"); 471 472 __twl4030_phy_power(twl, 1); 473 twl4030_usb_write(twl, PHY_CLK_CTRL, 474 twl4030_usb_read(twl, PHY_CLK_CTRL) | 475 (PHY_CLK_CTRL_CLOCKGATING_EN | 476 PHY_CLK_CTRL_CLK32K_EN)); 477 478 twl4030_i2c_access(twl, 1); 479 twl4030_usb_set_mode(twl, twl->usb_mode); 480 if (twl->usb_mode == T2_USB_MODE_ULPI) 481 twl4030_i2c_access(twl, 0); 482 /* 483 * According to the TPS65950 TRM, there has to be at least 50ms 484 * delay between setting POWER_CTRL_OTG_ENAB and enabling charging 485 * so wait here so that a fully enabled phy can be expected after 486 * resume 487 */ 488 msleep(50); 489 return 0; 490 } 491 492 static int twl4030_phy_power_off(struct phy *phy) 493 { 494 struct twl4030_usb *twl = phy_get_drvdata(phy); 495 496 dev_dbg(twl->dev, "%s\n", __func__); 497 498 return 0; 499 } 500 501 static int twl4030_phy_power_on(struct phy *phy) 502 { 503 struct twl4030_usb *twl = phy_get_drvdata(phy); 504 505 dev_dbg(twl->dev, "%s\n", __func__); 506 pm_runtime_get_sync(twl->dev); 507 schedule_delayed_work(&twl->id_workaround_work, HZ); 508 pm_runtime_mark_last_busy(twl->dev); 509 pm_runtime_put_autosuspend(twl->dev); 510 511 return 0; 512 } 513 514 static int twl4030_usb_ldo_init(struct twl4030_usb *twl) 515 { 516 /* Enable writing to power configuration registers */ 517 twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1, 518 TWL4030_PM_MASTER_PROTECT_KEY); 519 520 twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2, 521 TWL4030_PM_MASTER_PROTECT_KEY); 522 523 /* Keep VUSB3V1 LDO in sleep state until VBUS/ID change detected*/ 524 /*twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);*/ 525 526 /* input to VUSB3V1 LDO is from VBAT, not VBUS */ 527 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1); 528 529 /* Initialize 3.1V regulator */ 530 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_DEV_GRP); 531 532 twl->usb3v1 = devm_regulator_get(twl->dev, "usb3v1"); 533 if (IS_ERR(twl->usb3v1)) 534 return -ENODEV; 535 536 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE); 537 538 /* Initialize 1.5V regulator */ 539 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_DEV_GRP); 540 541 twl->usb1v5 = devm_regulator_get(twl->dev, "usb1v5"); 542 if (IS_ERR(twl->usb1v5)) 543 return -ENODEV; 544 545 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE); 546 547 /* Initialize 1.8V regulator */ 548 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_DEV_GRP); 549 550 twl->usb1v8 = devm_regulator_get(twl->dev, "usb1v8"); 551 if (IS_ERR(twl->usb1v8)) 552 return -ENODEV; 553 554 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE); 555 556 /* disable access to power configuration registers */ 557 twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0, 558 TWL4030_PM_MASTER_PROTECT_KEY); 559 560 return 0; 561 } 562 563 static ssize_t vbus_show(struct device *dev, 564 struct device_attribute *attr, char *buf) 565 { 566 struct twl4030_usb *twl = dev_get_drvdata(dev); 567 int ret = -EINVAL; 568 569 mutex_lock(&twl->lock); 570 ret = sprintf(buf, "%s\n", 571 twl->vbus_supplied ? "on" : "off"); 572 mutex_unlock(&twl->lock); 573 574 return ret; 575 } 576 static DEVICE_ATTR_RO(vbus); 577 578 static irqreturn_t twl4030_usb_irq(int irq, void *_twl) 579 { 580 struct twl4030_usb *twl = _twl; 581 enum musb_vbus_id_status status; 582 int err; 583 584 status = twl4030_usb_linkstat(twl); 585 586 mutex_lock(&twl->lock); 587 twl->linkstat = status; 588 mutex_unlock(&twl->lock); 589 590 if (cable_present(status)) { 591 if (atomic_add_unless(&twl->connected, 1, 1)) { 592 dev_dbg(twl->dev, "%s: cable connected %i\n", 593 __func__, status); 594 pm_runtime_get_sync(twl->dev); 595 twl->musb_mailbox_pending = true; 596 } 597 } else { 598 if (atomic_add_unless(&twl->connected, -1, 0)) { 599 dev_dbg(twl->dev, "%s: cable disconnected %i\n", 600 __func__, status); 601 pm_runtime_mark_last_busy(twl->dev); 602 pm_runtime_put_autosuspend(twl->dev); 603 twl->musb_mailbox_pending = true; 604 } 605 } 606 if (twl->musb_mailbox_pending) { 607 err = musb_mailbox(status); 608 if (!err) 609 twl->musb_mailbox_pending = false; 610 } 611 612 /* don't schedule during sleep - irq works right then */ 613 if (status == MUSB_ID_GROUND && pm_runtime_active(twl->dev)) { 614 cancel_delayed_work(&twl->id_workaround_work); 615 schedule_delayed_work(&twl->id_workaround_work, HZ); 616 } 617 618 if (irq) 619 sysfs_notify(&twl->dev->kobj, NULL, "vbus"); 620 621 return IRQ_HANDLED; 622 } 623 624 static void twl4030_id_workaround_work(struct work_struct *work) 625 { 626 struct twl4030_usb *twl = container_of(work, struct twl4030_usb, 627 id_workaround_work.work); 628 629 twl4030_usb_irq(0, twl); 630 } 631 632 static int twl4030_phy_init(struct phy *phy) 633 { 634 struct twl4030_usb *twl = phy_get_drvdata(phy); 635 636 pm_runtime_get_sync(twl->dev); 637 twl->linkstat = MUSB_UNKNOWN; 638 schedule_delayed_work(&twl->id_workaround_work, HZ); 639 pm_runtime_mark_last_busy(twl->dev); 640 pm_runtime_put_autosuspend(twl->dev); 641 642 return 0; 643 } 644 645 static int twl4030_set_peripheral(struct usb_otg *otg, 646 struct usb_gadget *gadget) 647 { 648 if (!otg) 649 return -ENODEV; 650 651 otg->gadget = gadget; 652 if (!gadget) 653 otg->state = OTG_STATE_UNDEFINED; 654 655 return 0; 656 } 657 658 static int twl4030_set_host(struct usb_otg *otg, struct usb_bus *host) 659 { 660 if (!otg) 661 return -ENODEV; 662 663 otg->host = host; 664 if (!host) 665 otg->state = OTG_STATE_UNDEFINED; 666 667 return 0; 668 } 669 670 static const struct phy_ops ops = { 671 .init = twl4030_phy_init, 672 .power_on = twl4030_phy_power_on, 673 .power_off = twl4030_phy_power_off, 674 .owner = THIS_MODULE, 675 }; 676 677 static const struct dev_pm_ops twl4030_usb_pm_ops = { 678 SET_RUNTIME_PM_OPS(twl4030_usb_runtime_suspend, 679 twl4030_usb_runtime_resume, NULL) 680 SET_SYSTEM_SLEEP_PM_OPS(twl4030_usb_suspend, twl4030_usb_resume) 681 }; 682 683 static int twl4030_usb_probe(struct platform_device *pdev) 684 { 685 struct twl4030_usb_data *pdata = dev_get_platdata(&pdev->dev); 686 struct twl4030_usb *twl; 687 struct phy *phy; 688 int status, err; 689 struct usb_otg *otg; 690 struct device_node *np = pdev->dev.of_node; 691 struct phy_provider *phy_provider; 692 693 twl = devm_kzalloc(&pdev->dev, sizeof(*twl), GFP_KERNEL); 694 if (!twl) 695 return -ENOMEM; 696 697 if (np) 698 of_property_read_u32(np, "usb_mode", 699 (enum twl4030_usb_mode *)&twl->usb_mode); 700 else if (pdata) { 701 twl->usb_mode = pdata->usb_mode; 702 } else { 703 dev_err(&pdev->dev, "twl4030 initialized without pdata\n"); 704 return -EINVAL; 705 } 706 707 otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL); 708 if (!otg) 709 return -ENOMEM; 710 711 twl->dev = &pdev->dev; 712 twl->irq = platform_get_irq(pdev, 0); 713 twl->vbus_supplied = false; 714 twl->linkstat = MUSB_UNKNOWN; 715 twl->musb_mailbox_pending = false; 716 717 twl->phy.dev = twl->dev; 718 twl->phy.label = "twl4030"; 719 twl->phy.otg = otg; 720 twl->phy.type = USB_PHY_TYPE_USB2; 721 722 otg->usb_phy = &twl->phy; 723 otg->set_host = twl4030_set_host; 724 otg->set_peripheral = twl4030_set_peripheral; 725 726 phy = devm_phy_create(twl->dev, NULL, &ops); 727 if (IS_ERR(phy)) { 728 dev_dbg(&pdev->dev, "Failed to create PHY\n"); 729 return PTR_ERR(phy); 730 } 731 732 phy_set_drvdata(phy, twl); 733 734 phy_provider = devm_of_phy_provider_register(twl->dev, 735 of_phy_simple_xlate); 736 if (IS_ERR(phy_provider)) 737 return PTR_ERR(phy_provider); 738 739 /* init mutex for workqueue */ 740 mutex_init(&twl->lock); 741 742 INIT_DELAYED_WORK(&twl->id_workaround_work, twl4030_id_workaround_work); 743 744 err = twl4030_usb_ldo_init(twl); 745 if (err) { 746 dev_err(&pdev->dev, "ldo init failed\n"); 747 return err; 748 } 749 usb_add_phy_dev(&twl->phy); 750 751 platform_set_drvdata(pdev, twl); 752 if (device_create_file(&pdev->dev, &dev_attr_vbus)) 753 dev_warn(&pdev->dev, "could not create sysfs file\n"); 754 755 ATOMIC_INIT_NOTIFIER_HEAD(&twl->phy.notifier); 756 757 pm_runtime_use_autosuspend(&pdev->dev); 758 pm_runtime_set_autosuspend_delay(&pdev->dev, 2000); 759 pm_runtime_enable(&pdev->dev); 760 pm_runtime_get_sync(&pdev->dev); 761 762 /* Our job is to use irqs and status from the power module 763 * to keep the transceiver disabled when nothing's connected. 764 * 765 * FIXME we actually shouldn't start enabling it until the 766 * USB controller drivers have said they're ready, by calling 767 * set_host() and/or set_peripheral() ... OTG_capable boards 768 * need both handles, otherwise just one suffices. 769 */ 770 status = devm_request_threaded_irq(twl->dev, twl->irq, NULL, 771 twl4030_usb_irq, IRQF_TRIGGER_FALLING | 772 IRQF_TRIGGER_RISING | IRQF_ONESHOT, "twl4030_usb", twl); 773 if (status < 0) { 774 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n", 775 twl->irq, status); 776 return status; 777 } 778 779 if (pdata) 780 err = phy_create_lookup(phy, "usb", "musb-hdrc.0"); 781 if (err) 782 return err; 783 784 pm_runtime_mark_last_busy(&pdev->dev); 785 pm_runtime_put_autosuspend(twl->dev); 786 787 dev_info(&pdev->dev, "Initialized TWL4030 USB module\n"); 788 return 0; 789 } 790 791 static void twl4030_usb_remove(struct platform_device *pdev) 792 { 793 struct twl4030_usb *twl = platform_get_drvdata(pdev); 794 int val; 795 796 usb_remove_phy(&twl->phy); 797 pm_runtime_get_sync(twl->dev); 798 cancel_delayed_work_sync(&twl->id_workaround_work); 799 device_remove_file(twl->dev, &dev_attr_vbus); 800 801 /* set transceiver mode to power on defaults */ 802 twl4030_usb_set_mode(twl, -1); 803 804 /* idle ulpi before powering off */ 805 if (cable_present(twl->linkstat)) 806 pm_runtime_put_noidle(twl->dev); 807 pm_runtime_mark_last_busy(twl->dev); 808 pm_runtime_dont_use_autosuspend(&pdev->dev); 809 pm_runtime_put_sync(twl->dev); 810 pm_runtime_disable(twl->dev); 811 812 /* autogate 60MHz ULPI clock, 813 * clear dpll clock request for i2c access, 814 * disable 32KHz 815 */ 816 val = twl4030_usb_read(twl, PHY_CLK_CTRL); 817 if (val >= 0) { 818 val |= PHY_CLK_CTRL_CLOCKGATING_EN; 819 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK); 820 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val); 821 } 822 823 /* disable complete OTG block */ 824 twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB); 825 } 826 827 #ifdef CONFIG_OF 828 static const struct of_device_id twl4030_usb_id_table[] = { 829 { .compatible = "ti,twl4030-usb" }, 830 {} 831 }; 832 MODULE_DEVICE_TABLE(of, twl4030_usb_id_table); 833 #endif 834 835 static struct platform_driver twl4030_usb_driver = { 836 .probe = twl4030_usb_probe, 837 .remove_new = twl4030_usb_remove, 838 .driver = { 839 .name = "twl4030_usb", 840 .pm = &twl4030_usb_pm_ops, 841 .of_match_table = of_match_ptr(twl4030_usb_id_table), 842 }, 843 }; 844 845 static int __init twl4030_usb_init(void) 846 { 847 return platform_driver_register(&twl4030_usb_driver); 848 } 849 subsys_initcall(twl4030_usb_init); 850 851 static void __exit twl4030_usb_exit(void) 852 { 853 platform_driver_unregister(&twl4030_usb_driver); 854 } 855 module_exit(twl4030_usb_exit); 856 857 MODULE_ALIAS("platform:twl4030_usb"); 858 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation"); 859 MODULE_DESCRIPTION("TWL4030 USB transceiver driver"); 860 MODULE_LICENSE("GPL"); 861