1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2015, Google Inc. 5 */ 6 7 #ifndef __PHY_TEGRA_XUSB_H 8 #define __PHY_TEGRA_XUSB_H 9 10 #include <linux/io.h> 11 #include <linux/mutex.h> 12 #include <linux/workqueue.h> 13 14 #include <linux/usb/otg.h> 15 16 /* legacy entry points for backwards-compatibility */ 17 int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev); 18 int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev); 19 20 struct phy; 21 struct phy_provider; 22 struct platform_device; 23 struct regulator; 24 25 /* 26 * lanes 27 */ 28 struct tegra_xusb_lane_soc { 29 const char *name; 30 31 unsigned int offset; 32 unsigned int shift; 33 unsigned int mask; 34 35 const char * const *funcs; 36 unsigned int num_funcs; 37 }; 38 39 struct tegra_xusb_lane { 40 const struct tegra_xusb_lane_soc *soc; 41 struct tegra_xusb_pad *pad; 42 struct device_node *np; 43 struct list_head list; 44 unsigned int function; 45 unsigned int index; 46 }; 47 48 int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane, 49 struct device_node *np); 50 51 struct tegra_xusb_usb3_lane { 52 struct tegra_xusb_lane base; 53 }; 54 55 static inline struct tegra_xusb_usb3_lane * 56 to_usb3_lane(struct tegra_xusb_lane *lane) 57 { 58 return container_of(lane, struct tegra_xusb_usb3_lane, base); 59 } 60 61 struct tegra_xusb_usb2_lane { 62 struct tegra_xusb_lane base; 63 64 u32 hs_curr_level_offset; 65 bool powered_on; 66 }; 67 68 static inline struct tegra_xusb_usb2_lane * 69 to_usb2_lane(struct tegra_xusb_lane *lane) 70 { 71 return container_of(lane, struct tegra_xusb_usb2_lane, base); 72 } 73 74 struct tegra_xusb_ulpi_lane { 75 struct tegra_xusb_lane base; 76 }; 77 78 static inline struct tegra_xusb_ulpi_lane * 79 to_ulpi_lane(struct tegra_xusb_lane *lane) 80 { 81 return container_of(lane, struct tegra_xusb_ulpi_lane, base); 82 } 83 84 struct tegra_xusb_hsic_lane { 85 struct tegra_xusb_lane base; 86 87 u32 strobe_trim; 88 u32 rx_strobe_trim; 89 u32 rx_data_trim; 90 u32 tx_rtune_n; 91 u32 tx_rtune_p; 92 u32 tx_rslew_n; 93 u32 tx_rslew_p; 94 bool auto_term; 95 }; 96 97 static inline struct tegra_xusb_hsic_lane * 98 to_hsic_lane(struct tegra_xusb_lane *lane) 99 { 100 return container_of(lane, struct tegra_xusb_hsic_lane, base); 101 } 102 103 struct tegra_xusb_pcie_lane { 104 struct tegra_xusb_lane base; 105 }; 106 107 static inline struct tegra_xusb_pcie_lane * 108 to_pcie_lane(struct tegra_xusb_lane *lane) 109 { 110 return container_of(lane, struct tegra_xusb_pcie_lane, base); 111 } 112 113 struct tegra_xusb_sata_lane { 114 struct tegra_xusb_lane base; 115 }; 116 117 static inline struct tegra_xusb_sata_lane * 118 to_sata_lane(struct tegra_xusb_lane *lane) 119 { 120 return container_of(lane, struct tegra_xusb_sata_lane, base); 121 } 122 123 struct tegra_xusb_lane_ops { 124 struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad, 125 struct device_node *np, 126 unsigned int index); 127 void (*remove)(struct tegra_xusb_lane *lane); 128 }; 129 130 /* 131 * pads 132 */ 133 struct tegra_xusb_pad_soc; 134 struct tegra_xusb_padctl; 135 136 struct tegra_xusb_pad_ops { 137 struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl, 138 const struct tegra_xusb_pad_soc *soc, 139 struct device_node *np); 140 void (*remove)(struct tegra_xusb_pad *pad); 141 }; 142 143 struct tegra_xusb_pad_soc { 144 const char *name; 145 146 const struct tegra_xusb_lane_soc *lanes; 147 unsigned int num_lanes; 148 149 const struct tegra_xusb_pad_ops *ops; 150 }; 151 152 struct tegra_xusb_pad { 153 const struct tegra_xusb_pad_soc *soc; 154 struct tegra_xusb_padctl *padctl; 155 struct phy_provider *provider; 156 struct phy **lanes; 157 struct device dev; 158 159 const struct tegra_xusb_lane_ops *ops; 160 161 struct list_head list; 162 }; 163 164 static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev) 165 { 166 return container_of(dev, struct tegra_xusb_pad, dev); 167 } 168 169 int tegra_xusb_pad_init(struct tegra_xusb_pad *pad, 170 struct tegra_xusb_padctl *padctl, 171 struct device_node *np); 172 int tegra_xusb_pad_register(struct tegra_xusb_pad *pad, 173 const struct phy_ops *ops); 174 void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad); 175 176 struct tegra_xusb_usb3_pad { 177 struct tegra_xusb_pad base; 178 179 unsigned int enable; 180 struct mutex lock; 181 }; 182 183 static inline struct tegra_xusb_usb3_pad * 184 to_usb3_pad(struct tegra_xusb_pad *pad) 185 { 186 return container_of(pad, struct tegra_xusb_usb3_pad, base); 187 } 188 189 struct tegra_xusb_usb2_pad { 190 struct tegra_xusb_pad base; 191 192 struct clk *clk; 193 unsigned int enable; 194 struct mutex lock; 195 }; 196 197 static inline struct tegra_xusb_usb2_pad * 198 to_usb2_pad(struct tegra_xusb_pad *pad) 199 { 200 return container_of(pad, struct tegra_xusb_usb2_pad, base); 201 } 202 203 struct tegra_xusb_ulpi_pad { 204 struct tegra_xusb_pad base; 205 }; 206 207 static inline struct tegra_xusb_ulpi_pad * 208 to_ulpi_pad(struct tegra_xusb_pad *pad) 209 { 210 return container_of(pad, struct tegra_xusb_ulpi_pad, base); 211 } 212 213 struct tegra_xusb_hsic_pad { 214 struct tegra_xusb_pad base; 215 216 struct regulator *supply; 217 struct clk *clk; 218 }; 219 220 static inline struct tegra_xusb_hsic_pad * 221 to_hsic_pad(struct tegra_xusb_pad *pad) 222 { 223 return container_of(pad, struct tegra_xusb_hsic_pad, base); 224 } 225 226 struct tegra_xusb_pcie_pad { 227 struct tegra_xusb_pad base; 228 229 struct reset_control *rst; 230 struct clk *pll; 231 232 unsigned int enable; 233 }; 234 235 static inline struct tegra_xusb_pcie_pad * 236 to_pcie_pad(struct tegra_xusb_pad *pad) 237 { 238 return container_of(pad, struct tegra_xusb_pcie_pad, base); 239 } 240 241 struct tegra_xusb_sata_pad { 242 struct tegra_xusb_pad base; 243 244 struct reset_control *rst; 245 struct clk *pll; 246 247 unsigned int enable; 248 }; 249 250 static inline struct tegra_xusb_sata_pad * 251 to_sata_pad(struct tegra_xusb_pad *pad) 252 { 253 return container_of(pad, struct tegra_xusb_sata_pad, base); 254 } 255 256 /* 257 * ports 258 */ 259 struct tegra_xusb_port_ops; 260 261 struct tegra_xusb_port { 262 struct tegra_xusb_padctl *padctl; 263 struct tegra_xusb_lane *lane; 264 unsigned int index; 265 266 struct list_head list; 267 struct device dev; 268 269 const struct tegra_xusb_port_ops *ops; 270 }; 271 272 struct tegra_xusb_lane_map { 273 unsigned int port; 274 const char *type; 275 unsigned int index; 276 const char *func; 277 }; 278 279 struct tegra_xusb_lane * 280 tegra_xusb_port_find_lane(struct tegra_xusb_port *port, 281 const struct tegra_xusb_lane_map *map, 282 const char *function); 283 284 struct tegra_xusb_port * 285 tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type, 286 unsigned int index); 287 288 struct tegra_xusb_usb2_port { 289 struct tegra_xusb_port base; 290 291 struct regulator *supply; 292 enum usb_dr_mode mode; 293 bool internal; 294 }; 295 296 static inline struct tegra_xusb_usb2_port * 297 to_usb2_port(struct tegra_xusb_port *port) 298 { 299 return container_of(port, struct tegra_xusb_usb2_port, base); 300 } 301 302 struct tegra_xusb_usb2_port * 303 tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl, 304 unsigned int index); 305 306 struct tegra_xusb_ulpi_port { 307 struct tegra_xusb_port base; 308 309 struct regulator *supply; 310 bool internal; 311 }; 312 313 static inline struct tegra_xusb_ulpi_port * 314 to_ulpi_port(struct tegra_xusb_port *port) 315 { 316 return container_of(port, struct tegra_xusb_ulpi_port, base); 317 } 318 319 struct tegra_xusb_hsic_port { 320 struct tegra_xusb_port base; 321 }; 322 323 static inline struct tegra_xusb_hsic_port * 324 to_hsic_port(struct tegra_xusb_port *port) 325 { 326 return container_of(port, struct tegra_xusb_hsic_port, base); 327 } 328 329 struct tegra_xusb_usb3_port { 330 struct tegra_xusb_port base; 331 struct regulator *supply; 332 bool context_saved; 333 unsigned int port; 334 bool internal; 335 336 u32 tap1; 337 u32 amp; 338 u32 ctle_z; 339 u32 ctle_g; 340 }; 341 342 static inline struct tegra_xusb_usb3_port * 343 to_usb3_port(struct tegra_xusb_port *port) 344 { 345 return container_of(port, struct tegra_xusb_usb3_port, base); 346 } 347 348 struct tegra_xusb_usb3_port * 349 tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl, 350 unsigned int index); 351 352 struct tegra_xusb_port_ops { 353 int (*enable)(struct tegra_xusb_port *port); 354 void (*disable)(struct tegra_xusb_port *port); 355 struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port); 356 }; 357 358 /* 359 * pad controller 360 */ 361 struct tegra_xusb_padctl_soc; 362 363 struct tegra_xusb_padctl_ops { 364 struct tegra_xusb_padctl * 365 (*probe)(struct device *dev, 366 const struct tegra_xusb_padctl_soc *soc); 367 void (*remove)(struct tegra_xusb_padctl *padctl); 368 369 int (*usb3_save_context)(struct tegra_xusb_padctl *padctl, 370 unsigned int index); 371 int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl, 372 unsigned int index, bool idle); 373 int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl, 374 unsigned int index, bool enable); 375 }; 376 377 struct tegra_xusb_padctl_soc { 378 const struct tegra_xusb_pad_soc * const *pads; 379 unsigned int num_pads; 380 381 struct { 382 struct { 383 const struct tegra_xusb_port_ops *ops; 384 unsigned int count; 385 } usb2, ulpi, hsic, usb3; 386 } ports; 387 388 const struct tegra_xusb_padctl_ops *ops; 389 390 const char * const *supply_names; 391 unsigned int num_supplies; 392 }; 393 394 struct tegra_xusb_padctl { 395 struct device *dev; 396 void __iomem *regs; 397 struct mutex lock; 398 struct reset_control *rst; 399 400 const struct tegra_xusb_padctl_soc *soc; 401 402 struct tegra_xusb_pad *pcie; 403 struct tegra_xusb_pad *sata; 404 struct tegra_xusb_pad *ulpi; 405 struct tegra_xusb_pad *usb2; 406 struct tegra_xusb_pad *hsic; 407 408 struct list_head ports; 409 struct list_head lanes; 410 struct list_head pads; 411 412 unsigned int enable; 413 414 struct clk *clk; 415 416 struct regulator_bulk_data *supplies; 417 }; 418 419 static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value, 420 unsigned long offset) 421 { 422 dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value); 423 writel(value, padctl->regs + offset); 424 } 425 426 static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl, 427 unsigned long offset) 428 { 429 u32 value = readl(padctl->regs + offset); 430 dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value); 431 return value; 432 } 433 434 struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl, 435 const char *name, 436 unsigned int index); 437 438 #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) 439 extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc; 440 #endif 441 #if defined(CONFIG_ARCH_TEGRA_210_SOC) 442 extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc; 443 #endif 444 #if defined(CONFIG_ARCH_TEGRA_186_SOC) 445 extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc; 446 #endif 447 448 #endif /* __PHY_TEGRA_XUSB_H */ 449