1 /* 2 * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. 3 * Copyright (c) 2015, Google Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 */ 14 15 #ifndef __PHY_TEGRA_XUSB_H 16 #define __PHY_TEGRA_XUSB_H 17 18 #include <linux/io.h> 19 #include <linux/mutex.h> 20 #include <linux/workqueue.h> 21 22 #include <linux/usb/otg.h> 23 24 /* legacy entry points for backwards-compatibility */ 25 int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev); 26 int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev); 27 28 struct phy; 29 struct phy_provider; 30 struct platform_device; 31 struct regulator; 32 33 /* 34 * lanes 35 */ 36 struct tegra_xusb_lane_soc { 37 const char *name; 38 39 unsigned int offset; 40 unsigned int shift; 41 unsigned int mask; 42 43 const char * const *funcs; 44 unsigned int num_funcs; 45 }; 46 47 struct tegra_xusb_lane { 48 const struct tegra_xusb_lane_soc *soc; 49 struct tegra_xusb_pad *pad; 50 struct device_node *np; 51 struct list_head list; 52 unsigned int function; 53 unsigned int index; 54 }; 55 56 int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane, 57 struct device_node *np); 58 59 struct tegra_xusb_usb3_lane { 60 struct tegra_xusb_lane base; 61 }; 62 63 static inline struct tegra_xusb_usb3_lane * 64 to_usb3_lane(struct tegra_xusb_lane *lane) 65 { 66 return container_of(lane, struct tegra_xusb_usb3_lane, base); 67 } 68 69 struct tegra_xusb_usb2_lane { 70 struct tegra_xusb_lane base; 71 72 u32 hs_curr_level_offset; 73 bool powered_on; 74 }; 75 76 static inline struct tegra_xusb_usb2_lane * 77 to_usb2_lane(struct tegra_xusb_lane *lane) 78 { 79 return container_of(lane, struct tegra_xusb_usb2_lane, base); 80 } 81 82 struct tegra_xusb_ulpi_lane { 83 struct tegra_xusb_lane base; 84 }; 85 86 static inline struct tegra_xusb_ulpi_lane * 87 to_ulpi_lane(struct tegra_xusb_lane *lane) 88 { 89 return container_of(lane, struct tegra_xusb_ulpi_lane, base); 90 } 91 92 struct tegra_xusb_hsic_lane { 93 struct tegra_xusb_lane base; 94 95 u32 strobe_trim; 96 u32 rx_strobe_trim; 97 u32 rx_data_trim; 98 u32 tx_rtune_n; 99 u32 tx_rtune_p; 100 u32 tx_rslew_n; 101 u32 tx_rslew_p; 102 bool auto_term; 103 }; 104 105 static inline struct tegra_xusb_hsic_lane * 106 to_hsic_lane(struct tegra_xusb_lane *lane) 107 { 108 return container_of(lane, struct tegra_xusb_hsic_lane, base); 109 } 110 111 struct tegra_xusb_pcie_lane { 112 struct tegra_xusb_lane base; 113 }; 114 115 static inline struct tegra_xusb_pcie_lane * 116 to_pcie_lane(struct tegra_xusb_lane *lane) 117 { 118 return container_of(lane, struct tegra_xusb_pcie_lane, base); 119 } 120 121 struct tegra_xusb_sata_lane { 122 struct tegra_xusb_lane base; 123 }; 124 125 static inline struct tegra_xusb_sata_lane * 126 to_sata_lane(struct tegra_xusb_lane *lane) 127 { 128 return container_of(lane, struct tegra_xusb_sata_lane, base); 129 } 130 131 struct tegra_xusb_lane_ops { 132 struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad, 133 struct device_node *np, 134 unsigned int index); 135 void (*remove)(struct tegra_xusb_lane *lane); 136 }; 137 138 /* 139 * pads 140 */ 141 struct tegra_xusb_pad_soc; 142 struct tegra_xusb_padctl; 143 144 struct tegra_xusb_pad_ops { 145 struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl, 146 const struct tegra_xusb_pad_soc *soc, 147 struct device_node *np); 148 void (*remove)(struct tegra_xusb_pad *pad); 149 }; 150 151 struct tegra_xusb_pad_soc { 152 const char *name; 153 154 const struct tegra_xusb_lane_soc *lanes; 155 unsigned int num_lanes; 156 157 const struct tegra_xusb_pad_ops *ops; 158 }; 159 160 struct tegra_xusb_pad { 161 const struct tegra_xusb_pad_soc *soc; 162 struct tegra_xusb_padctl *padctl; 163 struct phy_provider *provider; 164 struct phy **lanes; 165 struct device dev; 166 167 const struct tegra_xusb_lane_ops *ops; 168 169 struct list_head list; 170 }; 171 172 static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev) 173 { 174 return container_of(dev, struct tegra_xusb_pad, dev); 175 } 176 177 int tegra_xusb_pad_init(struct tegra_xusb_pad *pad, 178 struct tegra_xusb_padctl *padctl, 179 struct device_node *np); 180 int tegra_xusb_pad_register(struct tegra_xusb_pad *pad, 181 const struct phy_ops *ops); 182 void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad); 183 184 struct tegra_xusb_usb3_pad { 185 struct tegra_xusb_pad base; 186 187 unsigned int enable; 188 struct mutex lock; 189 }; 190 191 static inline struct tegra_xusb_usb3_pad * 192 to_usb3_pad(struct tegra_xusb_pad *pad) 193 { 194 return container_of(pad, struct tegra_xusb_usb3_pad, base); 195 } 196 197 struct tegra_xusb_usb2_pad { 198 struct tegra_xusb_pad base; 199 200 struct clk *clk; 201 unsigned int enable; 202 struct mutex lock; 203 }; 204 205 static inline struct tegra_xusb_usb2_pad * 206 to_usb2_pad(struct tegra_xusb_pad *pad) 207 { 208 return container_of(pad, struct tegra_xusb_usb2_pad, base); 209 } 210 211 struct tegra_xusb_ulpi_pad { 212 struct tegra_xusb_pad base; 213 }; 214 215 static inline struct tegra_xusb_ulpi_pad * 216 to_ulpi_pad(struct tegra_xusb_pad *pad) 217 { 218 return container_of(pad, struct tegra_xusb_ulpi_pad, base); 219 } 220 221 struct tegra_xusb_hsic_pad { 222 struct tegra_xusb_pad base; 223 224 struct regulator *supply; 225 struct clk *clk; 226 }; 227 228 static inline struct tegra_xusb_hsic_pad * 229 to_hsic_pad(struct tegra_xusb_pad *pad) 230 { 231 return container_of(pad, struct tegra_xusb_hsic_pad, base); 232 } 233 234 struct tegra_xusb_pcie_pad { 235 struct tegra_xusb_pad base; 236 237 struct reset_control *rst; 238 struct clk *pll; 239 240 unsigned int enable; 241 }; 242 243 static inline struct tegra_xusb_pcie_pad * 244 to_pcie_pad(struct tegra_xusb_pad *pad) 245 { 246 return container_of(pad, struct tegra_xusb_pcie_pad, base); 247 } 248 249 struct tegra_xusb_sata_pad { 250 struct tegra_xusb_pad base; 251 252 struct reset_control *rst; 253 struct clk *pll; 254 255 unsigned int enable; 256 }; 257 258 static inline struct tegra_xusb_sata_pad * 259 to_sata_pad(struct tegra_xusb_pad *pad) 260 { 261 return container_of(pad, struct tegra_xusb_sata_pad, base); 262 } 263 264 /* 265 * ports 266 */ 267 struct tegra_xusb_port_ops; 268 269 struct tegra_xusb_port { 270 struct tegra_xusb_padctl *padctl; 271 struct tegra_xusb_lane *lane; 272 unsigned int index; 273 274 struct list_head list; 275 struct device dev; 276 277 const struct tegra_xusb_port_ops *ops; 278 }; 279 280 struct tegra_xusb_lane_map { 281 unsigned int port; 282 const char *type; 283 unsigned int index; 284 const char *func; 285 }; 286 287 struct tegra_xusb_lane * 288 tegra_xusb_port_find_lane(struct tegra_xusb_port *port, 289 const struct tegra_xusb_lane_map *map, 290 const char *function); 291 292 struct tegra_xusb_port * 293 tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type, 294 unsigned int index); 295 296 struct tegra_xusb_usb2_port { 297 struct tegra_xusb_port base; 298 299 struct regulator *supply; 300 enum usb_dr_mode mode; 301 bool internal; 302 }; 303 304 static inline struct tegra_xusb_usb2_port * 305 to_usb2_port(struct tegra_xusb_port *port) 306 { 307 return container_of(port, struct tegra_xusb_usb2_port, base); 308 } 309 310 struct tegra_xusb_usb2_port * 311 tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl, 312 unsigned int index); 313 314 struct tegra_xusb_ulpi_port { 315 struct tegra_xusb_port base; 316 317 struct regulator *supply; 318 bool internal; 319 }; 320 321 static inline struct tegra_xusb_ulpi_port * 322 to_ulpi_port(struct tegra_xusb_port *port) 323 { 324 return container_of(port, struct tegra_xusb_ulpi_port, base); 325 } 326 327 struct tegra_xusb_hsic_port { 328 struct tegra_xusb_port base; 329 }; 330 331 static inline struct tegra_xusb_hsic_port * 332 to_hsic_port(struct tegra_xusb_port *port) 333 { 334 return container_of(port, struct tegra_xusb_hsic_port, base); 335 } 336 337 struct tegra_xusb_usb3_port { 338 struct tegra_xusb_port base; 339 struct regulator *supply; 340 bool context_saved; 341 unsigned int port; 342 bool internal; 343 344 u32 tap1; 345 u32 amp; 346 u32 ctle_z; 347 u32 ctle_g; 348 }; 349 350 static inline struct tegra_xusb_usb3_port * 351 to_usb3_port(struct tegra_xusb_port *port) 352 { 353 return container_of(port, struct tegra_xusb_usb3_port, base); 354 } 355 356 struct tegra_xusb_usb3_port * 357 tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl, 358 unsigned int index); 359 360 struct tegra_xusb_port_ops { 361 int (*enable)(struct tegra_xusb_port *port); 362 void (*disable)(struct tegra_xusb_port *port); 363 struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port); 364 }; 365 366 /* 367 * pad controller 368 */ 369 struct tegra_xusb_padctl_soc; 370 371 struct tegra_xusb_padctl_ops { 372 struct tegra_xusb_padctl * 373 (*probe)(struct device *dev, 374 const struct tegra_xusb_padctl_soc *soc); 375 void (*remove)(struct tegra_xusb_padctl *padctl); 376 377 int (*usb3_save_context)(struct tegra_xusb_padctl *padctl, 378 unsigned int index); 379 int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl, 380 unsigned int index, bool idle); 381 int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl, 382 unsigned int index, bool enable); 383 }; 384 385 struct tegra_xusb_padctl_soc { 386 const struct tegra_xusb_pad_soc * const *pads; 387 unsigned int num_pads; 388 389 struct { 390 struct { 391 const struct tegra_xusb_port_ops *ops; 392 unsigned int count; 393 } usb2, ulpi, hsic, usb3; 394 } ports; 395 396 const struct tegra_xusb_padctl_ops *ops; 397 398 const char * const *supply_names; 399 unsigned int num_supplies; 400 }; 401 402 struct tegra_xusb_padctl { 403 struct device *dev; 404 void __iomem *regs; 405 struct mutex lock; 406 struct reset_control *rst; 407 408 const struct tegra_xusb_padctl_soc *soc; 409 410 struct tegra_xusb_pad *pcie; 411 struct tegra_xusb_pad *sata; 412 struct tegra_xusb_pad *ulpi; 413 struct tegra_xusb_pad *usb2; 414 struct tegra_xusb_pad *hsic; 415 416 struct list_head ports; 417 struct list_head lanes; 418 struct list_head pads; 419 420 unsigned int enable; 421 422 struct clk *clk; 423 424 struct regulator_bulk_data *supplies; 425 }; 426 427 static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value, 428 unsigned long offset) 429 { 430 dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value); 431 writel(value, padctl->regs + offset); 432 } 433 434 static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl, 435 unsigned long offset) 436 { 437 u32 value = readl(padctl->regs + offset); 438 dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value); 439 return value; 440 } 441 442 struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl, 443 const char *name, 444 unsigned int index); 445 446 #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) 447 extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc; 448 #endif 449 #if defined(CONFIG_ARCH_TEGRA_210_SOC) 450 extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc; 451 #endif 452 #if defined(CONFIG_ARCH_TEGRA_186_SOC) 453 extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc; 454 #endif 455 456 #endif /* __PHY_TEGRA_XUSB_H */ 457