1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
20b56e9a7SVivek Gautam /*
30b56e9a7SVivek Gautam  * Samsung SoC USB 1.1/2.0 PHY driver - S5PV210 support
40b56e9a7SVivek Gautam  *
50b56e9a7SVivek Gautam  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
60b56e9a7SVivek Gautam  * Authors: Kamil Debski <k.debski@samsung.com>
70b56e9a7SVivek Gautam  */
80b56e9a7SVivek Gautam 
90b56e9a7SVivek Gautam #include <linux/delay.h>
100b56e9a7SVivek Gautam #include <linux/io.h>
110b56e9a7SVivek Gautam #include <linux/phy/phy.h>
120b56e9a7SVivek Gautam #include "phy-samsung-usb2.h"
130b56e9a7SVivek Gautam 
140b56e9a7SVivek Gautam /* Exynos USB PHY registers */
150b56e9a7SVivek Gautam 
160b56e9a7SVivek Gautam /* PHY power control */
170b56e9a7SVivek Gautam #define S5PV210_UPHYPWR			0x0
180b56e9a7SVivek Gautam 
190b56e9a7SVivek Gautam #define S5PV210_UPHYPWR_PHY0_SUSPEND	BIT(0)
200b56e9a7SVivek Gautam #define S5PV210_UPHYPWR_PHY0_PWR	BIT(3)
210b56e9a7SVivek Gautam #define S5PV210_UPHYPWR_PHY0_OTG_PWR	BIT(4)
220b56e9a7SVivek Gautam #define S5PV210_UPHYPWR_PHY0	( \
230b56e9a7SVivek Gautam 	S5PV210_UPHYPWR_PHY0_SUSPEND | \
240b56e9a7SVivek Gautam 	S5PV210_UPHYPWR_PHY0_PWR | \
250b56e9a7SVivek Gautam 	S5PV210_UPHYPWR_PHY0_OTG_PWR)
260b56e9a7SVivek Gautam 
270b56e9a7SVivek Gautam #define S5PV210_UPHYPWR_PHY1_SUSPEND	BIT(6)
280b56e9a7SVivek Gautam #define S5PV210_UPHYPWR_PHY1_PWR	BIT(7)
290b56e9a7SVivek Gautam #define S5PV210_UPHYPWR_PHY1 ( \
300b56e9a7SVivek Gautam 	S5PV210_UPHYPWR_PHY1_SUSPEND | \
310b56e9a7SVivek Gautam 	S5PV210_UPHYPWR_PHY1_PWR)
320b56e9a7SVivek Gautam 
330b56e9a7SVivek Gautam /* PHY clock control */
340b56e9a7SVivek Gautam #define S5PV210_UPHYCLK			0x4
350b56e9a7SVivek Gautam 
360b56e9a7SVivek Gautam #define S5PV210_UPHYCLK_PHYFSEL_MASK	(0x3 << 0)
370b56e9a7SVivek Gautam #define S5PV210_UPHYCLK_PHYFSEL_48MHZ	(0x0 << 0)
380b56e9a7SVivek Gautam #define S5PV210_UPHYCLK_PHYFSEL_24MHZ	(0x3 << 0)
390b56e9a7SVivek Gautam #define S5PV210_UPHYCLK_PHYFSEL_12MHZ	(0x2 << 0)
400b56e9a7SVivek Gautam 
410b56e9a7SVivek Gautam #define S5PV210_UPHYCLK_PHY0_ID_PULLUP	BIT(2)
420b56e9a7SVivek Gautam #define S5PV210_UPHYCLK_PHY0_COMMON_ON	BIT(4)
430b56e9a7SVivek Gautam #define S5PV210_UPHYCLK_PHY1_COMMON_ON	BIT(7)
440b56e9a7SVivek Gautam 
450b56e9a7SVivek Gautam /* PHY reset control */
460b56e9a7SVivek Gautam #define S5PV210_UPHYRST			0x8
470b56e9a7SVivek Gautam 
480b56e9a7SVivek Gautam #define S5PV210_URSTCON_PHY0		BIT(0)
490b56e9a7SVivek Gautam #define S5PV210_URSTCON_OTG_HLINK	BIT(1)
500b56e9a7SVivek Gautam #define S5PV210_URSTCON_OTG_PHYLINK	BIT(2)
510b56e9a7SVivek Gautam #define S5PV210_URSTCON_PHY1_ALL	BIT(3)
520b56e9a7SVivek Gautam #define S5PV210_URSTCON_HOST_LINK_ALL	BIT(4)
530b56e9a7SVivek Gautam 
540b56e9a7SVivek Gautam /* Isolation, configured in the power management unit */
550b56e9a7SVivek Gautam #define S5PV210_USB_ISOL_OFFSET		0x680c
560b56e9a7SVivek Gautam #define S5PV210_USB_ISOL_DEVICE		BIT(0)
570b56e9a7SVivek Gautam #define S5PV210_USB_ISOL_HOST		BIT(1)
580b56e9a7SVivek Gautam 
590b56e9a7SVivek Gautam 
600b56e9a7SVivek Gautam enum s5pv210_phy_id {
610b56e9a7SVivek Gautam 	S5PV210_DEVICE,
620b56e9a7SVivek Gautam 	S5PV210_HOST,
630b56e9a7SVivek Gautam 	S5PV210_NUM_PHYS,
640b56e9a7SVivek Gautam };
650b56e9a7SVivek Gautam 
660b56e9a7SVivek Gautam /*
670b56e9a7SVivek Gautam  * s5pv210_rate_to_clk() converts the supplied clock rate to the value that
680b56e9a7SVivek Gautam  * can be written to the phy register.
690b56e9a7SVivek Gautam  */
s5pv210_rate_to_clk(unsigned long rate,u32 * reg)700b56e9a7SVivek Gautam static int s5pv210_rate_to_clk(unsigned long rate, u32 *reg)
710b56e9a7SVivek Gautam {
720b56e9a7SVivek Gautam 	switch (rate) {
730b56e9a7SVivek Gautam 	case 12 * MHZ:
740b56e9a7SVivek Gautam 		*reg = S5PV210_UPHYCLK_PHYFSEL_12MHZ;
750b56e9a7SVivek Gautam 		break;
760b56e9a7SVivek Gautam 	case 24 * MHZ:
770b56e9a7SVivek Gautam 		*reg = S5PV210_UPHYCLK_PHYFSEL_24MHZ;
780b56e9a7SVivek Gautam 		break;
790b56e9a7SVivek Gautam 	case 48 * MHZ:
800b56e9a7SVivek Gautam 		*reg = S5PV210_UPHYCLK_PHYFSEL_48MHZ;
810b56e9a7SVivek Gautam 		break;
820b56e9a7SVivek Gautam 	default:
830b56e9a7SVivek Gautam 		return -EINVAL;
840b56e9a7SVivek Gautam 	}
850b56e9a7SVivek Gautam 
860b56e9a7SVivek Gautam 	return 0;
870b56e9a7SVivek Gautam }
880b56e9a7SVivek Gautam 
s5pv210_isol(struct samsung_usb2_phy_instance * inst,bool on)890b56e9a7SVivek Gautam static void s5pv210_isol(struct samsung_usb2_phy_instance *inst, bool on)
900b56e9a7SVivek Gautam {
910b56e9a7SVivek Gautam 	struct samsung_usb2_phy_driver *drv = inst->drv;
920b56e9a7SVivek Gautam 	u32 mask;
930b56e9a7SVivek Gautam 
940b56e9a7SVivek Gautam 	switch (inst->cfg->id) {
950b56e9a7SVivek Gautam 	case S5PV210_DEVICE:
960b56e9a7SVivek Gautam 		mask = S5PV210_USB_ISOL_DEVICE;
970b56e9a7SVivek Gautam 		break;
980b56e9a7SVivek Gautam 	case S5PV210_HOST:
990b56e9a7SVivek Gautam 		mask = S5PV210_USB_ISOL_HOST;
1000b56e9a7SVivek Gautam 		break;
1010b56e9a7SVivek Gautam 	default:
1020b56e9a7SVivek Gautam 		return;
1030b56e9a7SVivek Gautam 	}
1040b56e9a7SVivek Gautam 
1050b56e9a7SVivek Gautam 	regmap_update_bits(drv->reg_pmu, S5PV210_USB_ISOL_OFFSET,
1060b56e9a7SVivek Gautam 							mask, on ? 0 : mask);
1070b56e9a7SVivek Gautam }
1080b56e9a7SVivek Gautam 
s5pv210_phy_pwr(struct samsung_usb2_phy_instance * inst,bool on)1090b56e9a7SVivek Gautam static void s5pv210_phy_pwr(struct samsung_usb2_phy_instance *inst, bool on)
1100b56e9a7SVivek Gautam {
1110b56e9a7SVivek Gautam 	struct samsung_usb2_phy_driver *drv = inst->drv;
1120b56e9a7SVivek Gautam 	u32 rstbits = 0;
1130b56e9a7SVivek Gautam 	u32 phypwr = 0;
1140b56e9a7SVivek Gautam 	u32 rst;
1150b56e9a7SVivek Gautam 	u32 pwr;
1160b56e9a7SVivek Gautam 
1170b56e9a7SVivek Gautam 	switch (inst->cfg->id) {
1180b56e9a7SVivek Gautam 	case S5PV210_DEVICE:
1190b56e9a7SVivek Gautam 		phypwr =	S5PV210_UPHYPWR_PHY0;
1200b56e9a7SVivek Gautam 		rstbits =	S5PV210_URSTCON_PHY0;
1210b56e9a7SVivek Gautam 		break;
1220b56e9a7SVivek Gautam 	case S5PV210_HOST:
1230b56e9a7SVivek Gautam 		phypwr =	S5PV210_UPHYPWR_PHY1;
1240b56e9a7SVivek Gautam 		rstbits =	S5PV210_URSTCON_PHY1_ALL |
1250b56e9a7SVivek Gautam 				S5PV210_URSTCON_HOST_LINK_ALL;
1260b56e9a7SVivek Gautam 		break;
1270b56e9a7SVivek Gautam 	}
1280b56e9a7SVivek Gautam 
1290b56e9a7SVivek Gautam 	if (on) {
1300b56e9a7SVivek Gautam 		writel(drv->ref_reg_val, drv->reg_phy + S5PV210_UPHYCLK);
1310b56e9a7SVivek Gautam 
1320b56e9a7SVivek Gautam 		pwr = readl(drv->reg_phy + S5PV210_UPHYPWR);
1330b56e9a7SVivek Gautam 		pwr &= ~phypwr;
1340b56e9a7SVivek Gautam 		writel(pwr, drv->reg_phy + S5PV210_UPHYPWR);
1350b56e9a7SVivek Gautam 
1360b56e9a7SVivek Gautam 		rst = readl(drv->reg_phy + S5PV210_UPHYRST);
1370b56e9a7SVivek Gautam 		rst |= rstbits;
1380b56e9a7SVivek Gautam 		writel(rst, drv->reg_phy + S5PV210_UPHYRST);
1390b56e9a7SVivek Gautam 		udelay(10);
1400b56e9a7SVivek Gautam 		rst &= ~rstbits;
1410b56e9a7SVivek Gautam 		writel(rst, drv->reg_phy + S5PV210_UPHYRST);
14205942b8cSJonathan Bakker 		/* The following delay is necessary for the reset sequence to be
14305942b8cSJonathan Bakker 		 * completed
14405942b8cSJonathan Bakker 		 */
14505942b8cSJonathan Bakker 		udelay(80);
1460b56e9a7SVivek Gautam 	} else {
1470b56e9a7SVivek Gautam 		pwr = readl(drv->reg_phy + S5PV210_UPHYPWR);
1480b56e9a7SVivek Gautam 		pwr |= phypwr;
1490b56e9a7SVivek Gautam 		writel(pwr, drv->reg_phy + S5PV210_UPHYPWR);
1500b56e9a7SVivek Gautam 	}
1510b56e9a7SVivek Gautam }
1520b56e9a7SVivek Gautam 
s5pv210_power_on(struct samsung_usb2_phy_instance * inst)1530b56e9a7SVivek Gautam static int s5pv210_power_on(struct samsung_usb2_phy_instance *inst)
1540b56e9a7SVivek Gautam {
1550b56e9a7SVivek Gautam 	s5pv210_isol(inst, 0);
1560b56e9a7SVivek Gautam 	s5pv210_phy_pwr(inst, 1);
1570b56e9a7SVivek Gautam 
1580b56e9a7SVivek Gautam 	return 0;
1590b56e9a7SVivek Gautam }
1600b56e9a7SVivek Gautam 
s5pv210_power_off(struct samsung_usb2_phy_instance * inst)1610b56e9a7SVivek Gautam static int s5pv210_power_off(struct samsung_usb2_phy_instance *inst)
1620b56e9a7SVivek Gautam {
1630b56e9a7SVivek Gautam 	s5pv210_phy_pwr(inst, 0);
1640b56e9a7SVivek Gautam 	s5pv210_isol(inst, 1);
1650b56e9a7SVivek Gautam 
1660b56e9a7SVivek Gautam 	return 0;
1670b56e9a7SVivek Gautam }
1680b56e9a7SVivek Gautam 
1690b56e9a7SVivek Gautam static const struct samsung_usb2_common_phy s5pv210_phys[S5PV210_NUM_PHYS] = {
1700b56e9a7SVivek Gautam 	[S5PV210_DEVICE] = {
1710b56e9a7SVivek Gautam 		.label		= "device",
1720b56e9a7SVivek Gautam 		.id		= S5PV210_DEVICE,
1730b56e9a7SVivek Gautam 		.power_on	= s5pv210_power_on,
1740b56e9a7SVivek Gautam 		.power_off	= s5pv210_power_off,
1750b56e9a7SVivek Gautam 	},
1760b56e9a7SVivek Gautam 	[S5PV210_HOST] = {
1770b56e9a7SVivek Gautam 		.label		= "host",
1780b56e9a7SVivek Gautam 		.id		= S5PV210_HOST,
1790b56e9a7SVivek Gautam 		.power_on	= s5pv210_power_on,
1800b56e9a7SVivek Gautam 		.power_off	= s5pv210_power_off,
1810b56e9a7SVivek Gautam 	},
1820b56e9a7SVivek Gautam };
1830b56e9a7SVivek Gautam 
1840b56e9a7SVivek Gautam const struct samsung_usb2_phy_config s5pv210_usb2_phy_config = {
1850b56e9a7SVivek Gautam 	.num_phys	= ARRAY_SIZE(s5pv210_phys),
1860b56e9a7SVivek Gautam 	.phys		= s5pv210_phys,
1870b56e9a7SVivek Gautam 	.rate_to_clk	= s5pv210_rate_to_clk,
1880b56e9a7SVivek Gautam };
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