1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Renesas R-Car Gen3 for USB2.0 PHY driver 4 * 5 * Copyright (C) 2015-2017 Renesas Electronics Corporation 6 * 7 * This is based on the phy-rcar-gen2 driver: 8 * Copyright (C) 2014 Renesas Solutions Corp. 9 * Copyright (C) 2014 Cogent Embedded, Inc. 10 */ 11 12 #include <linux/extcon-provider.h> 13 #include <linux/interrupt.h> 14 #include <linux/io.h> 15 #include <linux/module.h> 16 #include <linux/mutex.h> 17 #include <linux/of.h> 18 #include <linux/of_address.h> 19 #include <linux/of_device.h> 20 #include <linux/phy/phy.h> 21 #include <linux/platform_device.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/regulator/consumer.h> 24 #include <linux/usb/of.h> 25 #include <linux/workqueue.h> 26 27 /******* USB2.0 Host registers (original offset is +0x200) *******/ 28 #define USB2_INT_ENABLE 0x000 29 #define USB2_USBCTR 0x00c 30 #define USB2_SPD_RSM_TIMSET 0x10c 31 #define USB2_OC_TIMSET 0x110 32 #define USB2_COMMCTRL 0x600 33 #define USB2_OBINTSTA 0x604 34 #define USB2_OBINTEN 0x608 35 #define USB2_VBCTRL 0x60c 36 #define USB2_LINECTRL1 0x610 37 #define USB2_ADPCTRL 0x630 38 39 /* INT_ENABLE */ 40 #define USB2_INT_ENABLE_UCOM_INTEN BIT(3) 41 #define USB2_INT_ENABLE_USBH_INTB_EN BIT(2) /* For EHCI */ 42 #define USB2_INT_ENABLE_USBH_INTA_EN BIT(1) /* For OHCI */ 43 44 /* USBCTR */ 45 #define USB2_USBCTR_DIRPD BIT(2) 46 #define USB2_USBCTR_PLL_RST BIT(1) 47 48 /* SPD_RSM_TIMSET */ 49 #define USB2_SPD_RSM_TIMSET_INIT 0x014e029b 50 51 /* OC_TIMSET */ 52 #define USB2_OC_TIMSET_INIT 0x000209ab 53 54 /* COMMCTRL */ 55 #define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */ 56 57 /* OBINTSTA and OBINTEN */ 58 #define USB2_OBINT_SESSVLDCHG BIT(12) 59 #define USB2_OBINT_IDDIGCHG BIT(11) 60 #define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \ 61 USB2_OBINT_IDDIGCHG) 62 63 /* VBCTRL */ 64 #define USB2_VBCTRL_DRVVBUSSEL BIT(8) 65 66 /* LINECTRL1 */ 67 #define USB2_LINECTRL1_DPRPD_EN BIT(19) 68 #define USB2_LINECTRL1_DP_RPD BIT(18) 69 #define USB2_LINECTRL1_DMRPD_EN BIT(17) 70 #define USB2_LINECTRL1_DM_RPD BIT(16) 71 #define USB2_LINECTRL1_OPMODE_NODRV BIT(6) 72 73 /* ADPCTRL */ 74 #define USB2_ADPCTRL_OTGSESSVLD BIT(20) 75 #define USB2_ADPCTRL_IDDIG BIT(19) 76 #define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */ 77 #define USB2_ADPCTRL_DRVVBUS BIT(4) 78 79 #define NUM_OF_PHYS 4 80 enum rcar_gen3_phy_index { 81 PHY_INDEX_BOTH_HC, 82 PHY_INDEX_OHCI, 83 PHY_INDEX_EHCI, 84 PHY_INDEX_HSUSB 85 }; 86 87 static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = { 88 USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN, 89 USB2_INT_ENABLE_USBH_INTA_EN, 90 USB2_INT_ENABLE_USBH_INTB_EN, 91 0 92 }; 93 94 struct rcar_gen3_phy { 95 struct phy *phy; 96 struct rcar_gen3_chan *ch; 97 u32 int_enable_bits; 98 bool initialized; 99 bool otg_initialized; 100 bool powered; 101 }; 102 103 struct rcar_gen3_chan { 104 void __iomem *base; 105 struct device *dev; /* platform_device's device */ 106 struct extcon_dev *extcon; 107 struct rcar_gen3_phy rphys[NUM_OF_PHYS]; 108 struct regulator *vbus; 109 struct work_struct work; 110 struct mutex lock; /* protects rphys[...].powered */ 111 enum usb_dr_mode dr_mode; 112 bool extcon_host; 113 bool is_otg_channel; 114 bool uses_otg_pins; 115 }; 116 117 /* 118 * Combination about is_otg_channel and uses_otg_pins: 119 * 120 * Parameters || Behaviors 121 * is_otg_channel | uses_otg_pins || irqs | role sysfs 122 * ---------------------+---------------++--------------+------------ 123 * true | true || enabled | enabled 124 * true | false || disabled | enabled 125 * false | any || disabled | disabled 126 */ 127 128 static void rcar_gen3_phy_usb2_work(struct work_struct *work) 129 { 130 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan, 131 work); 132 133 if (ch->extcon_host) { 134 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true); 135 extcon_set_state_sync(ch->extcon, EXTCON_USB, false); 136 } else { 137 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false); 138 extcon_set_state_sync(ch->extcon, EXTCON_USB, true); 139 } 140 } 141 142 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host) 143 { 144 void __iomem *usb2_base = ch->base; 145 u32 val = readl(usb2_base + USB2_COMMCTRL); 146 147 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host); 148 if (host) 149 val &= ~USB2_COMMCTRL_OTG_PERI; 150 else 151 val |= USB2_COMMCTRL_OTG_PERI; 152 writel(val, usb2_base + USB2_COMMCTRL); 153 } 154 155 static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm) 156 { 157 void __iomem *usb2_base = ch->base; 158 u32 val = readl(usb2_base + USB2_LINECTRL1); 159 160 dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm); 161 val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD); 162 if (dp) 163 val |= USB2_LINECTRL1_DP_RPD; 164 if (dm) 165 val |= USB2_LINECTRL1_DM_RPD; 166 writel(val, usb2_base + USB2_LINECTRL1); 167 } 168 169 static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus) 170 { 171 void __iomem *usb2_base = ch->base; 172 u32 val = readl(usb2_base + USB2_ADPCTRL); 173 174 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus); 175 if (vbus) 176 val |= USB2_ADPCTRL_DRVVBUS; 177 else 178 val &= ~USB2_ADPCTRL_DRVVBUS; 179 writel(val, usb2_base + USB2_ADPCTRL); 180 } 181 182 static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable) 183 { 184 void __iomem *usb2_base = ch->base; 185 u32 val = readl(usb2_base + USB2_OBINTEN); 186 187 if (ch->uses_otg_pins && enable) 188 val |= USB2_OBINT_BITS; 189 else 190 val &= ~USB2_OBINT_BITS; 191 writel(val, usb2_base + USB2_OBINTEN); 192 } 193 194 static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch) 195 { 196 rcar_gen3_set_linectrl(ch, 1, 1); 197 rcar_gen3_set_host_mode(ch, 1); 198 rcar_gen3_enable_vbus_ctrl(ch, 1); 199 200 ch->extcon_host = true; 201 schedule_work(&ch->work); 202 } 203 204 static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch) 205 { 206 rcar_gen3_set_linectrl(ch, 0, 1); 207 rcar_gen3_set_host_mode(ch, 0); 208 rcar_gen3_enable_vbus_ctrl(ch, 0); 209 210 ch->extcon_host = false; 211 schedule_work(&ch->work); 212 } 213 214 static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch) 215 { 216 void __iomem *usb2_base = ch->base; 217 u32 val; 218 219 val = readl(usb2_base + USB2_LINECTRL1); 220 writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1); 221 222 rcar_gen3_set_linectrl(ch, 1, 1); 223 rcar_gen3_set_host_mode(ch, 1); 224 rcar_gen3_enable_vbus_ctrl(ch, 0); 225 226 val = readl(usb2_base + USB2_LINECTRL1); 227 writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1); 228 } 229 230 static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch) 231 { 232 rcar_gen3_set_linectrl(ch, 0, 1); 233 rcar_gen3_set_host_mode(ch, 0); 234 rcar_gen3_enable_vbus_ctrl(ch, 1); 235 } 236 237 static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch) 238 { 239 rcar_gen3_control_otg_irq(ch, 0); 240 241 rcar_gen3_enable_vbus_ctrl(ch, 1); 242 rcar_gen3_init_for_host(ch); 243 244 rcar_gen3_control_otg_irq(ch, 1); 245 } 246 247 static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch) 248 { 249 if (!ch->uses_otg_pins) 250 return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true; 251 252 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG); 253 } 254 255 static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch) 256 { 257 if (!rcar_gen3_check_id(ch)) 258 rcar_gen3_init_for_host(ch); 259 else 260 rcar_gen3_init_for_peri(ch); 261 } 262 263 static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch) 264 { 265 return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI); 266 } 267 268 static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch) 269 { 270 if (rcar_gen3_is_host(ch)) 271 return PHY_MODE_USB_HOST; 272 273 return PHY_MODE_USB_DEVICE; 274 } 275 276 static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch) 277 { 278 int i; 279 280 for (i = 0; i < NUM_OF_PHYS; i++) { 281 if (ch->rphys[i].initialized) 282 return true; 283 } 284 285 return false; 286 } 287 288 static bool rcar_gen3_needs_init_otg(struct rcar_gen3_chan *ch) 289 { 290 int i; 291 292 for (i = 0; i < NUM_OF_PHYS; i++) { 293 if (ch->rphys[i].otg_initialized) 294 return false; 295 } 296 297 return true; 298 } 299 300 static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch) 301 { 302 int i; 303 304 for (i = 0; i < NUM_OF_PHYS; i++) { 305 if (ch->rphys[i].powered) 306 return false; 307 } 308 309 return true; 310 } 311 312 static ssize_t role_store(struct device *dev, struct device_attribute *attr, 313 const char *buf, size_t count) 314 { 315 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 316 bool is_b_device; 317 enum phy_mode cur_mode, new_mode; 318 319 if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch)) 320 return -EIO; 321 322 if (!strncmp(buf, "host", strlen("host"))) 323 new_mode = PHY_MODE_USB_HOST; 324 else if (!strncmp(buf, "peripheral", strlen("peripheral"))) 325 new_mode = PHY_MODE_USB_DEVICE; 326 else 327 return -EINVAL; 328 329 /* is_b_device: true is B-Device. false is A-Device. */ 330 is_b_device = rcar_gen3_check_id(ch); 331 cur_mode = rcar_gen3_get_phy_mode(ch); 332 333 /* If current and new mode is the same, this returns the error */ 334 if (cur_mode == new_mode) 335 return -EINVAL; 336 337 if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */ 338 if (!is_b_device) /* A-Peripheral */ 339 rcar_gen3_init_from_a_peri_to_a_host(ch); 340 else /* B-Peripheral */ 341 rcar_gen3_init_for_b_host(ch); 342 } else { /* And is_host must be true */ 343 if (!is_b_device) /* A-Host */ 344 rcar_gen3_init_for_a_peri(ch); 345 else /* B-Host */ 346 rcar_gen3_init_for_peri(ch); 347 } 348 349 return count; 350 } 351 352 static ssize_t role_show(struct device *dev, struct device_attribute *attr, 353 char *buf) 354 { 355 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 356 357 if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch)) 358 return -EIO; 359 360 return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" : 361 "peripheral"); 362 } 363 static DEVICE_ATTR_RW(role); 364 365 static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch) 366 { 367 void __iomem *usb2_base = ch->base; 368 u32 val; 369 370 /* Should not use functions of read-modify-write a register */ 371 val = readl(usb2_base + USB2_LINECTRL1); 372 val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN | 373 USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD; 374 writel(val, usb2_base + USB2_LINECTRL1); 375 376 val = readl(usb2_base + USB2_VBCTRL); 377 writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL); 378 val = readl(usb2_base + USB2_ADPCTRL); 379 writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL); 380 381 msleep(20); 382 383 writel(0xffffffff, usb2_base + USB2_OBINTSTA); 384 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTEN); 385 386 rcar_gen3_device_recognition(ch); 387 } 388 389 static int rcar_gen3_phy_usb2_init(struct phy *p) 390 { 391 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 392 struct rcar_gen3_chan *channel = rphy->ch; 393 void __iomem *usb2_base = channel->base; 394 u32 val; 395 396 /* Initialize USB2 part */ 397 val = readl(usb2_base + USB2_INT_ENABLE); 398 val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits; 399 writel(val, usb2_base + USB2_INT_ENABLE); 400 writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET); 401 writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET); 402 403 /* Initialize otg part */ 404 if (channel->is_otg_channel) { 405 if (rcar_gen3_needs_init_otg(channel)) 406 rcar_gen3_init_otg(channel); 407 rphy->otg_initialized = true; 408 } 409 410 rphy->initialized = true; 411 412 return 0; 413 } 414 415 static int rcar_gen3_phy_usb2_exit(struct phy *p) 416 { 417 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 418 struct rcar_gen3_chan *channel = rphy->ch; 419 void __iomem *usb2_base = channel->base; 420 u32 val; 421 422 rphy->initialized = false; 423 424 if (channel->is_otg_channel) 425 rphy->otg_initialized = false; 426 427 val = readl(usb2_base + USB2_INT_ENABLE); 428 val &= ~rphy->int_enable_bits; 429 if (!rcar_gen3_is_any_rphy_initialized(channel)) 430 val &= ~USB2_INT_ENABLE_UCOM_INTEN; 431 writel(val, usb2_base + USB2_INT_ENABLE); 432 433 return 0; 434 } 435 436 static int rcar_gen3_phy_usb2_power_on(struct phy *p) 437 { 438 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 439 struct rcar_gen3_chan *channel = rphy->ch; 440 void __iomem *usb2_base = channel->base; 441 u32 val; 442 int ret = 0; 443 444 mutex_lock(&channel->lock); 445 if (!rcar_gen3_are_all_rphys_power_off(channel)) 446 goto out; 447 448 if (channel->vbus) { 449 ret = regulator_enable(channel->vbus); 450 if (ret) 451 goto out; 452 } 453 454 val = readl(usb2_base + USB2_USBCTR); 455 val |= USB2_USBCTR_PLL_RST; 456 writel(val, usb2_base + USB2_USBCTR); 457 val &= ~USB2_USBCTR_PLL_RST; 458 writel(val, usb2_base + USB2_USBCTR); 459 460 out: 461 /* The powered flag should be set for any other phys anyway */ 462 rphy->powered = true; 463 mutex_unlock(&channel->lock); 464 465 return 0; 466 } 467 468 static int rcar_gen3_phy_usb2_power_off(struct phy *p) 469 { 470 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 471 struct rcar_gen3_chan *channel = rphy->ch; 472 int ret = 0; 473 474 mutex_lock(&channel->lock); 475 rphy->powered = false; 476 477 if (!rcar_gen3_are_all_rphys_power_off(channel)) 478 goto out; 479 480 if (channel->vbus) 481 ret = regulator_disable(channel->vbus); 482 483 out: 484 mutex_unlock(&channel->lock); 485 486 return ret; 487 } 488 489 static const struct phy_ops rcar_gen3_phy_usb2_ops = { 490 .init = rcar_gen3_phy_usb2_init, 491 .exit = rcar_gen3_phy_usb2_exit, 492 .power_on = rcar_gen3_phy_usb2_power_on, 493 .power_off = rcar_gen3_phy_usb2_power_off, 494 .owner = THIS_MODULE, 495 }; 496 497 static const struct phy_ops rz_g1c_phy_usb2_ops = { 498 .init = rcar_gen3_phy_usb2_init, 499 .exit = rcar_gen3_phy_usb2_exit, 500 .owner = THIS_MODULE, 501 }; 502 503 static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch) 504 { 505 struct rcar_gen3_chan *ch = _ch; 506 void __iomem *usb2_base = ch->base; 507 u32 status = readl(usb2_base + USB2_OBINTSTA); 508 irqreturn_t ret = IRQ_NONE; 509 510 if (status & USB2_OBINT_BITS) { 511 dev_vdbg(ch->dev, "%s: %08x\n", __func__, status); 512 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA); 513 rcar_gen3_device_recognition(ch); 514 ret = IRQ_HANDLED; 515 } 516 517 return ret; 518 } 519 520 static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = { 521 { 522 .compatible = "renesas,usb2-phy-r8a77470", 523 .data = &rz_g1c_phy_usb2_ops, 524 }, 525 { 526 .compatible = "renesas,usb2-phy-r8a7795", 527 .data = &rcar_gen3_phy_usb2_ops, 528 }, 529 { 530 .compatible = "renesas,usb2-phy-r8a7796", 531 .data = &rcar_gen3_phy_usb2_ops, 532 }, 533 { 534 .compatible = "renesas,usb2-phy-r8a77965", 535 .data = &rcar_gen3_phy_usb2_ops, 536 }, 537 { 538 .compatible = "renesas,rcar-gen3-usb2-phy", 539 .data = &rcar_gen3_phy_usb2_ops, 540 }, 541 { /* sentinel */ }, 542 }; 543 MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table); 544 545 static const unsigned int rcar_gen3_phy_cable[] = { 546 EXTCON_USB, 547 EXTCON_USB_HOST, 548 EXTCON_NONE, 549 }; 550 551 static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev, 552 struct of_phandle_args *args) 553 { 554 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 555 556 if (args->args_count == 0) /* For old version dts */ 557 return ch->rphys[PHY_INDEX_BOTH_HC].phy; 558 else if (args->args_count > 1) /* Prevent invalid args count */ 559 return ERR_PTR(-ENODEV); 560 561 if (args->args[0] >= NUM_OF_PHYS) 562 return ERR_PTR(-ENODEV); 563 564 return ch->rphys[args->args[0]].phy; 565 } 566 567 static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np) 568 { 569 enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN; 570 int i; 571 572 /* 573 * If one of device nodes has other dr_mode except UNKNOWN, 574 * this function returns UNKNOWN. To achieve backward compatibility, 575 * this loop starts the index as 0. 576 */ 577 for (i = 0; i < NUM_OF_PHYS; i++) { 578 enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i); 579 580 if (mode != USB_DR_MODE_UNKNOWN) { 581 if (candidate == USB_DR_MODE_UNKNOWN) 582 candidate = mode; 583 else if (candidate != mode) 584 return USB_DR_MODE_UNKNOWN; 585 } 586 } 587 588 return candidate; 589 } 590 591 static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev) 592 { 593 struct device *dev = &pdev->dev; 594 struct rcar_gen3_chan *channel; 595 struct phy_provider *provider; 596 struct resource *res; 597 const struct phy_ops *phy_usb2_ops; 598 int irq, ret = 0, i; 599 600 if (!dev->of_node) { 601 dev_err(dev, "This driver needs device tree\n"); 602 return -EINVAL; 603 } 604 605 channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL); 606 if (!channel) 607 return -ENOMEM; 608 609 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 610 channel->base = devm_ioremap_resource(dev, res); 611 if (IS_ERR(channel->base)) 612 return PTR_ERR(channel->base); 613 614 /* call request_irq for OTG */ 615 irq = platform_get_irq(pdev, 0); 616 if (irq >= 0) { 617 INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work); 618 irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq, 619 IRQF_SHARED, dev_name(dev), channel); 620 if (irq < 0) 621 dev_err(dev, "No irq handler (%d)\n", irq); 622 } 623 624 channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node); 625 if (channel->dr_mode != USB_DR_MODE_UNKNOWN) { 626 int ret; 627 628 channel->is_otg_channel = true; 629 channel->uses_otg_pins = !of_property_read_bool(dev->of_node, 630 "renesas,no-otg-pins"); 631 channel->extcon = devm_extcon_dev_allocate(dev, 632 rcar_gen3_phy_cable); 633 if (IS_ERR(channel->extcon)) 634 return PTR_ERR(channel->extcon); 635 636 ret = devm_extcon_dev_register(dev, channel->extcon); 637 if (ret < 0) { 638 dev_err(dev, "Failed to register extcon\n"); 639 return ret; 640 } 641 } 642 643 /* 644 * devm_phy_create() will call pm_runtime_enable(&phy->dev); 645 * And then, phy-core will manage runtime pm for this device. 646 */ 647 pm_runtime_enable(dev); 648 phy_usb2_ops = of_device_get_match_data(dev); 649 if (!phy_usb2_ops) 650 return -EINVAL; 651 652 mutex_init(&channel->lock); 653 for (i = 0; i < NUM_OF_PHYS; i++) { 654 channel->rphys[i].phy = devm_phy_create(dev, NULL, 655 phy_usb2_ops); 656 if (IS_ERR(channel->rphys[i].phy)) { 657 dev_err(dev, "Failed to create USB2 PHY\n"); 658 ret = PTR_ERR(channel->rphys[i].phy); 659 goto error; 660 } 661 channel->rphys[i].ch = channel; 662 channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i]; 663 phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]); 664 } 665 666 channel->vbus = devm_regulator_get_optional(dev, "vbus"); 667 if (IS_ERR(channel->vbus)) { 668 if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) { 669 ret = PTR_ERR(channel->vbus); 670 goto error; 671 } 672 channel->vbus = NULL; 673 } 674 675 platform_set_drvdata(pdev, channel); 676 channel->dev = dev; 677 678 provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate); 679 if (IS_ERR(provider)) { 680 dev_err(dev, "Failed to register PHY provider\n"); 681 ret = PTR_ERR(provider); 682 goto error; 683 } else if (channel->is_otg_channel) { 684 int ret; 685 686 ret = device_create_file(dev, &dev_attr_role); 687 if (ret < 0) 688 goto error; 689 } 690 691 return 0; 692 693 error: 694 pm_runtime_disable(dev); 695 696 return ret; 697 } 698 699 static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev) 700 { 701 struct rcar_gen3_chan *channel = platform_get_drvdata(pdev); 702 703 if (channel->is_otg_channel) 704 device_remove_file(&pdev->dev, &dev_attr_role); 705 706 pm_runtime_disable(&pdev->dev); 707 708 return 0; 709 }; 710 711 static struct platform_driver rcar_gen3_phy_usb2_driver = { 712 .driver = { 713 .name = "phy_rcar_gen3_usb2", 714 .of_match_table = rcar_gen3_phy_usb2_match_table, 715 }, 716 .probe = rcar_gen3_phy_usb2_probe, 717 .remove = rcar_gen3_phy_usb2_remove, 718 }; 719 module_platform_driver(rcar_gen3_phy_usb2_driver); 720 721 MODULE_LICENSE("GPL v2"); 722 MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY"); 723 MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>"); 724