1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Renesas R-Car Gen3 for USB2.0 PHY driver 4 * 5 * Copyright (C) 2015-2017 Renesas Electronics Corporation 6 * 7 * This is based on the phy-rcar-gen2 driver: 8 * Copyright (C) 2014 Renesas Solutions Corp. 9 * Copyright (C) 2014 Cogent Embedded, Inc. 10 */ 11 12 #include <linux/extcon-provider.h> 13 #include <linux/interrupt.h> 14 #include <linux/io.h> 15 #include <linux/module.h> 16 #include <linux/of.h> 17 #include <linux/of_address.h> 18 #include <linux/of_device.h> 19 #include <linux/phy/phy.h> 20 #include <linux/platform_device.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/regulator/consumer.h> 23 #include <linux/usb/of.h> 24 #include <linux/workqueue.h> 25 26 /******* USB2.0 Host registers (original offset is +0x200) *******/ 27 #define USB2_INT_ENABLE 0x000 28 #define USB2_USBCTR 0x00c 29 #define USB2_SPD_RSM_TIMSET 0x10c 30 #define USB2_OC_TIMSET 0x110 31 #define USB2_COMMCTRL 0x600 32 #define USB2_OBINTSTA 0x604 33 #define USB2_OBINTEN 0x608 34 #define USB2_VBCTRL 0x60c 35 #define USB2_LINECTRL1 0x610 36 #define USB2_ADPCTRL 0x630 37 38 /* INT_ENABLE */ 39 #define USB2_INT_ENABLE_UCOM_INTEN BIT(3) 40 #define USB2_INT_ENABLE_USBH_INTB_EN BIT(2) 41 #define USB2_INT_ENABLE_USBH_INTA_EN BIT(1) 42 #define USB2_INT_ENABLE_INIT (USB2_INT_ENABLE_UCOM_INTEN | \ 43 USB2_INT_ENABLE_USBH_INTB_EN | \ 44 USB2_INT_ENABLE_USBH_INTA_EN) 45 46 /* USBCTR */ 47 #define USB2_USBCTR_DIRPD BIT(2) 48 #define USB2_USBCTR_PLL_RST BIT(1) 49 50 /* SPD_RSM_TIMSET */ 51 #define USB2_SPD_RSM_TIMSET_INIT 0x014e029b 52 53 /* OC_TIMSET */ 54 #define USB2_OC_TIMSET_INIT 0x000209ab 55 56 /* COMMCTRL */ 57 #define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */ 58 59 /* OBINTSTA and OBINTEN */ 60 #define USB2_OBINT_SESSVLDCHG BIT(12) 61 #define USB2_OBINT_IDDIGCHG BIT(11) 62 #define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \ 63 USB2_OBINT_IDDIGCHG) 64 65 /* VBCTRL */ 66 #define USB2_VBCTRL_DRVVBUSSEL BIT(8) 67 68 /* LINECTRL1 */ 69 #define USB2_LINECTRL1_DPRPD_EN BIT(19) 70 #define USB2_LINECTRL1_DP_RPD BIT(18) 71 #define USB2_LINECTRL1_DMRPD_EN BIT(17) 72 #define USB2_LINECTRL1_DM_RPD BIT(16) 73 #define USB2_LINECTRL1_OPMODE_NODRV BIT(6) 74 75 /* ADPCTRL */ 76 #define USB2_ADPCTRL_OTGSESSVLD BIT(20) 77 #define USB2_ADPCTRL_IDDIG BIT(19) 78 #define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */ 79 #define USB2_ADPCTRL_DRVVBUS BIT(4) 80 81 #define RCAR_GEN3_PHY_HAS_DEDICATED_PINS 1 82 83 struct rcar_gen3_chan { 84 void __iomem *base; 85 struct extcon_dev *extcon; 86 struct phy *phy; 87 struct regulator *vbus; 88 struct work_struct work; 89 bool extcon_host; 90 bool has_otg_pins; 91 }; 92 93 static void rcar_gen3_phy_usb2_work(struct work_struct *work) 94 { 95 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan, 96 work); 97 98 if (ch->extcon_host) { 99 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true); 100 extcon_set_state_sync(ch->extcon, EXTCON_USB, false); 101 } else { 102 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false); 103 extcon_set_state_sync(ch->extcon, EXTCON_USB, true); 104 } 105 } 106 107 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host) 108 { 109 void __iomem *usb2_base = ch->base; 110 u32 val = readl(usb2_base + USB2_COMMCTRL); 111 112 dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, host); 113 if (host) 114 val &= ~USB2_COMMCTRL_OTG_PERI; 115 else 116 val |= USB2_COMMCTRL_OTG_PERI; 117 writel(val, usb2_base + USB2_COMMCTRL); 118 } 119 120 static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm) 121 { 122 void __iomem *usb2_base = ch->base; 123 u32 val = readl(usb2_base + USB2_LINECTRL1); 124 125 dev_vdbg(&ch->phy->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm); 126 val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD); 127 if (dp) 128 val |= USB2_LINECTRL1_DP_RPD; 129 if (dm) 130 val |= USB2_LINECTRL1_DM_RPD; 131 writel(val, usb2_base + USB2_LINECTRL1); 132 } 133 134 static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus) 135 { 136 void __iomem *usb2_base = ch->base; 137 u32 val = readl(usb2_base + USB2_ADPCTRL); 138 139 dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, vbus); 140 if (vbus) 141 val |= USB2_ADPCTRL_DRVVBUS; 142 else 143 val &= ~USB2_ADPCTRL_DRVVBUS; 144 writel(val, usb2_base + USB2_ADPCTRL); 145 } 146 147 static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch) 148 { 149 rcar_gen3_set_linectrl(ch, 1, 1); 150 rcar_gen3_set_host_mode(ch, 1); 151 rcar_gen3_enable_vbus_ctrl(ch, 1); 152 153 ch->extcon_host = true; 154 schedule_work(&ch->work); 155 } 156 157 static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch) 158 { 159 rcar_gen3_set_linectrl(ch, 0, 1); 160 rcar_gen3_set_host_mode(ch, 0); 161 rcar_gen3_enable_vbus_ctrl(ch, 0); 162 163 ch->extcon_host = false; 164 schedule_work(&ch->work); 165 } 166 167 static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch) 168 { 169 void __iomem *usb2_base = ch->base; 170 u32 val; 171 172 val = readl(usb2_base + USB2_LINECTRL1); 173 writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1); 174 175 rcar_gen3_set_linectrl(ch, 1, 1); 176 rcar_gen3_set_host_mode(ch, 1); 177 rcar_gen3_enable_vbus_ctrl(ch, 0); 178 179 val = readl(usb2_base + USB2_LINECTRL1); 180 writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1); 181 } 182 183 static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch) 184 { 185 rcar_gen3_set_linectrl(ch, 0, 1); 186 rcar_gen3_set_host_mode(ch, 0); 187 rcar_gen3_enable_vbus_ctrl(ch, 1); 188 } 189 190 static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch) 191 { 192 void __iomem *usb2_base = ch->base; 193 u32 val; 194 195 val = readl(usb2_base + USB2_OBINTEN); 196 writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN); 197 198 rcar_gen3_enable_vbus_ctrl(ch, 0); 199 rcar_gen3_init_for_host(ch); 200 201 writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN); 202 } 203 204 static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch) 205 { 206 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG); 207 } 208 209 static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch) 210 { 211 if (!rcar_gen3_check_id(ch)) 212 rcar_gen3_init_for_host(ch); 213 else 214 rcar_gen3_init_for_peri(ch); 215 } 216 217 static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch) 218 { 219 return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI); 220 } 221 222 static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch) 223 { 224 if (rcar_gen3_is_host(ch)) 225 return PHY_MODE_USB_HOST; 226 227 return PHY_MODE_USB_DEVICE; 228 } 229 230 static ssize_t role_store(struct device *dev, struct device_attribute *attr, 231 const char *buf, size_t count) 232 { 233 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 234 bool is_b_device; 235 enum phy_mode cur_mode, new_mode; 236 237 if (!ch->has_otg_pins || !ch->phy->init_count) 238 return -EIO; 239 240 if (!strncmp(buf, "host", strlen("host"))) 241 new_mode = PHY_MODE_USB_HOST; 242 else if (!strncmp(buf, "peripheral", strlen("peripheral"))) 243 new_mode = PHY_MODE_USB_DEVICE; 244 else 245 return -EINVAL; 246 247 /* is_b_device: true is B-Device. false is A-Device. */ 248 is_b_device = rcar_gen3_check_id(ch); 249 cur_mode = rcar_gen3_get_phy_mode(ch); 250 251 /* If current and new mode is the same, this returns the error */ 252 if (cur_mode == new_mode) 253 return -EINVAL; 254 255 if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */ 256 if (!is_b_device) /* A-Peripheral */ 257 rcar_gen3_init_from_a_peri_to_a_host(ch); 258 else /* B-Peripheral */ 259 rcar_gen3_init_for_b_host(ch); 260 } else { /* And is_host must be true */ 261 if (!is_b_device) /* A-Host */ 262 rcar_gen3_init_for_a_peri(ch); 263 else /* B-Host */ 264 rcar_gen3_init_for_peri(ch); 265 } 266 267 return count; 268 } 269 270 static ssize_t role_show(struct device *dev, struct device_attribute *attr, 271 char *buf) 272 { 273 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 274 275 if (!ch->has_otg_pins || !ch->phy->init_count) 276 return -EIO; 277 278 return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" : 279 "peripheral"); 280 } 281 static DEVICE_ATTR_RW(role); 282 283 static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch) 284 { 285 void __iomem *usb2_base = ch->base; 286 u32 val; 287 288 val = readl(usb2_base + USB2_VBCTRL); 289 writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL); 290 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA); 291 val = readl(usb2_base + USB2_OBINTEN); 292 writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN); 293 val = readl(usb2_base + USB2_ADPCTRL); 294 writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL); 295 val = readl(usb2_base + USB2_LINECTRL1); 296 rcar_gen3_set_linectrl(ch, 0, 0); 297 writel(val | USB2_LINECTRL1_DPRPD_EN | USB2_LINECTRL1_DMRPD_EN, 298 usb2_base + USB2_LINECTRL1); 299 300 rcar_gen3_device_recognition(ch); 301 } 302 303 static int rcar_gen3_phy_usb2_init(struct phy *p) 304 { 305 struct rcar_gen3_chan *channel = phy_get_drvdata(p); 306 void __iomem *usb2_base = channel->base; 307 308 /* Initialize USB2 part */ 309 writel(USB2_INT_ENABLE_INIT, usb2_base + USB2_INT_ENABLE); 310 writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET); 311 writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET); 312 313 /* Initialize otg part */ 314 if (channel->has_otg_pins) 315 rcar_gen3_init_otg(channel); 316 317 return 0; 318 } 319 320 static int rcar_gen3_phy_usb2_exit(struct phy *p) 321 { 322 struct rcar_gen3_chan *channel = phy_get_drvdata(p); 323 324 writel(0, channel->base + USB2_INT_ENABLE); 325 326 return 0; 327 } 328 329 static int rcar_gen3_phy_usb2_power_on(struct phy *p) 330 { 331 struct rcar_gen3_chan *channel = phy_get_drvdata(p); 332 void __iomem *usb2_base = channel->base; 333 u32 val; 334 int ret; 335 336 if (channel->vbus) { 337 ret = regulator_enable(channel->vbus); 338 if (ret) 339 return ret; 340 } 341 342 val = readl(usb2_base + USB2_USBCTR); 343 val |= USB2_USBCTR_PLL_RST; 344 writel(val, usb2_base + USB2_USBCTR); 345 val &= ~USB2_USBCTR_PLL_RST; 346 writel(val, usb2_base + USB2_USBCTR); 347 348 return 0; 349 } 350 351 static int rcar_gen3_phy_usb2_power_off(struct phy *p) 352 { 353 struct rcar_gen3_chan *channel = phy_get_drvdata(p); 354 int ret = 0; 355 356 if (channel->vbus) 357 ret = regulator_disable(channel->vbus); 358 359 return ret; 360 } 361 362 static const struct phy_ops rcar_gen3_phy_usb2_ops = { 363 .init = rcar_gen3_phy_usb2_init, 364 .exit = rcar_gen3_phy_usb2_exit, 365 .power_on = rcar_gen3_phy_usb2_power_on, 366 .power_off = rcar_gen3_phy_usb2_power_off, 367 .owner = THIS_MODULE, 368 }; 369 370 static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch) 371 { 372 struct rcar_gen3_chan *ch = _ch; 373 void __iomem *usb2_base = ch->base; 374 u32 status = readl(usb2_base + USB2_OBINTSTA); 375 irqreturn_t ret = IRQ_NONE; 376 377 if (status & USB2_OBINT_BITS) { 378 dev_vdbg(&ch->phy->dev, "%s: %08x\n", __func__, status); 379 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA); 380 rcar_gen3_device_recognition(ch); 381 ret = IRQ_HANDLED; 382 } 383 384 return ret; 385 } 386 387 static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = { 388 { 389 .compatible = "renesas,usb2-phy-r8a7795", 390 .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS, 391 }, 392 { 393 .compatible = "renesas,usb2-phy-r8a7796", 394 .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS, 395 }, 396 { 397 .compatible = "renesas,usb2-phy-r8a77965", 398 .data = (void *)RCAR_GEN3_PHY_HAS_DEDICATED_PINS, 399 }, 400 { 401 .compatible = "renesas,rcar-gen3-usb2-phy", 402 }, 403 { } 404 }; 405 MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table); 406 407 static const unsigned int rcar_gen3_phy_cable[] = { 408 EXTCON_USB, 409 EXTCON_USB_HOST, 410 EXTCON_NONE, 411 }; 412 413 static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev) 414 { 415 struct device *dev = &pdev->dev; 416 struct rcar_gen3_chan *channel; 417 struct phy_provider *provider; 418 struct resource *res; 419 int irq, ret = 0; 420 421 if (!dev->of_node) { 422 dev_err(dev, "This driver needs device tree\n"); 423 return -EINVAL; 424 } 425 426 channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL); 427 if (!channel) 428 return -ENOMEM; 429 430 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 431 channel->base = devm_ioremap_resource(dev, res); 432 if (IS_ERR(channel->base)) 433 return PTR_ERR(channel->base); 434 435 /* call request_irq for OTG */ 436 irq = platform_get_irq(pdev, 0); 437 if (irq >= 0) { 438 INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work); 439 irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq, 440 IRQF_SHARED, dev_name(dev), channel); 441 if (irq < 0) 442 dev_err(dev, "No irq handler (%d)\n", irq); 443 } 444 445 if (of_usb_get_dr_mode_by_phy(dev->of_node, 0) == USB_DR_MODE_OTG) { 446 int ret; 447 448 channel->has_otg_pins = (uintptr_t)of_device_get_match_data(dev); 449 channel->extcon = devm_extcon_dev_allocate(dev, 450 rcar_gen3_phy_cable); 451 if (IS_ERR(channel->extcon)) 452 return PTR_ERR(channel->extcon); 453 454 ret = devm_extcon_dev_register(dev, channel->extcon); 455 if (ret < 0) { 456 dev_err(dev, "Failed to register extcon\n"); 457 return ret; 458 } 459 } 460 461 /* 462 * devm_phy_create() will call pm_runtime_enable(&phy->dev); 463 * And then, phy-core will manage runtime pm for this device. 464 */ 465 pm_runtime_enable(dev); 466 channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops); 467 if (IS_ERR(channel->phy)) { 468 dev_err(dev, "Failed to create USB2 PHY\n"); 469 ret = PTR_ERR(channel->phy); 470 goto error; 471 } 472 473 channel->vbus = devm_regulator_get_optional(dev, "vbus"); 474 if (IS_ERR(channel->vbus)) { 475 if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) { 476 ret = PTR_ERR(channel->vbus); 477 goto error; 478 } 479 channel->vbus = NULL; 480 } 481 482 platform_set_drvdata(pdev, channel); 483 phy_set_drvdata(channel->phy, channel); 484 485 provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); 486 if (IS_ERR(provider)) { 487 dev_err(dev, "Failed to register PHY provider\n"); 488 ret = PTR_ERR(provider); 489 goto error; 490 } else if (channel->has_otg_pins) { 491 int ret; 492 493 ret = device_create_file(dev, &dev_attr_role); 494 if (ret < 0) 495 goto error; 496 } 497 498 return 0; 499 500 error: 501 pm_runtime_disable(dev); 502 503 return ret; 504 } 505 506 static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev) 507 { 508 struct rcar_gen3_chan *channel = platform_get_drvdata(pdev); 509 510 if (channel->has_otg_pins) 511 device_remove_file(&pdev->dev, &dev_attr_role); 512 513 pm_runtime_disable(&pdev->dev); 514 515 return 0; 516 }; 517 518 static struct platform_driver rcar_gen3_phy_usb2_driver = { 519 .driver = { 520 .name = "phy_rcar_gen3_usb2", 521 .of_match_table = rcar_gen3_phy_usb2_match_table, 522 }, 523 .probe = rcar_gen3_phy_usb2_probe, 524 .remove = rcar_gen3_phy_usb2_remove, 525 }; 526 module_platform_driver(rcar_gen3_phy_usb2_driver); 527 528 MODULE_LICENSE("GPL v2"); 529 MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY"); 530 MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>"); 531