1*ddf070f6SAbel Vesa /* SPDX-License-Identifier: GPL-2.0 */ 2*ddf070f6SAbel Vesa /* 3*ddf070f6SAbel Vesa * Copyright (c) 2023, Linaro Limited 4*ddf070f6SAbel Vesa */ 5*ddf070f6SAbel Vesa 6*ddf070f6SAbel Vesa #ifndef QCOM_PHY_QMP_QSERDES_TXRX_USB_V6_H_ 7*ddf070f6SAbel Vesa #define QCOM_PHY_QMP_QSERDES_TXRX_USB_V6_H_ 8*ddf070f6SAbel Vesa 9*ddf070f6SAbel Vesa #define QSERDES_V6_TX_CLKBUF_ENABLE 0x08 10*ddf070f6SAbel Vesa #define QSERDES_V6_TX_RESET_TSYNC_EN 0x1c 11*ddf070f6SAbel Vesa #define QSERDES_V6_TX_PRE_STALL_LDO_BOOST_EN 0x20 12*ddf070f6SAbel Vesa #define QSERDES_V6_TX_TX_BAND 0x24 13*ddf070f6SAbel Vesa #define QSERDES_V6_TX_INTERFACE_SELECT 0x2c 14*ddf070f6SAbel Vesa #define QSERDES_V6_TX_RES_CODE_LANE_TX 0x34 15*ddf070f6SAbel Vesa #define QSERDES_V6_TX_RES_CODE_LANE_RX 0x38 16*ddf070f6SAbel Vesa #define QSERDES_V6_TX_RES_CODE_LANE_OFFSET_TX 0x3c 17*ddf070f6SAbel Vesa #define QSERDES_V6_TX_RES_CODE_LANE_OFFSET_RX 0x40 18*ddf070f6SAbel Vesa #define QSERDES_V6_TX_PARRATE_REC_DETECT_IDLE_EN 0x60 19*ddf070f6SAbel Vesa #define QSERDES_V6_TX_BIST_PATTERN7 0x7c 20*ddf070f6SAbel Vesa #define QSERDES_V6_TX_LANE_MODE_1 0x84 21*ddf070f6SAbel Vesa #define QSERDES_V6_TX_LANE_MODE_3 0x8c 22*ddf070f6SAbel Vesa #define QSERDES_V6_TX_LANE_MODE_4 0x90 23*ddf070f6SAbel Vesa #define QSERDES_V6_TX_LANE_MODE_5 0x94 24*ddf070f6SAbel Vesa #define QSERDES_V6_TX_RCV_DETECT_LVL_2 0xa4 25*ddf070f6SAbel Vesa #define QSERDES_V6_TX_TRAN_DRVR_EMP_EN 0xc0 26*ddf070f6SAbel Vesa #define QSERDES_V6_TX_TX_INTERFACE_MODE 0xc4 27*ddf070f6SAbel Vesa #define QSERDES_V6_TX_VMODE_CTRL1 0xc8 28*ddf070f6SAbel Vesa #define QSERDES_V6_TX_PI_QEC_CTRL 0xe4 29*ddf070f6SAbel Vesa 30*ddf070f6SAbel Vesa #define QSERDES_V6_RX_UCDR_FO_GAIN 0x08 31*ddf070f6SAbel Vesa #define QSERDES_V6_RX_UCDR_SO_GAIN 0x14 32*ddf070f6SAbel Vesa #define QSERDES_V6_RX_UCDR_FASTLOCK_FO_GAIN 0x30 33*ddf070f6SAbel Vesa #define QSERDES_V6_RX_UCDR_SO_SATURATION_AND_ENABLE 0x34 34*ddf070f6SAbel Vesa #define QSERDES_V6_RX_UCDR_FASTLOCK_COUNT_LOW 0x3c 35*ddf070f6SAbel Vesa #define QSERDES_V6_RX_UCDR_FASTLOCK_COUNT_HIGH 0x40 36*ddf070f6SAbel Vesa #define QSERDES_V6_RX_UCDR_PI_CONTROLS 0x44 37*ddf070f6SAbel Vesa #define QSERDES_V6_RX_UCDR_SB2_THRESH1 0x4c 38*ddf070f6SAbel Vesa #define QSERDES_V6_RX_UCDR_SB2_THRESH2 0x50 39*ddf070f6SAbel Vesa #define QSERDES_V6_RX_UCDR_SB2_GAIN1 0x54 40*ddf070f6SAbel Vesa #define QSERDES_V6_RX_UCDR_SB2_GAIN2 0x58 41*ddf070f6SAbel Vesa #define QSERDES_V6_RX_AUX_DATA_TCOARSE_TFINE 0x60 42*ddf070f6SAbel Vesa #define QSERDES_V6_RX_TX_ADAPT_POST_THRESH 0xcc 43*ddf070f6SAbel Vesa #define QSERDES_V6_RX_VGA_CAL_CNTRL1 0xd4 44*ddf070f6SAbel Vesa #define QSERDES_V6_RX_VGA_CAL_CNTRL2 0xd8 45*ddf070f6SAbel Vesa #define QSERDES_V6_RX_GM_CAL 0xdc 46*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_EQU_ADAPTOR_CNTRL2 0xec 47*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_EQU_ADAPTOR_CNTRL3 0xf0 48*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_EQU_ADAPTOR_CNTRL4 0xf4 49*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_IDAC_TSETTLE_LOW 0xf8 50*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_IDAC_TSETTLE_HIGH 0xfc 51*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x110 52*ddf070f6SAbel Vesa #define QSERDES_V6_RX_SIDGET_ENABLES 0x118 53*ddf070f6SAbel Vesa #define QSERDES_V6_RX_SIGDET_CNTRL 0x11c 54*ddf070f6SAbel Vesa #define QSERDES_V6_RX_SIGDET_DEGLITCH_CNTRL 0x124 55*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_00_LOW 0x15c 56*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_00_HIGH 0x160 57*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_00_HIGH2 0x164 58*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_00_HIGH3 0x168 59*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_00_HIGH4 0x16c 60*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_01_LOW 0x170 61*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_01_HIGH 0x174 62*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_01_HIGH2 0x178 63*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_01_HIGH3 0x17c 64*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_01_HIGH4 0x180 65*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_10_LOW 0x184 66*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_10_HIGH 0x188 67*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_10_HIGH2 0x18c 68*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_10_HIGH3 0x190 69*ddf070f6SAbel Vesa #define QSERDES_V6_RX_RX_MODE_10_HIGH4 0x194 70*ddf070f6SAbel Vesa #define QSERDES_V6_RX_DFE_EN_TIMER 0x1a0 71*ddf070f6SAbel Vesa #define QSERDES_V6_RX_DFE_CTLE_POST_CAL_OFFSET 0x1a4 72*ddf070f6SAbel Vesa #define QSERDES_V6_RX_DCC_CTRL1 0x1a8 73*ddf070f6SAbel Vesa #define QSERDES_V6_RX_VTH_CODE 0x1b0 74*ddf070f6SAbel Vesa #define QSERDES_V6_RX_SIGDET_CAL_CTRL1 0x1e4 75*ddf070f6SAbel Vesa #define QSERDES_V6_RX_SIGDET_CAL_TRIM 0x1f8 76*ddf070f6SAbel Vesa 77*ddf070f6SAbel Vesa #endif 78