1*5fc21d1bSDmitry Baryshkov /* SPDX-License-Identifier: GPL-2.0 */ 2*5fc21d1bSDmitry Baryshkov /* 3*5fc21d1bSDmitry Baryshkov * Copyright (c) 2017, The Linux Foundation. All rights reserved. 4*5fc21d1bSDmitry Baryshkov */ 5*5fc21d1bSDmitry Baryshkov 6*5fc21d1bSDmitry Baryshkov #ifndef QCOM_PHY_QMP_QSERDES_TXRX_V4_20_H_ 7*5fc21d1bSDmitry Baryshkov #define QCOM_PHY_QMP_QSERDES_TXRX_V4_20_H_ 8*5fc21d1bSDmitry Baryshkov 9*5fc21d1bSDmitry Baryshkov /* Only for QMP V4_20 PHY - TX registers */ 10*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_TX_LANE_MODE_1 0x88 11*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_TX_LANE_MODE_2 0x8c 12*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_TX_LANE_MODE_3 0x90 13*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_TX_VMODE_CTRL1 0xc4 14*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_TX_PI_QEC_CTRL 0xe0 15*5fc21d1bSDmitry Baryshkov 16*5fc21d1bSDmitry Baryshkov /* Only for QMP V4_20 PHY - RX registers */ 17*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_FO_GAIN_RATE2 0x008 18*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_UCDR_PI_CONTROLS 0x058 19*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_AUX_DATA_TCOARSE_TFINE 0x0ac 20*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_DFE_3 0x110 21*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_DFE_DAC_ENABLE1 0x134 22*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_DFE_DAC_ENABLE2 0x138 23*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_VGA_CAL_CNTRL2 0x150 24*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x178 25*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_MODE_RATE_0_1_B1 0x1c8 26*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_MODE_RATE_0_1_B2 0x1cc 27*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_MODE_RATE_0_1_B3 0x1d0 28*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_MODE_RATE_0_1_B4 0x1d4 29*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_MODE_RATE2_B0 0x1d8 30*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_MODE_RATE2_B1 0x1dc 31*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_MODE_RATE2_B2 0x1e0 32*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_MODE_RATE2_B3 0x1e4 33*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_MODE_RATE2_B4 0x1e8 34*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_MODE_RATE3_B0 0x1ec 35*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_MODE_RATE3_B1 0x1f0 36*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_MODE_RATE3_B2 0x1f4 37*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_MODE_RATE3_B3 0x1f8 38*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_RX_MODE_RATE3_B4 0x1fc 39*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_PHPRE_CTRL 0x200 40*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_DFE_CTLE_POST_CAL_OFFSET 0x20c 41*5fc21d1bSDmitry Baryshkov #define QSERDES_V4_20_RX_MARG_COARSE_CTRL2 0x23c 42*5fc21d1bSDmitry Baryshkov 43*5fc21d1bSDmitry Baryshkov #endif 44