1a7fc833eSDmitry Baryshkov /* SPDX-License-Identifier: GPL-2.0 */ 2a7fc833eSDmitry Baryshkov /* 3a7fc833eSDmitry Baryshkov * Copyright (c) 2017, The Linux Foundation. All rights reserved. 4a7fc833eSDmitry Baryshkov */ 5a7fc833eSDmitry Baryshkov 6a7fc833eSDmitry Baryshkov #ifndef QCOM_PHY_QMP_QSERDES_TXRX_V3_H_ 7a7fc833eSDmitry Baryshkov #define QCOM_PHY_QMP_QSERDES_TXRX_V3_H_ 8a7fc833eSDmitry Baryshkov 9a7fc833eSDmitry Baryshkov /* Only for QMP V3 PHY - TX registers */ 10a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_BIST_MODE_LANENO 0x000 11a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_CLKBUF_ENABLE 0x008 12a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_TX_EMP_POST1_LVL 0x00c 13a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_TX_DRV_LVL 0x01c 14a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_RESET_TSYNC_EN 0x024 15a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_PRE_STALL_LDO_BOOST_EN 0x028 16a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_TX_BAND 0x02c 17a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_SLEW_CNTL 0x030 18a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_INTERFACE_SELECT 0x034 19a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_RES_CODE_LANE_TX 0x03c 20a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_RES_CODE_LANE_RX 0x040 21a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_RES_CODE_LANE_OFFSET_TX 0x044 22a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_RES_CODE_LANE_OFFSET_RX 0x048 23a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_DEBUG_BUS_SEL 0x058 24a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_TRANSCEIVER_BIAS_EN 0x05c 25a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_HIGHZ_DRVR_EN 0x060 26a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_TX_POL_INV 0x064 27a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_PARRATE_REC_DETECT_IDLE_EN 0x068 28a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_LANE_MODE_1 0x08c 29*d88b3058SDmitry Baryshkov #define QSERDES_V3_TX_LANE_MODE_2 0x090 30*d88b3058SDmitry Baryshkov #define QSERDES_V3_TX_LANE_MODE_3 0x094 31a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_RCV_DETECT_LVL_2 0x0a4 32a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_TRAN_DRVR_EMP_EN 0x0c0 33a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_TX_INTERFACE_MODE 0x0c4 34a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_VMODE_CTRL1 0x0f0 35a7fc833eSDmitry Baryshkov 36a7fc833eSDmitry Baryshkov /* Only for QMP V3 PHY - RX registers */ 37a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_FO_GAIN 0x008 38a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_SO_GAIN_HALF 0x00c 39a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_SO_GAIN 0x014 40a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_SVS_SO_GAIN_HALF 0x024 41a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_SVS_SO_GAIN_QUARTER 0x028 42a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_SVS_SO_GAIN 0x02c 43a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_FASTLOCK_FO_GAIN 0x030 44a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_SO_SATURATION_AND_ENABLE 0x034 45a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_FASTLOCK_COUNT_LOW 0x03c 46a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_FASTLOCK_COUNT_HIGH 0x040 47a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_PI_CONTROLS 0x044 48a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_TERM_BW 0x07c 49a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_VGA_CAL_CNTRL1 0x0bc 50a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_VGA_CAL_CNTRL2 0x0c0 51a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_EQ_GAIN2_LSB 0x0c8 52a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_EQ_GAIN2_MSB 0x0cc 53*d88b3058SDmitry Baryshkov #define QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL1 0x0d0 54a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL2 0x0d4 55a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL3 0x0d8 56a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL4 0x0dc 57a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x0f8 58a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_OFFSET_ADAPTOR_CNTRL2 0x0fc 59a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_SIGDET_ENABLES 0x100 60a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_SIGDET_CNTRL 0x104 61a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_SIGDET_LVL 0x108 62a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_SIGDET_DEGLITCH_CNTRL 0x10c 63a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_BAND 0x110 64a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_INTERFACE_MODE 0x11c 65a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_MODE_00 0x164 66a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_MODE_01 0x168 67a7fc833eSDmitry Baryshkov 68a7fc833eSDmitry Baryshkov #endif 69