1*a7fc833eSDmitry Baryshkov /* SPDX-License-Identifier: GPL-2.0 */ 2*a7fc833eSDmitry Baryshkov /* 3*a7fc833eSDmitry Baryshkov * Copyright (c) 2017, The Linux Foundation. All rights reserved. 4*a7fc833eSDmitry Baryshkov */ 5*a7fc833eSDmitry Baryshkov 6*a7fc833eSDmitry Baryshkov #ifndef QCOM_PHY_QMP_QSERDES_TXRX_V3_H_ 7*a7fc833eSDmitry Baryshkov #define QCOM_PHY_QMP_QSERDES_TXRX_V3_H_ 8*a7fc833eSDmitry Baryshkov 9*a7fc833eSDmitry Baryshkov /* Only for QMP V3 PHY - TX registers */ 10*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_BIST_MODE_LANENO 0x000 11*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_CLKBUF_ENABLE 0x008 12*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_TX_EMP_POST1_LVL 0x00c 13*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_TX_DRV_LVL 0x01c 14*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_RESET_TSYNC_EN 0x024 15*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_PRE_STALL_LDO_BOOST_EN 0x028 16*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_TX_BAND 0x02c 17*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_SLEW_CNTL 0x030 18*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_INTERFACE_SELECT 0x034 19*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_RES_CODE_LANE_TX 0x03c 20*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_RES_CODE_LANE_RX 0x040 21*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_RES_CODE_LANE_OFFSET_TX 0x044 22*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_RES_CODE_LANE_OFFSET_RX 0x048 23*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_DEBUG_BUS_SEL 0x058 24*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_TRANSCEIVER_BIAS_EN 0x05c 25*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_HIGHZ_DRVR_EN 0x060 26*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_TX_POL_INV 0x064 27*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_PARRATE_REC_DETECT_IDLE_EN 0x068 28*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_LANE_MODE_1 0x08c 29*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_RCV_DETECT_LVL_2 0x0a4 30*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_TRAN_DRVR_EMP_EN 0x0c0 31*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_TX_INTERFACE_MODE 0x0c4 32*a7fc833eSDmitry Baryshkov #define QSERDES_V3_TX_VMODE_CTRL1 0x0f0 33*a7fc833eSDmitry Baryshkov 34*a7fc833eSDmitry Baryshkov /* Only for QMP V3 PHY - RX registers */ 35*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_FO_GAIN 0x008 36*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_SO_GAIN_HALF 0x00c 37*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_SO_GAIN 0x014 38*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_SVS_SO_GAIN_HALF 0x024 39*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_SVS_SO_GAIN_QUARTER 0x028 40*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_SVS_SO_GAIN 0x02c 41*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_FASTLOCK_FO_GAIN 0x030 42*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_SO_SATURATION_AND_ENABLE 0x034 43*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_FASTLOCK_COUNT_LOW 0x03c 44*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_FASTLOCK_COUNT_HIGH 0x040 45*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_UCDR_PI_CONTROLS 0x044 46*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_TERM_BW 0x07c 47*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_VGA_CAL_CNTRL1 0x0bc 48*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_VGA_CAL_CNTRL2 0x0c0 49*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_EQ_GAIN2_LSB 0x0c8 50*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_EQ_GAIN2_MSB 0x0cc 51*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL2 0x0d4 52*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL3 0x0d8 53*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL4 0x0dc 54*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x0f8 55*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_OFFSET_ADAPTOR_CNTRL2 0x0fc 56*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_SIGDET_ENABLES 0x100 57*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_SIGDET_CNTRL 0x104 58*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_SIGDET_LVL 0x108 59*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_SIGDET_DEGLITCH_CNTRL 0x10c 60*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_BAND 0x110 61*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_INTERFACE_MODE 0x11c 62*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_MODE_00 0x164 63*a7fc833eSDmitry Baryshkov #define QSERDES_V3_RX_RX_MODE_01 0x168 64*a7fc833eSDmitry Baryshkov 65*a7fc833eSDmitry Baryshkov #endif 66