15ae11aa4SDmitry Baryshkov /* SPDX-License-Identifier: GPL-2.0 */ 25ae11aa4SDmitry Baryshkov /* 35ae11aa4SDmitry Baryshkov * Copyright (c) 2017, The Linux Foundation. All rights reserved. 45ae11aa4SDmitry Baryshkov */ 55ae11aa4SDmitry Baryshkov 65ae11aa4SDmitry Baryshkov #ifndef QCOM_PHY_QMP_PCS_V2_H_ 75ae11aa4SDmitry Baryshkov #define QCOM_PHY_QMP_PCS_V2_H_ 85ae11aa4SDmitry Baryshkov 95ae11aa4SDmitry Baryshkov /* Only for QMP V2 PHY - PCS registers */ 105ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_POWER_DOWN_CONTROL 0x004 115ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_TXDEEMPH_M6DB_V0 0x024 125ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_TXDEEMPH_M3P5DB_V0 0x028 135ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_TX_LARGE_AMP_DRV_LVL 0x034 145ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_TX_LARGE_AMP_POST_EMP_LVL 0x038 155ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_TX_SMALL_AMP_DRV_LVL 0x03c 165ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_TX_SMALL_AMP_POST_EMP_LVL 0x040 175ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_ENDPOINT_REFCLK_DRIVE 0x054 185ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_RX_IDLE_DTCT_CNTRL 0x058 195ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_POWER_STATE_CONFIG1 0x060 205ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_POWER_STATE_CONFIG2 0x064 215ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_POWER_STATE_CONFIG4 0x06c 225ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_LOCK_DETECT_CONFIG1 0x080 235ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_LOCK_DETECT_CONFIG2 0x084 245ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_LOCK_DETECT_CONFIG3 0x088 255ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_PWRUP_RESET_DLY_TIME_AUXCLK 0x0a0 265ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_LP_WAKEUP_DLY_TIME_AUXCLK 0x0a4 27*d36e341aSDmitry Baryshkov #define QPHY_V2_PCS_FLL_CNTRL1 0x0c0 28*d36e341aSDmitry Baryshkov #define QPHY_V2_PCS_FLL_CNTRL2 0x0c4 29*d36e341aSDmitry Baryshkov #define QPHY_V2_PCS_FLL_CNT_VAL_L 0x0c8 30*d36e341aSDmitry Baryshkov #define QPHY_V2_PCS_FLL_CNT_VAL_H_TOL 0x0cc 31*d36e341aSDmitry Baryshkov #define QPHY_V2_PCS_FLL_MAN_CODE 0x0d0 32*d36e341aSDmitry Baryshkov 33*d36e341aSDmitry Baryshkov /* UFS only ? */ 345ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_RX_MIN_STALL_NOCONFIG_TIME_CAP 0x0cc 355ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_RX_SYM_RESYNC_CTRL 0x13c 365ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_RX_MIN_HIBERN8_TIME 0x140 375ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_RX_SIGDET_CTRL2 0x148 385ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_RX_PWM_GEAR_BAND 0x154 395ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME_AUXCLK_LSB 0x1a8 405ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_OSC_DTCT_ACTIONS 0x1ac 415ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_RX_SIGDET_LVL 0x1d8 425ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_L1SS_WAKEUP_DLY_TIME_AUXCLK_LSB 0x1dc 435ae11aa4SDmitry Baryshkov #define QPHY_V2_PCS_L1SS_WAKEUP_DLY_TIME_AUXCLK_MSB 0x1e0 445ae11aa4SDmitry Baryshkov 455ae11aa4SDmitry Baryshkov #endif 46