1# SPDX-License-Identifier: GPL-2.0-only 2# 3# Phy drivers for Qualcomm and Atheros platforms 4# 5config PHY_ATH79_USB 6 tristate "Atheros AR71XX/9XXX USB PHY driver" 7 depends on OF && (ATH79 || COMPILE_TEST) 8 default y if USB_EHCI_HCD_PLATFORM || USB_OHCI_HCD_PLATFORM 9 select RESET_CONTROLLER 10 select GENERIC_PHY 11 help 12 Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs. 13 14config PHY_QCOM_APQ8064_SATA 15 tristate "Qualcomm APQ8064 SATA SerDes/PHY driver" 16 depends on ARCH_QCOM 17 depends on HAS_IOMEM 18 depends on OF 19 select GENERIC_PHY 20 21config PHY_QCOM_EDP 22 tristate "Qualcomm eDP PHY driver" 23 depends on ARCH_QCOM || COMPILE_TEST 24 depends on OF 25 depends on COMMON_CLK 26 select GENERIC_PHY 27 help 28 Enable this driver to support the Qualcomm eDP PHY found in various 29 Qualcomm chipsets. 30 31config PHY_QCOM_IPQ4019_USB 32 tristate "Qualcomm IPQ4019 USB PHY driver" 33 depends on OF && (ARCH_QCOM || COMPILE_TEST) 34 select GENERIC_PHY 35 help 36 Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s. 37 38config PHY_QCOM_IPQ806X_SATA 39 tristate "Qualcomm IPQ806x SATA SerDes/PHY driver" 40 depends on ARCH_QCOM 41 depends on HAS_IOMEM 42 depends on OF 43 select GENERIC_PHY 44 45config PHY_QCOM_PCIE2 46 tristate "Qualcomm PCIe Gen2 PHY Driver" 47 depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST) 48 select GENERIC_PHY 49 help 50 Enable this to support the Qualcomm PCIe PHY, used with the Synopsys 51 based PCIe controller. 52 53config PHY_QCOM_QMP 54 tristate "Qualcomm QMP PHY Driver" 55 depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST) 56 select GENERIC_PHY 57 select MFD_SYSCON 58 help 59 Enable this to support the QMP PHY transceiver that is used 60 with controllers such as PCIe, UFS, and USB on Qualcomm chips. 61 62config PHY_QCOM_QUSB2 63 tristate "Qualcomm QUSB2 PHY Driver" 64 depends on OF && (ARCH_QCOM || COMPILE_TEST) 65 depends on NVMEM || !NVMEM 66 select GENERIC_PHY 67 help 68 Enable this to support the HighSpeed QUSB2 PHY transceiver for USB 69 controllers on Qualcomm chips. This driver supports the high-speed 70 PHY which is usually paired with either the ChipIdea or Synopsys DWC3 71 USB IPs on MSM SOCs. 72 73config PHY_QCOM_USB_HS 74 tristate "Qualcomm USB HS PHY module" 75 depends on USB_ULPI_BUS 76 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in 77 select GENERIC_PHY 78 help 79 Support for the USB high-speed ULPI compliant phy on Qualcomm 80 chipsets. 81 82config PHY_QCOM_USB_SNPS_FEMTO_V2 83 tristate "Qualcomm SNPS FEMTO USB HS PHY V2 module" 84 depends on OF && (ARCH_QCOM || COMPILE_TEST) 85 select GENERIC_PHY 86 help 87 Enable support for the USB high-speed SNPS Femto phy on Qualcomm 88 chipsets. This PHY has differences in the register map compared 89 to the V1 variants. The PHY is paired with a Synopsys DWC3 USB 90 controller on Qualcomm SOCs. 91 92config PHY_QCOM_USB_HSIC 93 tristate "Qualcomm USB HSIC ULPI PHY module" 94 depends on USB_ULPI_BUS 95 select GENERIC_PHY 96 help 97 Support for the USB HSIC ULPI compliant PHY on QCOM chipsets. 98 99config PHY_QCOM_USB_HS_28NM 100 tristate "Qualcomm 28nm High-Speed PHY" 101 depends on OF && (ARCH_QCOM || COMPILE_TEST) 102 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in 103 select GENERIC_PHY 104 help 105 Enable this to support the Qualcomm Synopsys DesignWare Core 28nm 106 High-Speed PHY driver. This driver supports the Hi-Speed PHY which 107 is usually paired with either the ChipIdea or Synopsys DWC3 USB 108 IPs on MSM SOCs. 109 110config PHY_QCOM_USB_SS 111 tristate "Qualcomm USB Super-Speed PHY driver" 112 depends on OF && (ARCH_QCOM || COMPILE_TEST) 113 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in 114 select GENERIC_PHY 115 help 116 Enable this to support the Super-Speed USB transceiver on various 117 Qualcomm chipsets. 118 119config PHY_QCOM_IPQ806X_USB 120 tristate "Qualcomm IPQ806x DWC3 USB PHY driver" 121 depends on HAS_IOMEM 122 depends on OF && (ARCH_QCOM || COMPILE_TEST) 123 select GENERIC_PHY 124 help 125 This option enables support for the Synopsis PHYs present inside the 126 Qualcomm USB3.0 DWC3 controller on ipq806x SoC. This driver supports 127 both HS and SS PHY controllers. 128