1 /*
2  * Allwinner sun9i USB phy driver
3  *
4  * Copyright (C) 2014-2015 Chen-Yu Tsai <wens@csie.org>
5  *
6  * Based on phy-sun4i-usb.c from
7  * Hans de Goede <hdegoede@redhat.com>
8  *
9  * and code from
10  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License as published by
14  * the Free Software Foundation; either version 2 of the License, or
15  * (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  * GNU General Public License for more details.
21  */
22 
23 #include <linux/clk.h>
24 #include <linux/err.h>
25 #include <linux/io.h>
26 #include <linux/module.h>
27 #include <linux/phy/phy.h>
28 #include <linux/usb/of.h>
29 #include <linux/platform_device.h>
30 #include <linux/reset.h>
31 
32 #define SUNXI_AHB_INCR16_BURST_EN	BIT(11)
33 #define SUNXI_AHB_INCR8_BURST_EN	BIT(10)
34 #define SUNXI_AHB_INCR4_BURST_EN	BIT(9)
35 #define SUNXI_AHB_INCRX_ALIGN_EN	BIT(8)
36 #define SUNXI_ULPI_BYPASS_EN		BIT(0)
37 
38 /* usb1 HSIC specific bits */
39 #define SUNXI_EHCI_HS_FORCE		BIT(20)
40 #define SUNXI_HSIC_CONNECT_DET		BIT(17)
41 #define SUNXI_HSIC_CONNECT_INT		BIT(16)
42 #define SUNXI_HSIC			BIT(1)
43 
44 struct sun9i_usb_phy {
45 	struct phy *phy;
46 	void __iomem *pmu;
47 	struct reset_control *reset;
48 	struct clk *clk;
49 	struct clk *hsic_clk;
50 	enum usb_phy_interface type;
51 };
52 
53 static void sun9i_usb_phy_passby(struct sun9i_usb_phy *phy, int enable)
54 {
55 	u32 bits, reg_value;
56 
57 	bits = SUNXI_AHB_INCR16_BURST_EN | SUNXI_AHB_INCR8_BURST_EN |
58 		SUNXI_AHB_INCR4_BURST_EN | SUNXI_AHB_INCRX_ALIGN_EN |
59 		SUNXI_ULPI_BYPASS_EN;
60 
61 	if (phy->type == USBPHY_INTERFACE_MODE_HSIC)
62 		bits |= SUNXI_HSIC | SUNXI_EHCI_HS_FORCE |
63 			SUNXI_HSIC_CONNECT_DET | SUNXI_HSIC_CONNECT_INT;
64 
65 	reg_value = readl(phy->pmu);
66 
67 	if (enable)
68 		reg_value |= bits;
69 	else
70 		reg_value &= ~bits;
71 
72 	writel(reg_value, phy->pmu);
73 }
74 
75 static int sun9i_usb_phy_init(struct phy *_phy)
76 {
77 	struct sun9i_usb_phy *phy = phy_get_drvdata(_phy);
78 	int ret;
79 
80 	ret = clk_prepare_enable(phy->clk);
81 	if (ret)
82 		goto err_clk;
83 
84 	ret = clk_prepare_enable(phy->hsic_clk);
85 	if (ret)
86 		goto err_hsic_clk;
87 
88 	ret = reset_control_deassert(phy->reset);
89 	if (ret)
90 		goto err_reset;
91 
92 	sun9i_usb_phy_passby(phy, 1);
93 	return 0;
94 
95 err_reset:
96 	clk_disable_unprepare(phy->hsic_clk);
97 
98 err_hsic_clk:
99 	clk_disable_unprepare(phy->clk);
100 
101 err_clk:
102 	return ret;
103 }
104 
105 static int sun9i_usb_phy_exit(struct phy *_phy)
106 {
107 	struct sun9i_usb_phy *phy = phy_get_drvdata(_phy);
108 
109 	sun9i_usb_phy_passby(phy, 0);
110 	reset_control_assert(phy->reset);
111 	clk_disable_unprepare(phy->hsic_clk);
112 	clk_disable_unprepare(phy->clk);
113 
114 	return 0;
115 }
116 
117 static const struct phy_ops sun9i_usb_phy_ops = {
118 	.init		= sun9i_usb_phy_init,
119 	.exit		= sun9i_usb_phy_exit,
120 	.owner		= THIS_MODULE,
121 };
122 
123 static int sun9i_usb_phy_probe(struct platform_device *pdev)
124 {
125 	struct sun9i_usb_phy *phy;
126 	struct device *dev = &pdev->dev;
127 	struct device_node *np = dev->of_node;
128 	struct phy_provider *phy_provider;
129 	struct resource *res;
130 
131 	phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
132 	if (!phy)
133 		return -ENOMEM;
134 
135 	phy->type = of_usb_get_phy_mode(np);
136 	if (phy->type == USBPHY_INTERFACE_MODE_HSIC) {
137 		phy->clk = devm_clk_get(dev, "hsic_480M");
138 		if (IS_ERR(phy->clk)) {
139 			dev_err(dev, "failed to get hsic_480M clock\n");
140 			return PTR_ERR(phy->clk);
141 		}
142 
143 		phy->hsic_clk = devm_clk_get(dev, "hsic_12M");
144 		if (IS_ERR(phy->hsic_clk)) {
145 			dev_err(dev, "failed to get hsic_12M clock\n");
146 			return PTR_ERR(phy->hsic_clk);
147 		}
148 
149 		phy->reset = devm_reset_control_get(dev, "hsic");
150 		if (IS_ERR(phy->reset)) {
151 			dev_err(dev, "failed to get reset control\n");
152 			return PTR_ERR(phy->reset);
153 		}
154 	} else {
155 		phy->clk = devm_clk_get(dev, "phy");
156 		if (IS_ERR(phy->clk)) {
157 			dev_err(dev, "failed to get phy clock\n");
158 			return PTR_ERR(phy->clk);
159 		}
160 
161 		phy->reset = devm_reset_control_get(dev, "phy");
162 		if (IS_ERR(phy->reset)) {
163 			dev_err(dev, "failed to get reset control\n");
164 			return PTR_ERR(phy->reset);
165 		}
166 	}
167 
168 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
169 	phy->pmu = devm_ioremap_resource(dev, res);
170 	if (IS_ERR(phy->pmu))
171 		return PTR_ERR(phy->pmu);
172 
173 	phy->phy = devm_phy_create(dev, NULL, &sun9i_usb_phy_ops);
174 	if (IS_ERR(phy->phy)) {
175 		dev_err(dev, "failed to create PHY\n");
176 		return PTR_ERR(phy->phy);
177 	}
178 
179 	phy_set_drvdata(phy->phy, phy);
180 	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
181 
182 	return PTR_ERR_OR_ZERO(phy_provider);
183 }
184 
185 static const struct of_device_id sun9i_usb_phy_of_match[] = {
186 	{ .compatible = "allwinner,sun9i-a80-usb-phy" },
187 	{ },
188 };
189 MODULE_DEVICE_TABLE(of, sun9i_usb_phy_of_match);
190 
191 static struct platform_driver sun9i_usb_phy_driver = {
192 	.probe	= sun9i_usb_phy_probe,
193 	.driver = {
194 		.of_match_table	= sun9i_usb_phy_of_match,
195 		.name  = "sun9i-usb-phy",
196 	}
197 };
198 module_platform_driver(sun9i_usb_phy_driver);
199 
200 MODULE_DESCRIPTION("Allwinner sun9i USB phy driver");
201 MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
202 MODULE_LICENSE("GPL");
203