1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Allwinner sun4i USB phy driver
4  *
5  * Copyright (C) 2014-2015 Hans de Goede <hdegoede@redhat.com>
6  *
7  * Based on code from
8  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
9  *
10  * Modelled after: Samsung S5P/Exynos SoC series MIPI CSIS/DSIM DPHY driver
11  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
12  * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
13  */
14 
15 #include <linux/clk.h>
16 #include <linux/delay.h>
17 #include <linux/err.h>
18 #include <linux/extcon-provider.h>
19 #include <linux/gpio/consumer.h>
20 #include <linux/io.h>
21 #include <linux/interrupt.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/mutex.h>
25 #include <linux/of.h>
26 #include <linux/of_address.h>
27 #include <linux/of_device.h>
28 #include <linux/of_gpio.h>
29 #include <linux/phy/phy.h>
30 #include <linux/phy/phy-sun4i-usb.h>
31 #include <linux/platform_device.h>
32 #include <linux/power_supply.h>
33 #include <linux/regulator/consumer.h>
34 #include <linux/reset.h>
35 #include <linux/spinlock.h>
36 #include <linux/usb/of.h>
37 #include <linux/workqueue.h>
38 
39 #define REG_ISCR			0x00
40 #define REG_PHYCTL_A10			0x04
41 #define REG_PHYBIST			0x08
42 #define REG_PHYTUNE			0x0c
43 #define REG_PHYCTL_A33			0x10
44 #define REG_PHY_OTGCTL			0x20
45 
46 #define REG_PMU_UNK1			0x10
47 
48 #define PHYCTL_DATA			BIT(7)
49 
50 #define OTGCTL_ROUTE_MUSB		BIT(0)
51 
52 #define SUNXI_AHB_ICHR8_EN		BIT(10)
53 #define SUNXI_AHB_INCR4_BURST_EN	BIT(9)
54 #define SUNXI_AHB_INCRX_ALIGN_EN	BIT(8)
55 #define SUNXI_ULPI_BYPASS_EN		BIT(0)
56 
57 /* ISCR, Interface Status and Control bits */
58 #define ISCR_ID_PULLUP_EN		(1 << 17)
59 #define ISCR_DPDM_PULLUP_EN	(1 << 16)
60 /* sunxi has the phy id/vbus pins not connected, so we use the force bits */
61 #define ISCR_FORCE_ID_MASK	(3 << 14)
62 #define ISCR_FORCE_ID_LOW		(2 << 14)
63 #define ISCR_FORCE_ID_HIGH	(3 << 14)
64 #define ISCR_FORCE_VBUS_MASK	(3 << 12)
65 #define ISCR_FORCE_VBUS_LOW	(2 << 12)
66 #define ISCR_FORCE_VBUS_HIGH	(3 << 12)
67 
68 /* Common Control Bits for Both PHYs */
69 #define PHY_PLL_BW			0x03
70 #define PHY_RES45_CAL_EN		0x0c
71 
72 /* Private Control Bits for Each PHY */
73 #define PHY_TX_AMPLITUDE_TUNE		0x20
74 #define PHY_TX_SLEWRATE_TUNE		0x22
75 #define PHY_VBUSVALID_TH_SEL		0x25
76 #define PHY_PULLUP_RES_SEL		0x27
77 #define PHY_OTG_FUNC_EN			0x28
78 #define PHY_VBUS_DET_EN			0x29
79 #define PHY_DISCON_TH_SEL		0x2a
80 #define PHY_SQUELCH_DETECT		0x3c
81 
82 /* A83T specific control bits for PHY0 */
83 #define PHY_CTL_VBUSVLDEXT		BIT(5)
84 #define PHY_CTL_SIDDQ			BIT(3)
85 
86 /* A83T specific control bits for PHY2 HSIC */
87 #define SUNXI_EHCI_HS_FORCE		BIT(20)
88 #define SUNXI_HSIC_CONNECT_DET		BIT(17)
89 #define SUNXI_HSIC_CONNECT_INT		BIT(16)
90 #define SUNXI_HSIC			BIT(1)
91 
92 #define MAX_PHYS			4
93 
94 /*
95  * Note do not raise the debounce time, we must report Vusb high within 100ms
96  * otherwise we get Vbus errors
97  */
98 #define DEBOUNCE_TIME			msecs_to_jiffies(50)
99 #define POLL_TIME			msecs_to_jiffies(250)
100 
101 enum sun4i_usb_phy_type {
102 	sun4i_a10_phy,
103 	sun6i_a31_phy,
104 	sun8i_a33_phy,
105 	sun8i_a83t_phy,
106 	sun8i_h3_phy,
107 	sun8i_r40_phy,
108 	sun8i_v3s_phy,
109 	sun50i_a64_phy,
110 	sun50i_h6_phy,
111 };
112 
113 struct sun4i_usb_phy_cfg {
114 	int num_phys;
115 	int hsic_index;
116 	enum sun4i_usb_phy_type type;
117 	u32 disc_thresh;
118 	u8 phyctl_offset;
119 	bool dedicated_clocks;
120 	bool enable_pmu_unk1;
121 	bool phy0_dual_route;
122 	int missing_phys;
123 };
124 
125 struct sun4i_usb_phy_data {
126 	void __iomem *base;
127 	const struct sun4i_usb_phy_cfg *cfg;
128 	enum usb_dr_mode dr_mode;
129 	spinlock_t reg_lock; /* guard access to phyctl reg */
130 	struct sun4i_usb_phy {
131 		struct phy *phy;
132 		void __iomem *pmu;
133 		struct regulator *vbus;
134 		struct reset_control *reset;
135 		struct clk *clk;
136 		struct clk *clk2;
137 		bool regulator_on;
138 		int index;
139 	} phys[MAX_PHYS];
140 	/* phy0 / otg related variables */
141 	struct extcon_dev *extcon;
142 	bool phy0_init;
143 	struct gpio_desc *id_det_gpio;
144 	struct gpio_desc *vbus_det_gpio;
145 	struct power_supply *vbus_power_supply;
146 	struct notifier_block vbus_power_nb;
147 	bool vbus_power_nb_registered;
148 	bool force_session_end;
149 	int id_det_irq;
150 	int vbus_det_irq;
151 	int id_det;
152 	int vbus_det;
153 	struct delayed_work detect;
154 };
155 
156 #define to_sun4i_usb_phy_data(phy) \
157 	container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index])
158 
159 static void sun4i_usb_phy0_update_iscr(struct phy *_phy, u32 clr, u32 set)
160 {
161 	struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
162 	struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
163 	u32 iscr;
164 
165 	iscr = readl(data->base + REG_ISCR);
166 	iscr &= ~clr;
167 	iscr |= set;
168 	writel(iscr, data->base + REG_ISCR);
169 }
170 
171 static void sun4i_usb_phy0_set_id_detect(struct phy *phy, u32 val)
172 {
173 	if (val)
174 		val = ISCR_FORCE_ID_HIGH;
175 	else
176 		val = ISCR_FORCE_ID_LOW;
177 
178 	sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_ID_MASK, val);
179 }
180 
181 static void sun4i_usb_phy0_set_vbus_detect(struct phy *phy, u32 val)
182 {
183 	if (val)
184 		val = ISCR_FORCE_VBUS_HIGH;
185 	else
186 		val = ISCR_FORCE_VBUS_LOW;
187 
188 	sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_VBUS_MASK, val);
189 }
190 
191 static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
192 				int len)
193 {
194 	struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
195 	u32 temp, usbc_bit = BIT(phy->index * 2);
196 	void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset;
197 	unsigned long flags;
198 	int i;
199 
200 	spin_lock_irqsave(&phy_data->reg_lock, flags);
201 
202 	if (phy_data->cfg->phyctl_offset == REG_PHYCTL_A33) {
203 		/* SoCs newer than A33 need us to set phyctl to 0 explicitly */
204 		writel(0, phyctl);
205 	}
206 
207 	for (i = 0; i < len; i++) {
208 		temp = readl(phyctl);
209 
210 		/* clear the address portion */
211 		temp &= ~(0xff << 8);
212 
213 		/* set the address */
214 		temp |= ((addr + i) << 8);
215 		writel(temp, phyctl);
216 
217 		/* set the data bit and clear usbc bit*/
218 		temp = readb(phyctl);
219 		if (data & 0x1)
220 			temp |= PHYCTL_DATA;
221 		else
222 			temp &= ~PHYCTL_DATA;
223 		temp &= ~usbc_bit;
224 		writeb(temp, phyctl);
225 
226 		/* pulse usbc_bit */
227 		temp = readb(phyctl);
228 		temp |= usbc_bit;
229 		writeb(temp, phyctl);
230 
231 		temp = readb(phyctl);
232 		temp &= ~usbc_bit;
233 		writeb(temp, phyctl);
234 
235 		data >>= 1;
236 	}
237 
238 	spin_unlock_irqrestore(&phy_data->reg_lock, flags);
239 }
240 
241 static void sun4i_usb_phy_passby(struct sun4i_usb_phy *phy, int enable)
242 {
243 	struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
244 	u32 bits, reg_value;
245 
246 	if (!phy->pmu)
247 		return;
248 
249 	bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN |
250 		SUNXI_AHB_INCRX_ALIGN_EN | SUNXI_ULPI_BYPASS_EN;
251 
252 	/* A83T USB2 is HSIC */
253 	if (phy_data->cfg->type == sun8i_a83t_phy && phy->index == 2)
254 		bits |= SUNXI_EHCI_HS_FORCE | SUNXI_HSIC_CONNECT_INT |
255 			SUNXI_HSIC;
256 
257 	reg_value = readl(phy->pmu);
258 
259 	if (enable)
260 		reg_value |= bits;
261 	else
262 		reg_value &= ~bits;
263 
264 	writel(reg_value, phy->pmu);
265 }
266 
267 static int sun4i_usb_phy_init(struct phy *_phy)
268 {
269 	struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
270 	struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
271 	int ret;
272 	u32 val;
273 
274 	ret = clk_prepare_enable(phy->clk);
275 	if (ret)
276 		return ret;
277 
278 	ret = clk_prepare_enable(phy->clk2);
279 	if (ret) {
280 		clk_disable_unprepare(phy->clk);
281 		return ret;
282 	}
283 
284 	ret = reset_control_deassert(phy->reset);
285 	if (ret) {
286 		clk_disable_unprepare(phy->clk2);
287 		clk_disable_unprepare(phy->clk);
288 		return ret;
289 	}
290 
291 	if (data->cfg->type == sun8i_a83t_phy ||
292 	    data->cfg->type == sun50i_h6_phy) {
293 		if (phy->index == 0) {
294 			val = readl(data->base + data->cfg->phyctl_offset);
295 			val |= PHY_CTL_VBUSVLDEXT;
296 			val &= ~PHY_CTL_SIDDQ;
297 			writel(val, data->base + data->cfg->phyctl_offset);
298 		}
299 	} else {
300 		if (phy->pmu && data->cfg->enable_pmu_unk1) {
301 			val = readl(phy->pmu + REG_PMU_UNK1);
302 			writel(val & ~2, phy->pmu + REG_PMU_UNK1);
303 		}
304 
305 		/* Enable USB 45 Ohm resistor calibration */
306 		if (phy->index == 0)
307 			sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, 0x01, 1);
308 
309 		/* Adjust PHY's magnitude and rate */
310 		sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5);
311 
312 		/* Disconnect threshold adjustment */
313 		sun4i_usb_phy_write(phy, PHY_DISCON_TH_SEL,
314 				    data->cfg->disc_thresh, 2);
315 	}
316 
317 	sun4i_usb_phy_passby(phy, 1);
318 
319 	if (phy->index == 0) {
320 		data->phy0_init = true;
321 
322 		/* Enable pull-ups */
323 		sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_DPDM_PULLUP_EN);
324 		sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_ID_PULLUP_EN);
325 
326 		/* Force ISCR and cable state updates */
327 		data->id_det = -1;
328 		data->vbus_det = -1;
329 		queue_delayed_work(system_wq, &data->detect, 0);
330 	}
331 
332 	return 0;
333 }
334 
335 static int sun4i_usb_phy_exit(struct phy *_phy)
336 {
337 	struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
338 	struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
339 
340 	if (phy->index == 0) {
341 		if (data->cfg->type == sun8i_a83t_phy ||
342 		    data->cfg->type == sun50i_h6_phy) {
343 			void __iomem *phyctl = data->base +
344 				data->cfg->phyctl_offset;
345 
346 			writel(readl(phyctl) | PHY_CTL_SIDDQ, phyctl);
347 		}
348 
349 		/* Disable pull-ups */
350 		sun4i_usb_phy0_update_iscr(_phy, ISCR_DPDM_PULLUP_EN, 0);
351 		sun4i_usb_phy0_update_iscr(_phy, ISCR_ID_PULLUP_EN, 0);
352 		data->phy0_init = false;
353 	}
354 
355 	sun4i_usb_phy_passby(phy, 0);
356 	reset_control_assert(phy->reset);
357 	clk_disable_unprepare(phy->clk2);
358 	clk_disable_unprepare(phy->clk);
359 
360 	return 0;
361 }
362 
363 static int sun4i_usb_phy0_get_id_det(struct sun4i_usb_phy_data *data)
364 {
365 	switch (data->dr_mode) {
366 	case USB_DR_MODE_OTG:
367 		if (data->id_det_gpio)
368 			return gpiod_get_value_cansleep(data->id_det_gpio);
369 		else
370 			return 1; /* Fallback to peripheral mode */
371 	case USB_DR_MODE_HOST:
372 		return 0;
373 	case USB_DR_MODE_PERIPHERAL:
374 	default:
375 		return 1;
376 	}
377 }
378 
379 static int sun4i_usb_phy0_get_vbus_det(struct sun4i_usb_phy_data *data)
380 {
381 	if (data->vbus_det_gpio)
382 		return gpiod_get_value_cansleep(data->vbus_det_gpio);
383 
384 	if (data->vbus_power_supply) {
385 		union power_supply_propval val;
386 		int r;
387 
388 		r = power_supply_get_property(data->vbus_power_supply,
389 					      POWER_SUPPLY_PROP_PRESENT, &val);
390 		if (r == 0)
391 			return val.intval;
392 	}
393 
394 	/* Fallback: report vbus as high */
395 	return 1;
396 }
397 
398 static bool sun4i_usb_phy0_have_vbus_det(struct sun4i_usb_phy_data *data)
399 {
400 	return data->vbus_det_gpio || data->vbus_power_supply;
401 }
402 
403 static bool sun4i_usb_phy0_poll(struct sun4i_usb_phy_data *data)
404 {
405 	if ((data->id_det_gpio && data->id_det_irq <= 0) ||
406 	    (data->vbus_det_gpio && data->vbus_det_irq <= 0))
407 		return true;
408 
409 	/*
410 	 * The A31/A23/A33 companion pmics (AXP221/AXP223) do not
411 	 * generate vbus change interrupts when the board is driving
412 	 * vbus using the N_VBUSEN pin on the pmic, so we must poll
413 	 * when using the pmic for vbus-det _and_ we're driving vbus.
414 	 */
415 	if ((data->cfg->type == sun6i_a31_phy ||
416 	     data->cfg->type == sun8i_a33_phy) &&
417 	    data->vbus_power_supply && data->phys[0].regulator_on)
418 		return true;
419 
420 	return false;
421 }
422 
423 static int sun4i_usb_phy_power_on(struct phy *_phy)
424 {
425 	struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
426 	struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
427 	int ret;
428 
429 	if (!phy->vbus || phy->regulator_on)
430 		return 0;
431 
432 	/* For phy0 only turn on Vbus if we don't have an ext. Vbus */
433 	if (phy->index == 0 && sun4i_usb_phy0_have_vbus_det(data) &&
434 				data->vbus_det) {
435 		dev_warn(&_phy->dev, "External vbus detected, not enabling our own vbus\n");
436 		return 0;
437 	}
438 
439 	ret = regulator_enable(phy->vbus);
440 	if (ret)
441 		return ret;
442 
443 	phy->regulator_on = true;
444 
445 	/* We must report Vbus high within OTG_TIME_A_WAIT_VRISE msec. */
446 	if (phy->index == 0 && sun4i_usb_phy0_poll(data))
447 		mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
448 
449 	return 0;
450 }
451 
452 static int sun4i_usb_phy_power_off(struct phy *_phy)
453 {
454 	struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
455 	struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
456 
457 	if (!phy->vbus || !phy->regulator_on)
458 		return 0;
459 
460 	regulator_disable(phy->vbus);
461 	phy->regulator_on = false;
462 
463 	/*
464 	 * phy0 vbus typically slowly discharges, sometimes this causes the
465 	 * Vbus gpio to not trigger an edge irq on Vbus off, so force a rescan.
466 	 */
467 	if (phy->index == 0 && !sun4i_usb_phy0_poll(data))
468 		mod_delayed_work(system_wq, &data->detect, POLL_TIME);
469 
470 	return 0;
471 }
472 
473 static int sun4i_usb_phy_set_mode(struct phy *_phy,
474 				  enum phy_mode mode, int submode)
475 {
476 	struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
477 	struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
478 	int new_mode;
479 
480 	if (phy->index != 0) {
481 		if (mode == PHY_MODE_USB_HOST)
482 			return 0;
483 		return -EINVAL;
484 	}
485 
486 	switch (mode) {
487 	case PHY_MODE_USB_HOST:
488 		new_mode = USB_DR_MODE_HOST;
489 		break;
490 	case PHY_MODE_USB_DEVICE:
491 		new_mode = USB_DR_MODE_PERIPHERAL;
492 		break;
493 	case PHY_MODE_USB_OTG:
494 		new_mode = USB_DR_MODE_OTG;
495 		break;
496 	default:
497 		return -EINVAL;
498 	}
499 
500 	if (new_mode != data->dr_mode) {
501 		dev_info(&_phy->dev, "Changing dr_mode to %d\n", new_mode);
502 		data->dr_mode = new_mode;
503 	}
504 
505 	data->id_det = -1; /* Force reprocessing of id */
506 	data->force_session_end = true;
507 	queue_delayed_work(system_wq, &data->detect, 0);
508 
509 	return 0;
510 }
511 
512 void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled)
513 {
514 	struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
515 
516 	sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2);
517 }
518 EXPORT_SYMBOL_GPL(sun4i_usb_phy_set_squelch_detect);
519 
520 static const struct phy_ops sun4i_usb_phy_ops = {
521 	.init		= sun4i_usb_phy_init,
522 	.exit		= sun4i_usb_phy_exit,
523 	.power_on	= sun4i_usb_phy_power_on,
524 	.power_off	= sun4i_usb_phy_power_off,
525 	.set_mode	= sun4i_usb_phy_set_mode,
526 	.owner		= THIS_MODULE,
527 };
528 
529 static void sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data *data, int id_det)
530 {
531 	u32 regval;
532 
533 	regval = readl(data->base + REG_PHY_OTGCTL);
534 	if (id_det == 0) {
535 		/* Host mode. Route phy0 to EHCI/OHCI */
536 		regval &= ~OTGCTL_ROUTE_MUSB;
537 	} else {
538 		/* Peripheral mode. Route phy0 to MUSB */
539 		regval |= OTGCTL_ROUTE_MUSB;
540 	}
541 	writel(regval, data->base + REG_PHY_OTGCTL);
542 }
543 
544 static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work)
545 {
546 	struct sun4i_usb_phy_data *data =
547 		container_of(work, struct sun4i_usb_phy_data, detect.work);
548 	struct phy *phy0 = data->phys[0].phy;
549 	struct sun4i_usb_phy *phy;
550 	bool force_session_end, id_notify = false, vbus_notify = false;
551 	int id_det, vbus_det;
552 
553 	if (!phy0)
554 		return;
555 
556 	phy = phy_get_drvdata(phy0);
557 	id_det = sun4i_usb_phy0_get_id_det(data);
558 	vbus_det = sun4i_usb_phy0_get_vbus_det(data);
559 
560 	mutex_lock(&phy0->mutex);
561 
562 	if (!data->phy0_init) {
563 		mutex_unlock(&phy0->mutex);
564 		return;
565 	}
566 
567 	force_session_end = data->force_session_end;
568 	data->force_session_end = false;
569 
570 	if (id_det != data->id_det) {
571 		/* id-change, force session end if we've no vbus detection */
572 		if (data->dr_mode == USB_DR_MODE_OTG &&
573 		    !sun4i_usb_phy0_have_vbus_det(data))
574 			force_session_end = true;
575 
576 		/* When entering host mode (id = 0) force end the session now */
577 		if (force_session_end && id_det == 0) {
578 			sun4i_usb_phy0_set_vbus_detect(phy0, 0);
579 			msleep(200);
580 			sun4i_usb_phy0_set_vbus_detect(phy0, 1);
581 		}
582 		sun4i_usb_phy0_set_id_detect(phy0, id_det);
583 		data->id_det = id_det;
584 		id_notify = true;
585 	}
586 
587 	if (vbus_det != data->vbus_det) {
588 		sun4i_usb_phy0_set_vbus_detect(phy0, vbus_det);
589 		data->vbus_det = vbus_det;
590 		vbus_notify = true;
591 	}
592 
593 	mutex_unlock(&phy0->mutex);
594 
595 	if (id_notify) {
596 		extcon_set_state_sync(data->extcon, EXTCON_USB_HOST,
597 					!id_det);
598 		/* When leaving host mode force end the session here */
599 		if (force_session_end && id_det == 1) {
600 			mutex_lock(&phy0->mutex);
601 			sun4i_usb_phy0_set_vbus_detect(phy0, 0);
602 			msleep(1000);
603 			sun4i_usb_phy0_set_vbus_detect(phy0, 1);
604 			mutex_unlock(&phy0->mutex);
605 		}
606 
607 		/* Enable PHY0 passby for host mode only. */
608 		sun4i_usb_phy_passby(phy, !id_det);
609 
610 		/* Re-route PHY0 if necessary */
611 		if (data->cfg->phy0_dual_route)
612 			sun4i_usb_phy0_reroute(data, id_det);
613 	}
614 
615 	if (vbus_notify)
616 		extcon_set_state_sync(data->extcon, EXTCON_USB, vbus_det);
617 
618 	if (sun4i_usb_phy0_poll(data))
619 		queue_delayed_work(system_wq, &data->detect, POLL_TIME);
620 }
621 
622 static irqreturn_t sun4i_usb_phy0_id_vbus_det_irq(int irq, void *dev_id)
623 {
624 	struct sun4i_usb_phy_data *data = dev_id;
625 
626 	/* vbus or id changed, let the pins settle and then scan them */
627 	mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
628 
629 	return IRQ_HANDLED;
630 }
631 
632 static int sun4i_usb_phy0_vbus_notify(struct notifier_block *nb,
633 				      unsigned long val, void *v)
634 {
635 	struct sun4i_usb_phy_data *data =
636 		container_of(nb, struct sun4i_usb_phy_data, vbus_power_nb);
637 	struct power_supply *psy = v;
638 
639 	/* Properties on the vbus_power_supply changed, scan vbus_det */
640 	if (val == PSY_EVENT_PROP_CHANGED && psy == data->vbus_power_supply)
641 		mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
642 
643 	return NOTIFY_OK;
644 }
645 
646 static struct phy *sun4i_usb_phy_xlate(struct device *dev,
647 					struct of_phandle_args *args)
648 {
649 	struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
650 
651 	if (args->args[0] >= data->cfg->num_phys)
652 		return ERR_PTR(-ENODEV);
653 
654 	if (data->cfg->missing_phys & BIT(args->args[0]))
655 		return ERR_PTR(-ENODEV);
656 
657 	return data->phys[args->args[0]].phy;
658 }
659 
660 static int sun4i_usb_phy_remove(struct platform_device *pdev)
661 {
662 	struct device *dev = &pdev->dev;
663 	struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
664 
665 	if (data->vbus_power_nb_registered)
666 		power_supply_unreg_notifier(&data->vbus_power_nb);
667 	if (data->id_det_irq > 0)
668 		devm_free_irq(dev, data->id_det_irq, data);
669 	if (data->vbus_det_irq > 0)
670 		devm_free_irq(dev, data->vbus_det_irq, data);
671 
672 	cancel_delayed_work_sync(&data->detect);
673 
674 	return 0;
675 }
676 
677 static const unsigned int sun4i_usb_phy0_cable[] = {
678 	EXTCON_USB,
679 	EXTCON_USB_HOST,
680 	EXTCON_NONE,
681 };
682 
683 static int sun4i_usb_phy_probe(struct platform_device *pdev)
684 {
685 	struct sun4i_usb_phy_data *data;
686 	struct device *dev = &pdev->dev;
687 	struct device_node *np = dev->of_node;
688 	struct phy_provider *phy_provider;
689 	int i, ret;
690 
691 	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
692 	if (!data)
693 		return -ENOMEM;
694 
695 	spin_lock_init(&data->reg_lock);
696 	INIT_DELAYED_WORK(&data->detect, sun4i_usb_phy0_id_vbus_det_scan);
697 	dev_set_drvdata(dev, data);
698 	data->cfg = of_device_get_match_data(dev);
699 	if (!data->cfg)
700 		return -EINVAL;
701 
702 	data->base = devm_platform_ioremap_resource_byname(pdev, "phy_ctrl");
703 	if (IS_ERR(data->base))
704 		return PTR_ERR(data->base);
705 
706 	data->id_det_gpio = devm_gpiod_get_optional(dev, "usb0_id_det",
707 						    GPIOD_IN);
708 	if (IS_ERR(data->id_det_gpio)) {
709 		dev_err(dev, "Couldn't request ID GPIO\n");
710 		return PTR_ERR(data->id_det_gpio);
711 	}
712 
713 	data->vbus_det_gpio = devm_gpiod_get_optional(dev, "usb0_vbus_det",
714 						      GPIOD_IN);
715 	if (IS_ERR(data->vbus_det_gpio)) {
716 		dev_err(dev, "Couldn't request VBUS detect GPIO\n");
717 		return PTR_ERR(data->vbus_det_gpio);
718 	}
719 
720 	if (of_find_property(np, "usb0_vbus_power-supply", NULL)) {
721 		data->vbus_power_supply = devm_power_supply_get_by_phandle(dev,
722 						     "usb0_vbus_power-supply");
723 		if (IS_ERR(data->vbus_power_supply)) {
724 			dev_err(dev, "Couldn't get the VBUS power supply\n");
725 			return PTR_ERR(data->vbus_power_supply);
726 		}
727 
728 		if (!data->vbus_power_supply)
729 			return -EPROBE_DEFER;
730 	}
731 
732 	data->dr_mode = of_usb_get_dr_mode_by_phy(np, 0);
733 
734 	data->extcon = devm_extcon_dev_allocate(dev, sun4i_usb_phy0_cable);
735 	if (IS_ERR(data->extcon)) {
736 		dev_err(dev, "Couldn't allocate our extcon device\n");
737 		return PTR_ERR(data->extcon);
738 	}
739 
740 	ret = devm_extcon_dev_register(dev, data->extcon);
741 	if (ret) {
742 		dev_err(dev, "failed to register extcon: %d\n", ret);
743 		return ret;
744 	}
745 
746 	for (i = 0; i < data->cfg->num_phys; i++) {
747 		struct sun4i_usb_phy *phy = data->phys + i;
748 		char name[16];
749 
750 		if (data->cfg->missing_phys & BIT(i))
751 			continue;
752 
753 		snprintf(name, sizeof(name), "usb%d_vbus", i);
754 		phy->vbus = devm_regulator_get_optional(dev, name);
755 		if (IS_ERR(phy->vbus)) {
756 			if (PTR_ERR(phy->vbus) == -EPROBE_DEFER) {
757 				dev_err(dev,
758 					"Couldn't get regulator %s... Deferring probe\n",
759 					name);
760 				return -EPROBE_DEFER;
761 			}
762 
763 			phy->vbus = NULL;
764 		}
765 
766 		if (data->cfg->dedicated_clocks)
767 			snprintf(name, sizeof(name), "usb%d_phy", i);
768 		else
769 			strlcpy(name, "usb_phy", sizeof(name));
770 
771 		phy->clk = devm_clk_get(dev, name);
772 		if (IS_ERR(phy->clk)) {
773 			dev_err(dev, "failed to get clock %s\n", name);
774 			return PTR_ERR(phy->clk);
775 		}
776 
777 		/* The first PHY is always tied to OTG, and never HSIC */
778 		if (data->cfg->hsic_index && i == data->cfg->hsic_index) {
779 			/* HSIC needs secondary clock */
780 			snprintf(name, sizeof(name), "usb%d_hsic_12M", i);
781 			phy->clk2 = devm_clk_get(dev, name);
782 			if (IS_ERR(phy->clk2)) {
783 				dev_err(dev, "failed to get clock %s\n", name);
784 				return PTR_ERR(phy->clk2);
785 			}
786 		}
787 
788 		snprintf(name, sizeof(name), "usb%d_reset", i);
789 		phy->reset = devm_reset_control_get(dev, name);
790 		if (IS_ERR(phy->reset)) {
791 			dev_err(dev, "failed to get reset %s\n", name);
792 			return PTR_ERR(phy->reset);
793 		}
794 
795 		if (i || data->cfg->phy0_dual_route) { /* No pmu for musb */
796 			snprintf(name, sizeof(name), "pmu%d", i);
797 			phy->pmu = devm_platform_ioremap_resource_byname(pdev, name);
798 			if (IS_ERR(phy->pmu))
799 				return PTR_ERR(phy->pmu);
800 		}
801 
802 		phy->phy = devm_phy_create(dev, NULL, &sun4i_usb_phy_ops);
803 		if (IS_ERR(phy->phy)) {
804 			dev_err(dev, "failed to create PHY %d\n", i);
805 			return PTR_ERR(phy->phy);
806 		}
807 
808 		phy->index = i;
809 		phy_set_drvdata(phy->phy, &data->phys[i]);
810 	}
811 
812 	data->id_det_irq = gpiod_to_irq(data->id_det_gpio);
813 	if (data->id_det_irq > 0) {
814 		ret = devm_request_irq(dev, data->id_det_irq,
815 				sun4i_usb_phy0_id_vbus_det_irq,
816 				IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
817 				"usb0-id-det", data);
818 		if (ret) {
819 			dev_err(dev, "Err requesting id-det-irq: %d\n", ret);
820 			return ret;
821 		}
822 	}
823 
824 	data->vbus_det_irq = gpiod_to_irq(data->vbus_det_gpio);
825 	if (data->vbus_det_irq > 0) {
826 		ret = devm_request_irq(dev, data->vbus_det_irq,
827 				sun4i_usb_phy0_id_vbus_det_irq,
828 				IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
829 				"usb0-vbus-det", data);
830 		if (ret) {
831 			dev_err(dev, "Err requesting vbus-det-irq: %d\n", ret);
832 			data->vbus_det_irq = -1;
833 			sun4i_usb_phy_remove(pdev); /* Stop detect work */
834 			return ret;
835 		}
836 	}
837 
838 	if (data->vbus_power_supply) {
839 		data->vbus_power_nb.notifier_call = sun4i_usb_phy0_vbus_notify;
840 		data->vbus_power_nb.priority = 0;
841 		ret = power_supply_reg_notifier(&data->vbus_power_nb);
842 		if (ret) {
843 			sun4i_usb_phy_remove(pdev); /* Stop detect work */
844 			return ret;
845 		}
846 		data->vbus_power_nb_registered = true;
847 	}
848 
849 	phy_provider = devm_of_phy_provider_register(dev, sun4i_usb_phy_xlate);
850 	if (IS_ERR(phy_provider)) {
851 		sun4i_usb_phy_remove(pdev); /* Stop detect work */
852 		return PTR_ERR(phy_provider);
853 	}
854 
855 	dev_dbg(dev, "successfully loaded\n");
856 
857 	return 0;
858 }
859 
860 static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = {
861 	.num_phys = 3,
862 	.type = sun4i_a10_phy,
863 	.disc_thresh = 3,
864 	.phyctl_offset = REG_PHYCTL_A10,
865 	.dedicated_clocks = false,
866 	.enable_pmu_unk1 = false,
867 };
868 
869 static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = {
870 	.num_phys = 2,
871 	.type = sun4i_a10_phy,
872 	.disc_thresh = 2,
873 	.phyctl_offset = REG_PHYCTL_A10,
874 	.dedicated_clocks = false,
875 	.enable_pmu_unk1 = false,
876 };
877 
878 static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = {
879 	.num_phys = 3,
880 	.type = sun6i_a31_phy,
881 	.disc_thresh = 3,
882 	.phyctl_offset = REG_PHYCTL_A10,
883 	.dedicated_clocks = true,
884 	.enable_pmu_unk1 = false,
885 };
886 
887 static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = {
888 	.num_phys = 3,
889 	.type = sun4i_a10_phy,
890 	.disc_thresh = 2,
891 	.phyctl_offset = REG_PHYCTL_A10,
892 	.dedicated_clocks = false,
893 	.enable_pmu_unk1 = false,
894 };
895 
896 static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = {
897 	.num_phys = 2,
898 	.type = sun6i_a31_phy,
899 	.disc_thresh = 3,
900 	.phyctl_offset = REG_PHYCTL_A10,
901 	.dedicated_clocks = true,
902 	.enable_pmu_unk1 = false,
903 };
904 
905 static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = {
906 	.num_phys = 2,
907 	.type = sun8i_a33_phy,
908 	.disc_thresh = 3,
909 	.phyctl_offset = REG_PHYCTL_A33,
910 	.dedicated_clocks = true,
911 	.enable_pmu_unk1 = false,
912 };
913 
914 static const struct sun4i_usb_phy_cfg sun8i_a83t_cfg = {
915 	.num_phys = 3,
916 	.hsic_index = 2,
917 	.type = sun8i_a83t_phy,
918 	.phyctl_offset = REG_PHYCTL_A33,
919 	.dedicated_clocks = true,
920 };
921 
922 static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
923 	.num_phys = 4,
924 	.type = sun8i_h3_phy,
925 	.disc_thresh = 3,
926 	.phyctl_offset = REG_PHYCTL_A33,
927 	.dedicated_clocks = true,
928 	.enable_pmu_unk1 = true,
929 	.phy0_dual_route = true,
930 };
931 
932 static const struct sun4i_usb_phy_cfg sun8i_r40_cfg = {
933 	.num_phys = 3,
934 	.type = sun8i_r40_phy,
935 	.disc_thresh = 3,
936 	.phyctl_offset = REG_PHYCTL_A33,
937 	.dedicated_clocks = true,
938 	.enable_pmu_unk1 = true,
939 	.phy0_dual_route = true,
940 };
941 
942 static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
943 	.num_phys = 1,
944 	.type = sun8i_v3s_phy,
945 	.disc_thresh = 3,
946 	.phyctl_offset = REG_PHYCTL_A33,
947 	.dedicated_clocks = true,
948 	.enable_pmu_unk1 = true,
949 	.phy0_dual_route = true,
950 };
951 
952 static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {
953 	.num_phys = 2,
954 	.type = sun50i_a64_phy,
955 	.disc_thresh = 3,
956 	.phyctl_offset = REG_PHYCTL_A33,
957 	.dedicated_clocks = true,
958 	.enable_pmu_unk1 = true,
959 	.phy0_dual_route = true,
960 };
961 
962 static const struct sun4i_usb_phy_cfg sun50i_h6_cfg = {
963 	.num_phys = 4,
964 	.type = sun50i_h6_phy,
965 	.disc_thresh = 3,
966 	.phyctl_offset = REG_PHYCTL_A33,
967 	.dedicated_clocks = true,
968 	.phy0_dual_route = true,
969 	.missing_phys = BIT(1) | BIT(2),
970 };
971 
972 static const struct of_device_id sun4i_usb_phy_of_match[] = {
973 	{ .compatible = "allwinner,sun4i-a10-usb-phy", .data = &sun4i_a10_cfg },
974 	{ .compatible = "allwinner,sun5i-a13-usb-phy", .data = &sun5i_a13_cfg },
975 	{ .compatible = "allwinner,sun6i-a31-usb-phy", .data = &sun6i_a31_cfg },
976 	{ .compatible = "allwinner,sun7i-a20-usb-phy", .data = &sun7i_a20_cfg },
977 	{ .compatible = "allwinner,sun8i-a23-usb-phy", .data = &sun8i_a23_cfg },
978 	{ .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg },
979 	{ .compatible = "allwinner,sun8i-a83t-usb-phy", .data = &sun8i_a83t_cfg },
980 	{ .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg },
981 	{ .compatible = "allwinner,sun8i-r40-usb-phy", .data = &sun8i_r40_cfg },
982 	{ .compatible = "allwinner,sun8i-v3s-usb-phy", .data = &sun8i_v3s_cfg },
983 	{ .compatible = "allwinner,sun50i-a64-usb-phy",
984 	  .data = &sun50i_a64_cfg},
985 	{ .compatible = "allwinner,sun50i-h6-usb-phy", .data = &sun50i_h6_cfg },
986 	{ },
987 };
988 MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);
989 
990 static struct platform_driver sun4i_usb_phy_driver = {
991 	.probe	= sun4i_usb_phy_probe,
992 	.remove	= sun4i_usb_phy_remove,
993 	.driver = {
994 		.of_match_table	= sun4i_usb_phy_of_match,
995 		.name  = "sun4i-usb-phy",
996 	}
997 };
998 module_platform_driver(sun4i_usb_phy_driver);
999 
1000 MODULE_DESCRIPTION("Allwinner sun4i USB phy driver");
1001 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
1002 MODULE_LICENSE("GPL v2");
1003