1 /*
2  * Allwinner sun4i USB phy driver
3  *
4  * Copyright (C) 2014-2015 Hans de Goede <hdegoede@redhat.com>
5  *
6  * Based on code from
7  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
8  *
9  * Modelled after: Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver
10  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
11  * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License as published by
15  * the Free Software Foundation; either version 2 of the License, or
16  * (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21  * GNU General Public License for more details.
22  */
23 
24 #include <linux/clk.h>
25 #include <linux/delay.h>
26 #include <linux/err.h>
27 #include <linux/extcon.h>
28 #include <linux/io.h>
29 #include <linux/interrupt.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/mutex.h>
33 #include <linux/of.h>
34 #include <linux/of_address.h>
35 #include <linux/of_device.h>
36 #include <linux/of_gpio.h>
37 #include <linux/phy/phy.h>
38 #include <linux/phy/phy-sun4i-usb.h>
39 #include <linux/platform_device.h>
40 #include <linux/power_supply.h>
41 #include <linux/regulator/consumer.h>
42 #include <linux/reset.h>
43 #include <linux/spinlock.h>
44 #include <linux/usb/of.h>
45 #include <linux/workqueue.h>
46 
47 #define REG_ISCR			0x00
48 #define REG_PHYCTL_A10			0x04
49 #define REG_PHYBIST			0x08
50 #define REG_PHYTUNE			0x0c
51 #define REG_PHYCTL_A33			0x10
52 #define REG_PHY_OTGCTL			0x20
53 
54 #define REG_PMU_UNK1			0x10
55 
56 #define PHYCTL_DATA			BIT(7)
57 
58 #define OTGCTL_ROUTE_MUSB		BIT(0)
59 
60 #define SUNXI_AHB_ICHR8_EN		BIT(10)
61 #define SUNXI_AHB_INCR4_BURST_EN	BIT(9)
62 #define SUNXI_AHB_INCRX_ALIGN_EN	BIT(8)
63 #define SUNXI_ULPI_BYPASS_EN		BIT(0)
64 
65 /* ISCR, Interface Status and Control bits */
66 #define ISCR_ID_PULLUP_EN		(1 << 17)
67 #define ISCR_DPDM_PULLUP_EN	(1 << 16)
68 /* sunxi has the phy id/vbus pins not connected, so we use the force bits */
69 #define ISCR_FORCE_ID_MASK	(3 << 14)
70 #define ISCR_FORCE_ID_LOW		(2 << 14)
71 #define ISCR_FORCE_ID_HIGH	(3 << 14)
72 #define ISCR_FORCE_VBUS_MASK	(3 << 12)
73 #define ISCR_FORCE_VBUS_LOW	(2 << 12)
74 #define ISCR_FORCE_VBUS_HIGH	(3 << 12)
75 
76 /* Common Control Bits for Both PHYs */
77 #define PHY_PLL_BW			0x03
78 #define PHY_RES45_CAL_EN		0x0c
79 
80 /* Private Control Bits for Each PHY */
81 #define PHY_TX_AMPLITUDE_TUNE		0x20
82 #define PHY_TX_SLEWRATE_TUNE		0x22
83 #define PHY_VBUSVALID_TH_SEL		0x25
84 #define PHY_PULLUP_RES_SEL		0x27
85 #define PHY_OTG_FUNC_EN			0x28
86 #define PHY_VBUS_DET_EN			0x29
87 #define PHY_DISCON_TH_SEL		0x2a
88 #define PHY_SQUELCH_DETECT		0x3c
89 
90 /* A83T specific control bits for PHY0 */
91 #define PHY_CTL_VBUSVLDEXT		BIT(5)
92 #define PHY_CTL_SIDDQ			BIT(3)
93 
94 /* A83T specific control bits for PHY2 HSIC */
95 #define SUNXI_EHCI_HS_FORCE		BIT(20)
96 #define SUNXI_HSIC_CONNECT_DET		BIT(17)
97 #define SUNXI_HSIC_CONNECT_INT		BIT(16)
98 #define SUNXI_HSIC			BIT(1)
99 
100 #define MAX_PHYS			4
101 
102 /*
103  * Note do not raise the debounce time, we must report Vusb high within 100ms
104  * otherwise we get Vbus errors
105  */
106 #define DEBOUNCE_TIME			msecs_to_jiffies(50)
107 #define POLL_TIME			msecs_to_jiffies(250)
108 
109 enum sun4i_usb_phy_type {
110 	sun4i_a10_phy,
111 	sun6i_a31_phy,
112 	sun8i_a33_phy,
113 	sun8i_a83t_phy,
114 	sun8i_h3_phy,
115 	sun8i_v3s_phy,
116 	sun50i_a64_phy,
117 };
118 
119 struct sun4i_usb_phy_cfg {
120 	int num_phys;
121 	int hsic_index;
122 	enum sun4i_usb_phy_type type;
123 	u32 disc_thresh;
124 	u8 phyctl_offset;
125 	bool dedicated_clocks;
126 	bool enable_pmu_unk1;
127 	bool phy0_dual_route;
128 };
129 
130 struct sun4i_usb_phy_data {
131 	void __iomem *base;
132 	const struct sun4i_usb_phy_cfg *cfg;
133 	enum usb_dr_mode dr_mode;
134 	spinlock_t reg_lock; /* guard access to phyctl reg */
135 	struct sun4i_usb_phy {
136 		struct phy *phy;
137 		void __iomem *pmu;
138 		struct regulator *vbus;
139 		struct reset_control *reset;
140 		struct clk *clk;
141 		struct clk *clk2;
142 		bool regulator_on;
143 		int index;
144 	} phys[MAX_PHYS];
145 	/* phy0 / otg related variables */
146 	struct extcon_dev *extcon;
147 	bool phy0_init;
148 	struct gpio_desc *id_det_gpio;
149 	struct gpio_desc *vbus_det_gpio;
150 	struct power_supply *vbus_power_supply;
151 	struct notifier_block vbus_power_nb;
152 	bool vbus_power_nb_registered;
153 	bool force_session_end;
154 	int id_det_irq;
155 	int vbus_det_irq;
156 	int id_det;
157 	int vbus_det;
158 	struct delayed_work detect;
159 };
160 
161 #define to_sun4i_usb_phy_data(phy) \
162 	container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index])
163 
164 static void sun4i_usb_phy0_update_iscr(struct phy *_phy, u32 clr, u32 set)
165 {
166 	struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
167 	struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
168 	u32 iscr;
169 
170 	iscr = readl(data->base + REG_ISCR);
171 	iscr &= ~clr;
172 	iscr |= set;
173 	writel(iscr, data->base + REG_ISCR);
174 }
175 
176 static void sun4i_usb_phy0_set_id_detect(struct phy *phy, u32 val)
177 {
178 	if (val)
179 		val = ISCR_FORCE_ID_HIGH;
180 	else
181 		val = ISCR_FORCE_ID_LOW;
182 
183 	sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_ID_MASK, val);
184 }
185 
186 static void sun4i_usb_phy0_set_vbus_detect(struct phy *phy, u32 val)
187 {
188 	if (val)
189 		val = ISCR_FORCE_VBUS_HIGH;
190 	else
191 		val = ISCR_FORCE_VBUS_LOW;
192 
193 	sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_VBUS_MASK, val);
194 }
195 
196 static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
197 				int len)
198 {
199 	struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
200 	u32 temp, usbc_bit = BIT(phy->index * 2);
201 	void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset;
202 	unsigned long flags;
203 	int i;
204 
205 	spin_lock_irqsave(&phy_data->reg_lock, flags);
206 
207 	if (phy_data->cfg->phyctl_offset == REG_PHYCTL_A33) {
208 		/* SoCs newer than A33 need us to set phyctl to 0 explicitly */
209 		writel(0, phyctl);
210 	}
211 
212 	for (i = 0; i < len; i++) {
213 		temp = readl(phyctl);
214 
215 		/* clear the address portion */
216 		temp &= ~(0xff << 8);
217 
218 		/* set the address */
219 		temp |= ((addr + i) << 8);
220 		writel(temp, phyctl);
221 
222 		/* set the data bit and clear usbc bit*/
223 		temp = readb(phyctl);
224 		if (data & 0x1)
225 			temp |= PHYCTL_DATA;
226 		else
227 			temp &= ~PHYCTL_DATA;
228 		temp &= ~usbc_bit;
229 		writeb(temp, phyctl);
230 
231 		/* pulse usbc_bit */
232 		temp = readb(phyctl);
233 		temp |= usbc_bit;
234 		writeb(temp, phyctl);
235 
236 		temp = readb(phyctl);
237 		temp &= ~usbc_bit;
238 		writeb(temp, phyctl);
239 
240 		data >>= 1;
241 	}
242 
243 	spin_unlock_irqrestore(&phy_data->reg_lock, flags);
244 }
245 
246 static void sun4i_usb_phy_passby(struct sun4i_usb_phy *phy, int enable)
247 {
248 	struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
249 	u32 bits, reg_value;
250 
251 	if (!phy->pmu)
252 		return;
253 
254 	bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN |
255 		SUNXI_AHB_INCRX_ALIGN_EN | SUNXI_ULPI_BYPASS_EN;
256 
257 	/* A83T USB2 is HSIC */
258 	if (phy_data->cfg->type == sun8i_a83t_phy && phy->index == 2)
259 		bits |= SUNXI_EHCI_HS_FORCE | SUNXI_HSIC_CONNECT_INT |
260 			SUNXI_HSIC;
261 
262 	reg_value = readl(phy->pmu);
263 
264 	if (enable)
265 		reg_value |= bits;
266 	else
267 		reg_value &= ~bits;
268 
269 	writel(reg_value, phy->pmu);
270 }
271 
272 static int sun4i_usb_phy_init(struct phy *_phy)
273 {
274 	struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
275 	struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
276 	int ret;
277 	u32 val;
278 
279 	ret = clk_prepare_enable(phy->clk);
280 	if (ret)
281 		return ret;
282 
283 	ret = clk_prepare_enable(phy->clk2);
284 	if (ret) {
285 		clk_disable_unprepare(phy->clk);
286 		return ret;
287 	}
288 
289 	ret = reset_control_deassert(phy->reset);
290 	if (ret) {
291 		clk_disable_unprepare(phy->clk2);
292 		clk_disable_unprepare(phy->clk);
293 		return ret;
294 	}
295 
296 	if (data->cfg->type == sun8i_a83t_phy) {
297 		if (phy->index == 0) {
298 			val = readl(data->base + data->cfg->phyctl_offset);
299 			val |= PHY_CTL_VBUSVLDEXT;
300 			val &= ~PHY_CTL_SIDDQ;
301 			writel(val, data->base + data->cfg->phyctl_offset);
302 		}
303 	} else {
304 		if (phy->pmu && data->cfg->enable_pmu_unk1) {
305 			val = readl(phy->pmu + REG_PMU_UNK1);
306 			writel(val & ~2, phy->pmu + REG_PMU_UNK1);
307 		}
308 
309 		/* Enable USB 45 Ohm resistor calibration */
310 		if (phy->index == 0)
311 			sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, 0x01, 1);
312 
313 		/* Adjust PHY's magnitude and rate */
314 		sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5);
315 
316 		/* Disconnect threshold adjustment */
317 		sun4i_usb_phy_write(phy, PHY_DISCON_TH_SEL,
318 				    data->cfg->disc_thresh, 2);
319 	}
320 
321 	sun4i_usb_phy_passby(phy, 1);
322 
323 	if (phy->index == 0) {
324 		data->phy0_init = true;
325 
326 		/* Enable pull-ups */
327 		sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_DPDM_PULLUP_EN);
328 		sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_ID_PULLUP_EN);
329 
330 		/* Force ISCR and cable state updates */
331 		data->id_det = -1;
332 		data->vbus_det = -1;
333 		queue_delayed_work(system_wq, &data->detect, 0);
334 	}
335 
336 	return 0;
337 }
338 
339 static int sun4i_usb_phy_exit(struct phy *_phy)
340 {
341 	struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
342 	struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
343 
344 	if (phy->index == 0) {
345 		if (data->cfg->type == sun8i_a83t_phy) {
346 			void __iomem *phyctl = data->base +
347 				data->cfg->phyctl_offset;
348 
349 			writel(readl(phyctl) | PHY_CTL_SIDDQ, phyctl);
350 		}
351 
352 		/* Disable pull-ups */
353 		sun4i_usb_phy0_update_iscr(_phy, ISCR_DPDM_PULLUP_EN, 0);
354 		sun4i_usb_phy0_update_iscr(_phy, ISCR_ID_PULLUP_EN, 0);
355 		data->phy0_init = false;
356 	}
357 
358 	sun4i_usb_phy_passby(phy, 0);
359 	reset_control_assert(phy->reset);
360 	clk_disable_unprepare(phy->clk2);
361 	clk_disable_unprepare(phy->clk);
362 
363 	return 0;
364 }
365 
366 static int sun4i_usb_phy0_get_id_det(struct sun4i_usb_phy_data *data)
367 {
368 	switch (data->dr_mode) {
369 	case USB_DR_MODE_OTG:
370 		if (data->id_det_gpio)
371 			return gpiod_get_value_cansleep(data->id_det_gpio);
372 		else
373 			return 1; /* Fallback to peripheral mode */
374 	case USB_DR_MODE_HOST:
375 		return 0;
376 	case USB_DR_MODE_PERIPHERAL:
377 	default:
378 		return 1;
379 	}
380 }
381 
382 static int sun4i_usb_phy0_get_vbus_det(struct sun4i_usb_phy_data *data)
383 {
384 	if (data->vbus_det_gpio)
385 		return gpiod_get_value_cansleep(data->vbus_det_gpio);
386 
387 	if (data->vbus_power_supply) {
388 		union power_supply_propval val;
389 		int r;
390 
391 		r = power_supply_get_property(data->vbus_power_supply,
392 					      POWER_SUPPLY_PROP_PRESENT, &val);
393 		if (r == 0)
394 			return val.intval;
395 	}
396 
397 	/* Fallback: report vbus as high */
398 	return 1;
399 }
400 
401 static bool sun4i_usb_phy0_have_vbus_det(struct sun4i_usb_phy_data *data)
402 {
403 	return data->vbus_det_gpio || data->vbus_power_supply;
404 }
405 
406 static bool sun4i_usb_phy0_poll(struct sun4i_usb_phy_data *data)
407 {
408 	if ((data->id_det_gpio && data->id_det_irq <= 0) ||
409 	    (data->vbus_det_gpio && data->vbus_det_irq <= 0))
410 		return true;
411 
412 	/*
413 	 * The A31 companion pmic (axp221) does not generate vbus change
414 	 * interrupts when the board is driving vbus, so we must poll
415 	 * when using the pmic for vbus-det _and_ we're driving vbus.
416 	 */
417 	if (data->cfg->type == sun6i_a31_phy &&
418 	    data->vbus_power_supply && data->phys[0].regulator_on)
419 		return true;
420 
421 	return false;
422 }
423 
424 static int sun4i_usb_phy_power_on(struct phy *_phy)
425 {
426 	struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
427 	struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
428 	int ret;
429 
430 	if (!phy->vbus || phy->regulator_on)
431 		return 0;
432 
433 	/* For phy0 only turn on Vbus if we don't have an ext. Vbus */
434 	if (phy->index == 0 && sun4i_usb_phy0_have_vbus_det(data) &&
435 				data->vbus_det) {
436 		dev_warn(&_phy->dev, "External vbus detected, not enabling our own vbus\n");
437 		return 0;
438 	}
439 
440 	ret = regulator_enable(phy->vbus);
441 	if (ret)
442 		return ret;
443 
444 	phy->regulator_on = true;
445 
446 	/* We must report Vbus high within OTG_TIME_A_WAIT_VRISE msec. */
447 	if (phy->index == 0 && sun4i_usb_phy0_poll(data))
448 		mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
449 
450 	return 0;
451 }
452 
453 static int sun4i_usb_phy_power_off(struct phy *_phy)
454 {
455 	struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
456 	struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
457 
458 	if (!phy->vbus || !phy->regulator_on)
459 		return 0;
460 
461 	regulator_disable(phy->vbus);
462 	phy->regulator_on = false;
463 
464 	/*
465 	 * phy0 vbus typically slowly discharges, sometimes this causes the
466 	 * Vbus gpio to not trigger an edge irq on Vbus off, so force a rescan.
467 	 */
468 	if (phy->index == 0 && !sun4i_usb_phy0_poll(data))
469 		mod_delayed_work(system_wq, &data->detect, POLL_TIME);
470 
471 	return 0;
472 }
473 
474 static int sun4i_usb_phy_set_mode(struct phy *_phy, enum phy_mode mode)
475 {
476 	struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
477 	struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
478 	int new_mode;
479 
480 	if (phy->index != 0)
481 		return -EINVAL;
482 
483 	switch (mode) {
484 	case PHY_MODE_USB_HOST:
485 		new_mode = USB_DR_MODE_HOST;
486 		break;
487 	case PHY_MODE_USB_DEVICE:
488 		new_mode = USB_DR_MODE_PERIPHERAL;
489 		break;
490 	case PHY_MODE_USB_OTG:
491 		new_mode = USB_DR_MODE_OTG;
492 		break;
493 	default:
494 		return -EINVAL;
495 	}
496 
497 	if (new_mode != data->dr_mode) {
498 		dev_info(&_phy->dev, "Changing dr_mode to %d\n", new_mode);
499 		data->dr_mode = new_mode;
500 	}
501 
502 	data->id_det = -1; /* Force reprocessing of id */
503 	data->force_session_end = true;
504 	queue_delayed_work(system_wq, &data->detect, 0);
505 
506 	return 0;
507 }
508 
509 void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled)
510 {
511 	struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
512 
513 	sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2);
514 }
515 EXPORT_SYMBOL_GPL(sun4i_usb_phy_set_squelch_detect);
516 
517 static const struct phy_ops sun4i_usb_phy_ops = {
518 	.init		= sun4i_usb_phy_init,
519 	.exit		= sun4i_usb_phy_exit,
520 	.power_on	= sun4i_usb_phy_power_on,
521 	.power_off	= sun4i_usb_phy_power_off,
522 	.set_mode	= sun4i_usb_phy_set_mode,
523 	.owner		= THIS_MODULE,
524 };
525 
526 static void sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data *data, int id_det)
527 {
528 	u32 regval;
529 
530 	regval = readl(data->base + REG_PHY_OTGCTL);
531 	if (id_det == 0) {
532 		/* Host mode. Route phy0 to EHCI/OHCI */
533 		regval &= ~OTGCTL_ROUTE_MUSB;
534 	} else {
535 		/* Peripheral mode. Route phy0 to MUSB */
536 		regval |= OTGCTL_ROUTE_MUSB;
537 	}
538 	writel(regval, data->base + REG_PHY_OTGCTL);
539 }
540 
541 static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work)
542 {
543 	struct sun4i_usb_phy_data *data =
544 		container_of(work, struct sun4i_usb_phy_data, detect.work);
545 	struct phy *phy0 = data->phys[0].phy;
546 	bool force_session_end, id_notify = false, vbus_notify = false;
547 	int id_det, vbus_det;
548 
549 	if (phy0 == NULL)
550 		return;
551 
552 	id_det = sun4i_usb_phy0_get_id_det(data);
553 	vbus_det = sun4i_usb_phy0_get_vbus_det(data);
554 
555 	mutex_lock(&phy0->mutex);
556 
557 	if (!data->phy0_init) {
558 		mutex_unlock(&phy0->mutex);
559 		return;
560 	}
561 
562 	force_session_end = data->force_session_end;
563 	data->force_session_end = false;
564 
565 	if (id_det != data->id_det) {
566 		/* id-change, force session end if we've no vbus detection */
567 		if (data->dr_mode == USB_DR_MODE_OTG &&
568 		    !sun4i_usb_phy0_have_vbus_det(data))
569 			force_session_end = true;
570 
571 		/* When entering host mode (id = 0) force end the session now */
572 		if (force_session_end && id_det == 0) {
573 			sun4i_usb_phy0_set_vbus_detect(phy0, 0);
574 			msleep(200);
575 			sun4i_usb_phy0_set_vbus_detect(phy0, 1);
576 		}
577 		sun4i_usb_phy0_set_id_detect(phy0, id_det);
578 		data->id_det = id_det;
579 		id_notify = true;
580 	}
581 
582 	if (vbus_det != data->vbus_det) {
583 		sun4i_usb_phy0_set_vbus_detect(phy0, vbus_det);
584 		data->vbus_det = vbus_det;
585 		vbus_notify = true;
586 	}
587 
588 	mutex_unlock(&phy0->mutex);
589 
590 	if (id_notify) {
591 		extcon_set_state_sync(data->extcon, EXTCON_USB_HOST,
592 					!id_det);
593 		/* When leaving host mode force end the session here */
594 		if (force_session_end && id_det == 1) {
595 			mutex_lock(&phy0->mutex);
596 			sun4i_usb_phy0_set_vbus_detect(phy0, 0);
597 			msleep(1000);
598 			sun4i_usb_phy0_set_vbus_detect(phy0, 1);
599 			mutex_unlock(&phy0->mutex);
600 		}
601 
602 		/* Re-route PHY0 if necessary */
603 		if (data->cfg->phy0_dual_route)
604 			sun4i_usb_phy0_reroute(data, id_det);
605 	}
606 
607 	if (vbus_notify)
608 		extcon_set_state_sync(data->extcon, EXTCON_USB, vbus_det);
609 
610 	if (sun4i_usb_phy0_poll(data))
611 		queue_delayed_work(system_wq, &data->detect, POLL_TIME);
612 }
613 
614 static irqreturn_t sun4i_usb_phy0_id_vbus_det_irq(int irq, void *dev_id)
615 {
616 	struct sun4i_usb_phy_data *data = dev_id;
617 
618 	/* vbus or id changed, let the pins settle and then scan them */
619 	mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
620 
621 	return IRQ_HANDLED;
622 }
623 
624 static int sun4i_usb_phy0_vbus_notify(struct notifier_block *nb,
625 				      unsigned long val, void *v)
626 {
627 	struct sun4i_usb_phy_data *data =
628 		container_of(nb, struct sun4i_usb_phy_data, vbus_power_nb);
629 	struct power_supply *psy = v;
630 
631 	/* Properties on the vbus_power_supply changed, scan vbus_det */
632 	if (val == PSY_EVENT_PROP_CHANGED && psy == data->vbus_power_supply)
633 		mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
634 
635 	return NOTIFY_OK;
636 }
637 
638 static struct phy *sun4i_usb_phy_xlate(struct device *dev,
639 					struct of_phandle_args *args)
640 {
641 	struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
642 
643 	if (args->args[0] >= data->cfg->num_phys)
644 		return ERR_PTR(-ENODEV);
645 
646 	return data->phys[args->args[0]].phy;
647 }
648 
649 static int sun4i_usb_phy_remove(struct platform_device *pdev)
650 {
651 	struct device *dev = &pdev->dev;
652 	struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
653 
654 	if (data->vbus_power_nb_registered)
655 		power_supply_unreg_notifier(&data->vbus_power_nb);
656 	if (data->id_det_irq > 0)
657 		devm_free_irq(dev, data->id_det_irq, data);
658 	if (data->vbus_det_irq > 0)
659 		devm_free_irq(dev, data->vbus_det_irq, data);
660 
661 	cancel_delayed_work_sync(&data->detect);
662 
663 	return 0;
664 }
665 
666 static const unsigned int sun4i_usb_phy0_cable[] = {
667 	EXTCON_USB,
668 	EXTCON_USB_HOST,
669 	EXTCON_NONE,
670 };
671 
672 static int sun4i_usb_phy_probe(struct platform_device *pdev)
673 {
674 	struct sun4i_usb_phy_data *data;
675 	struct device *dev = &pdev->dev;
676 	struct device_node *np = dev->of_node;
677 	struct phy_provider *phy_provider;
678 	struct resource *res;
679 	int i, ret;
680 
681 	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
682 	if (!data)
683 		return -ENOMEM;
684 
685 	spin_lock_init(&data->reg_lock);
686 	INIT_DELAYED_WORK(&data->detect, sun4i_usb_phy0_id_vbus_det_scan);
687 	dev_set_drvdata(dev, data);
688 	data->cfg = of_device_get_match_data(dev);
689 	if (!data->cfg)
690 		return -EINVAL;
691 
692 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_ctrl");
693 	data->base = devm_ioremap_resource(dev, res);
694 	if (IS_ERR(data->base))
695 		return PTR_ERR(data->base);
696 
697 	data->id_det_gpio = devm_gpiod_get_optional(dev, "usb0_id_det",
698 						    GPIOD_IN);
699 	if (IS_ERR(data->id_det_gpio)) {
700 		dev_err(dev, "Couldn't request ID GPIO\n");
701 		return PTR_ERR(data->id_det_gpio);
702 	}
703 
704 	data->vbus_det_gpio = devm_gpiod_get_optional(dev, "usb0_vbus_det",
705 						      GPIOD_IN);
706 	if (IS_ERR(data->vbus_det_gpio)) {
707 		dev_err(dev, "Couldn't request VBUS detect GPIO\n");
708 		return PTR_ERR(data->vbus_det_gpio);
709 	}
710 
711 	if (of_find_property(np, "usb0_vbus_power-supply", NULL)) {
712 		data->vbus_power_supply = devm_power_supply_get_by_phandle(dev,
713 						     "usb0_vbus_power-supply");
714 		if (IS_ERR(data->vbus_power_supply)) {
715 			dev_err(dev, "Couldn't get the VBUS power supply\n");
716 			return PTR_ERR(data->vbus_power_supply);
717 		}
718 
719 		if (!data->vbus_power_supply)
720 			return -EPROBE_DEFER;
721 	}
722 
723 	data->dr_mode = of_usb_get_dr_mode_by_phy(np, 0);
724 
725 	data->extcon = devm_extcon_dev_allocate(dev, sun4i_usb_phy0_cable);
726 	if (IS_ERR(data->extcon)) {
727 		dev_err(dev, "Couldn't allocate our extcon device\n");
728 		return PTR_ERR(data->extcon);
729 	}
730 
731 	ret = devm_extcon_dev_register(dev, data->extcon);
732 	if (ret) {
733 		dev_err(dev, "failed to register extcon: %d\n", ret);
734 		return ret;
735 	}
736 
737 	for (i = 0; i < data->cfg->num_phys; i++) {
738 		struct sun4i_usb_phy *phy = data->phys + i;
739 		char name[16];
740 
741 		snprintf(name, sizeof(name), "usb%d_vbus", i);
742 		phy->vbus = devm_regulator_get_optional(dev, name);
743 		if (IS_ERR(phy->vbus)) {
744 			if (PTR_ERR(phy->vbus) == -EPROBE_DEFER) {
745 				dev_err(dev,
746 					"Couldn't get regulator %s... Deferring probe\n",
747 					name);
748 				return -EPROBE_DEFER;
749 			}
750 
751 			phy->vbus = NULL;
752 		}
753 
754 		if (data->cfg->dedicated_clocks)
755 			snprintf(name, sizeof(name), "usb%d_phy", i);
756 		else
757 			strlcpy(name, "usb_phy", sizeof(name));
758 
759 		phy->clk = devm_clk_get(dev, name);
760 		if (IS_ERR(phy->clk)) {
761 			dev_err(dev, "failed to get clock %s\n", name);
762 			return PTR_ERR(phy->clk);
763 		}
764 
765 		/* The first PHY is always tied to OTG, and never HSIC */
766 		if (data->cfg->hsic_index && i == data->cfg->hsic_index) {
767 			/* HSIC needs secondary clock */
768 			snprintf(name, sizeof(name), "usb%d_hsic_12M", i);
769 			phy->clk2 = devm_clk_get(dev, name);
770 			if (IS_ERR(phy->clk2)) {
771 				dev_err(dev, "failed to get clock %s\n", name);
772 				return PTR_ERR(phy->clk2);
773 			}
774 		}
775 
776 		snprintf(name, sizeof(name), "usb%d_reset", i);
777 		phy->reset = devm_reset_control_get(dev, name);
778 		if (IS_ERR(phy->reset)) {
779 			dev_err(dev, "failed to get reset %s\n", name);
780 			return PTR_ERR(phy->reset);
781 		}
782 
783 		if (i || data->cfg->phy0_dual_route) { /* No pmu for musb */
784 			snprintf(name, sizeof(name), "pmu%d", i);
785 			res = platform_get_resource_byname(pdev,
786 							IORESOURCE_MEM, name);
787 			phy->pmu = devm_ioremap_resource(dev, res);
788 			if (IS_ERR(phy->pmu))
789 				return PTR_ERR(phy->pmu);
790 		}
791 
792 		phy->phy = devm_phy_create(dev, NULL, &sun4i_usb_phy_ops);
793 		if (IS_ERR(phy->phy)) {
794 			dev_err(dev, "failed to create PHY %d\n", i);
795 			return PTR_ERR(phy->phy);
796 		}
797 
798 		phy->index = i;
799 		phy_set_drvdata(phy->phy, &data->phys[i]);
800 	}
801 
802 	data->id_det_irq = gpiod_to_irq(data->id_det_gpio);
803 	if (data->id_det_irq > 0) {
804 		ret = devm_request_irq(dev, data->id_det_irq,
805 				sun4i_usb_phy0_id_vbus_det_irq,
806 				IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
807 				"usb0-id-det", data);
808 		if (ret) {
809 			dev_err(dev, "Err requesting id-det-irq: %d\n", ret);
810 			return ret;
811 		}
812 	}
813 
814 	data->vbus_det_irq = gpiod_to_irq(data->vbus_det_gpio);
815 	if (data->vbus_det_irq > 0) {
816 		ret = devm_request_irq(dev, data->vbus_det_irq,
817 				sun4i_usb_phy0_id_vbus_det_irq,
818 				IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
819 				"usb0-vbus-det", data);
820 		if (ret) {
821 			dev_err(dev, "Err requesting vbus-det-irq: %d\n", ret);
822 			data->vbus_det_irq = -1;
823 			sun4i_usb_phy_remove(pdev); /* Stop detect work */
824 			return ret;
825 		}
826 	}
827 
828 	if (data->vbus_power_supply) {
829 		data->vbus_power_nb.notifier_call = sun4i_usb_phy0_vbus_notify;
830 		data->vbus_power_nb.priority = 0;
831 		ret = power_supply_reg_notifier(&data->vbus_power_nb);
832 		if (ret) {
833 			sun4i_usb_phy_remove(pdev); /* Stop detect work */
834 			return ret;
835 		}
836 		data->vbus_power_nb_registered = true;
837 	}
838 
839 	phy_provider = devm_of_phy_provider_register(dev, sun4i_usb_phy_xlate);
840 	if (IS_ERR(phy_provider)) {
841 		sun4i_usb_phy_remove(pdev); /* Stop detect work */
842 		return PTR_ERR(phy_provider);
843 	}
844 
845 	dev_dbg(dev, "successfully loaded\n");
846 
847 	return 0;
848 }
849 
850 static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = {
851 	.num_phys = 3,
852 	.type = sun4i_a10_phy,
853 	.disc_thresh = 3,
854 	.phyctl_offset = REG_PHYCTL_A10,
855 	.dedicated_clocks = false,
856 	.enable_pmu_unk1 = false,
857 };
858 
859 static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = {
860 	.num_phys = 2,
861 	.type = sun4i_a10_phy,
862 	.disc_thresh = 2,
863 	.phyctl_offset = REG_PHYCTL_A10,
864 	.dedicated_clocks = false,
865 	.enable_pmu_unk1 = false,
866 };
867 
868 static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = {
869 	.num_phys = 3,
870 	.type = sun6i_a31_phy,
871 	.disc_thresh = 3,
872 	.phyctl_offset = REG_PHYCTL_A10,
873 	.dedicated_clocks = true,
874 	.enable_pmu_unk1 = false,
875 };
876 
877 static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = {
878 	.num_phys = 3,
879 	.type = sun4i_a10_phy,
880 	.disc_thresh = 2,
881 	.phyctl_offset = REG_PHYCTL_A10,
882 	.dedicated_clocks = false,
883 	.enable_pmu_unk1 = false,
884 };
885 
886 static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = {
887 	.num_phys = 2,
888 	.type = sun4i_a10_phy,
889 	.disc_thresh = 3,
890 	.phyctl_offset = REG_PHYCTL_A10,
891 	.dedicated_clocks = true,
892 	.enable_pmu_unk1 = false,
893 };
894 
895 static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = {
896 	.num_phys = 2,
897 	.type = sun8i_a33_phy,
898 	.disc_thresh = 3,
899 	.phyctl_offset = REG_PHYCTL_A33,
900 	.dedicated_clocks = true,
901 	.enable_pmu_unk1 = false,
902 };
903 
904 static const struct sun4i_usb_phy_cfg sun8i_a83t_cfg = {
905 	.num_phys = 3,
906 	.hsic_index = 2,
907 	.type = sun8i_a83t_phy,
908 	.phyctl_offset = REG_PHYCTL_A33,
909 	.dedicated_clocks = true,
910 };
911 
912 static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
913 	.num_phys = 4,
914 	.type = sun8i_h3_phy,
915 	.disc_thresh = 3,
916 	.phyctl_offset = REG_PHYCTL_A33,
917 	.dedicated_clocks = true,
918 	.enable_pmu_unk1 = true,
919 	.phy0_dual_route = true,
920 };
921 
922 static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
923 	.num_phys = 1,
924 	.type = sun8i_v3s_phy,
925 	.disc_thresh = 3,
926 	.phyctl_offset = REG_PHYCTL_A33,
927 	.dedicated_clocks = true,
928 	.enable_pmu_unk1 = true,
929 };
930 
931 static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {
932 	.num_phys = 2,
933 	.type = sun50i_a64_phy,
934 	.disc_thresh = 3,
935 	.phyctl_offset = REG_PHYCTL_A33,
936 	.dedicated_clocks = true,
937 	.enable_pmu_unk1 = true,
938 	.phy0_dual_route = true,
939 };
940 
941 static const struct of_device_id sun4i_usb_phy_of_match[] = {
942 	{ .compatible = "allwinner,sun4i-a10-usb-phy", .data = &sun4i_a10_cfg },
943 	{ .compatible = "allwinner,sun5i-a13-usb-phy", .data = &sun5i_a13_cfg },
944 	{ .compatible = "allwinner,sun6i-a31-usb-phy", .data = &sun6i_a31_cfg },
945 	{ .compatible = "allwinner,sun7i-a20-usb-phy", .data = &sun7i_a20_cfg },
946 	{ .compatible = "allwinner,sun8i-a23-usb-phy", .data = &sun8i_a23_cfg },
947 	{ .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg },
948 	{ .compatible = "allwinner,sun8i-a83t-usb-phy", .data = &sun8i_a83t_cfg },
949 	{ .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg },
950 	{ .compatible = "allwinner,sun8i-v3s-usb-phy", .data = &sun8i_v3s_cfg },
951 	{ .compatible = "allwinner,sun50i-a64-usb-phy",
952 	  .data = &sun50i_a64_cfg},
953 	{ },
954 };
955 MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);
956 
957 static struct platform_driver sun4i_usb_phy_driver = {
958 	.probe	= sun4i_usb_phy_probe,
959 	.remove	= sun4i_usb_phy_remove,
960 	.driver = {
961 		.of_match_table	= sun4i_usb_phy_of_match,
962 		.name  = "sun4i-usb-phy",
963 	}
964 };
965 module_platform_driver(sun4i_usb_phy_driver);
966 
967 MODULE_DESCRIPTION("Allwinner sun4i USB phy driver");
968 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
969 MODULE_LICENSE("GPL v2");
970