1 /* 2 * Allwinner sun4i USB phy driver 3 * 4 * Copyright (C) 2014-2015 Hans de Goede <hdegoede@redhat.com> 5 * 6 * Based on code from 7 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 8 * 9 * Modelled after: Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver 10 * Copyright (C) 2013 Samsung Electronics Co., Ltd. 11 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com> 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; either version 2 of the License, or 16 * (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 */ 23 24 #include <linux/clk.h> 25 #include <linux/delay.h> 26 #include <linux/err.h> 27 #include <linux/extcon-provider.h> 28 #include <linux/io.h> 29 #include <linux/interrupt.h> 30 #include <linux/kernel.h> 31 #include <linux/module.h> 32 #include <linux/mutex.h> 33 #include <linux/of.h> 34 #include <linux/of_address.h> 35 #include <linux/of_device.h> 36 #include <linux/of_gpio.h> 37 #include <linux/phy/phy.h> 38 #include <linux/phy/phy-sun4i-usb.h> 39 #include <linux/platform_device.h> 40 #include <linux/power_supply.h> 41 #include <linux/regulator/consumer.h> 42 #include <linux/reset.h> 43 #include <linux/spinlock.h> 44 #include <linux/usb/of.h> 45 #include <linux/workqueue.h> 46 47 #define REG_ISCR 0x00 48 #define REG_PHYCTL_A10 0x04 49 #define REG_PHYBIST 0x08 50 #define REG_PHYTUNE 0x0c 51 #define REG_PHYCTL_A33 0x10 52 #define REG_PHY_OTGCTL 0x20 53 54 #define REG_PMU_UNK1 0x10 55 56 #define PHYCTL_DATA BIT(7) 57 58 #define OTGCTL_ROUTE_MUSB BIT(0) 59 60 #define SUNXI_AHB_ICHR8_EN BIT(10) 61 #define SUNXI_AHB_INCR4_BURST_EN BIT(9) 62 #define SUNXI_AHB_INCRX_ALIGN_EN BIT(8) 63 #define SUNXI_ULPI_BYPASS_EN BIT(0) 64 65 /* ISCR, Interface Status and Control bits */ 66 #define ISCR_ID_PULLUP_EN (1 << 17) 67 #define ISCR_DPDM_PULLUP_EN (1 << 16) 68 /* sunxi has the phy id/vbus pins not connected, so we use the force bits */ 69 #define ISCR_FORCE_ID_MASK (3 << 14) 70 #define ISCR_FORCE_ID_LOW (2 << 14) 71 #define ISCR_FORCE_ID_HIGH (3 << 14) 72 #define ISCR_FORCE_VBUS_MASK (3 << 12) 73 #define ISCR_FORCE_VBUS_LOW (2 << 12) 74 #define ISCR_FORCE_VBUS_HIGH (3 << 12) 75 76 /* Common Control Bits for Both PHYs */ 77 #define PHY_PLL_BW 0x03 78 #define PHY_RES45_CAL_EN 0x0c 79 80 /* Private Control Bits for Each PHY */ 81 #define PHY_TX_AMPLITUDE_TUNE 0x20 82 #define PHY_TX_SLEWRATE_TUNE 0x22 83 #define PHY_VBUSVALID_TH_SEL 0x25 84 #define PHY_PULLUP_RES_SEL 0x27 85 #define PHY_OTG_FUNC_EN 0x28 86 #define PHY_VBUS_DET_EN 0x29 87 #define PHY_DISCON_TH_SEL 0x2a 88 #define PHY_SQUELCH_DETECT 0x3c 89 90 /* A83T specific control bits for PHY0 */ 91 #define PHY_CTL_VBUSVLDEXT BIT(5) 92 #define PHY_CTL_SIDDQ BIT(3) 93 94 /* A83T specific control bits for PHY2 HSIC */ 95 #define SUNXI_EHCI_HS_FORCE BIT(20) 96 #define SUNXI_HSIC_CONNECT_DET BIT(17) 97 #define SUNXI_HSIC_CONNECT_INT BIT(16) 98 #define SUNXI_HSIC BIT(1) 99 100 #define MAX_PHYS 4 101 102 /* 103 * Note do not raise the debounce time, we must report Vusb high within 100ms 104 * otherwise we get Vbus errors 105 */ 106 #define DEBOUNCE_TIME msecs_to_jiffies(50) 107 #define POLL_TIME msecs_to_jiffies(250) 108 109 enum sun4i_usb_phy_type { 110 sun4i_a10_phy, 111 sun6i_a31_phy, 112 sun8i_a33_phy, 113 sun8i_a83t_phy, 114 sun8i_h3_phy, 115 sun8i_r40_phy, 116 sun8i_v3s_phy, 117 sun50i_a64_phy, 118 sun50i_h6_phy, 119 }; 120 121 struct sun4i_usb_phy_cfg { 122 int num_phys; 123 int hsic_index; 124 enum sun4i_usb_phy_type type; 125 u32 disc_thresh; 126 u8 phyctl_offset; 127 bool dedicated_clocks; 128 bool enable_pmu_unk1; 129 bool phy0_dual_route; 130 int missing_phys; 131 }; 132 133 struct sun4i_usb_phy_data { 134 void __iomem *base; 135 const struct sun4i_usb_phy_cfg *cfg; 136 enum usb_dr_mode dr_mode; 137 spinlock_t reg_lock; /* guard access to phyctl reg */ 138 struct sun4i_usb_phy { 139 struct phy *phy; 140 void __iomem *pmu; 141 struct regulator *vbus; 142 struct reset_control *reset; 143 struct clk *clk; 144 struct clk *clk2; 145 bool regulator_on; 146 int index; 147 } phys[MAX_PHYS]; 148 /* phy0 / otg related variables */ 149 struct extcon_dev *extcon; 150 bool phy0_init; 151 struct gpio_desc *id_det_gpio; 152 struct gpio_desc *vbus_det_gpio; 153 struct power_supply *vbus_power_supply; 154 struct notifier_block vbus_power_nb; 155 bool vbus_power_nb_registered; 156 bool force_session_end; 157 int id_det_irq; 158 int vbus_det_irq; 159 int id_det; 160 int vbus_det; 161 struct delayed_work detect; 162 }; 163 164 #define to_sun4i_usb_phy_data(phy) \ 165 container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index]) 166 167 static void sun4i_usb_phy0_update_iscr(struct phy *_phy, u32 clr, u32 set) 168 { 169 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); 170 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); 171 u32 iscr; 172 173 iscr = readl(data->base + REG_ISCR); 174 iscr &= ~clr; 175 iscr |= set; 176 writel(iscr, data->base + REG_ISCR); 177 } 178 179 static void sun4i_usb_phy0_set_id_detect(struct phy *phy, u32 val) 180 { 181 if (val) 182 val = ISCR_FORCE_ID_HIGH; 183 else 184 val = ISCR_FORCE_ID_LOW; 185 186 sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_ID_MASK, val); 187 } 188 189 static void sun4i_usb_phy0_set_vbus_detect(struct phy *phy, u32 val) 190 { 191 if (val) 192 val = ISCR_FORCE_VBUS_HIGH; 193 else 194 val = ISCR_FORCE_VBUS_LOW; 195 196 sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_VBUS_MASK, val); 197 } 198 199 static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data, 200 int len) 201 { 202 struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy); 203 u32 temp, usbc_bit = BIT(phy->index * 2); 204 void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset; 205 unsigned long flags; 206 int i; 207 208 spin_lock_irqsave(&phy_data->reg_lock, flags); 209 210 if (phy_data->cfg->phyctl_offset == REG_PHYCTL_A33) { 211 /* SoCs newer than A33 need us to set phyctl to 0 explicitly */ 212 writel(0, phyctl); 213 } 214 215 for (i = 0; i < len; i++) { 216 temp = readl(phyctl); 217 218 /* clear the address portion */ 219 temp &= ~(0xff << 8); 220 221 /* set the address */ 222 temp |= ((addr + i) << 8); 223 writel(temp, phyctl); 224 225 /* set the data bit and clear usbc bit*/ 226 temp = readb(phyctl); 227 if (data & 0x1) 228 temp |= PHYCTL_DATA; 229 else 230 temp &= ~PHYCTL_DATA; 231 temp &= ~usbc_bit; 232 writeb(temp, phyctl); 233 234 /* pulse usbc_bit */ 235 temp = readb(phyctl); 236 temp |= usbc_bit; 237 writeb(temp, phyctl); 238 239 temp = readb(phyctl); 240 temp &= ~usbc_bit; 241 writeb(temp, phyctl); 242 243 data >>= 1; 244 } 245 246 spin_unlock_irqrestore(&phy_data->reg_lock, flags); 247 } 248 249 static void sun4i_usb_phy_passby(struct sun4i_usb_phy *phy, int enable) 250 { 251 struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy); 252 u32 bits, reg_value; 253 254 if (!phy->pmu) 255 return; 256 257 bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN | 258 SUNXI_AHB_INCRX_ALIGN_EN | SUNXI_ULPI_BYPASS_EN; 259 260 /* A83T USB2 is HSIC */ 261 if (phy_data->cfg->type == sun8i_a83t_phy && phy->index == 2) 262 bits |= SUNXI_EHCI_HS_FORCE | SUNXI_HSIC_CONNECT_INT | 263 SUNXI_HSIC; 264 265 reg_value = readl(phy->pmu); 266 267 if (enable) 268 reg_value |= bits; 269 else 270 reg_value &= ~bits; 271 272 writel(reg_value, phy->pmu); 273 } 274 275 static int sun4i_usb_phy_init(struct phy *_phy) 276 { 277 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); 278 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); 279 int ret; 280 u32 val; 281 282 ret = clk_prepare_enable(phy->clk); 283 if (ret) 284 return ret; 285 286 ret = clk_prepare_enable(phy->clk2); 287 if (ret) { 288 clk_disable_unprepare(phy->clk); 289 return ret; 290 } 291 292 ret = reset_control_deassert(phy->reset); 293 if (ret) { 294 clk_disable_unprepare(phy->clk2); 295 clk_disable_unprepare(phy->clk); 296 return ret; 297 } 298 299 if (data->cfg->type == sun8i_a83t_phy || 300 data->cfg->type == sun50i_h6_phy) { 301 if (phy->index == 0) { 302 val = readl(data->base + data->cfg->phyctl_offset); 303 val |= PHY_CTL_VBUSVLDEXT; 304 val &= ~PHY_CTL_SIDDQ; 305 writel(val, data->base + data->cfg->phyctl_offset); 306 } 307 } else { 308 if (phy->pmu && data->cfg->enable_pmu_unk1) { 309 val = readl(phy->pmu + REG_PMU_UNK1); 310 writel(val & ~2, phy->pmu + REG_PMU_UNK1); 311 } 312 313 /* Enable USB 45 Ohm resistor calibration */ 314 if (phy->index == 0) 315 sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, 0x01, 1); 316 317 /* Adjust PHY's magnitude and rate */ 318 sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5); 319 320 /* Disconnect threshold adjustment */ 321 sun4i_usb_phy_write(phy, PHY_DISCON_TH_SEL, 322 data->cfg->disc_thresh, 2); 323 } 324 325 sun4i_usb_phy_passby(phy, 1); 326 327 if (phy->index == 0) { 328 data->phy0_init = true; 329 330 /* Enable pull-ups */ 331 sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_DPDM_PULLUP_EN); 332 sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_ID_PULLUP_EN); 333 334 /* Force ISCR and cable state updates */ 335 data->id_det = -1; 336 data->vbus_det = -1; 337 queue_delayed_work(system_wq, &data->detect, 0); 338 } 339 340 return 0; 341 } 342 343 static int sun4i_usb_phy_exit(struct phy *_phy) 344 { 345 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); 346 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); 347 348 if (phy->index == 0) { 349 if (data->cfg->type == sun8i_a83t_phy || 350 data->cfg->type == sun50i_h6_phy) { 351 void __iomem *phyctl = data->base + 352 data->cfg->phyctl_offset; 353 354 writel(readl(phyctl) | PHY_CTL_SIDDQ, phyctl); 355 } 356 357 /* Disable pull-ups */ 358 sun4i_usb_phy0_update_iscr(_phy, ISCR_DPDM_PULLUP_EN, 0); 359 sun4i_usb_phy0_update_iscr(_phy, ISCR_ID_PULLUP_EN, 0); 360 data->phy0_init = false; 361 } 362 363 sun4i_usb_phy_passby(phy, 0); 364 reset_control_assert(phy->reset); 365 clk_disable_unprepare(phy->clk2); 366 clk_disable_unprepare(phy->clk); 367 368 return 0; 369 } 370 371 static int sun4i_usb_phy0_get_id_det(struct sun4i_usb_phy_data *data) 372 { 373 switch (data->dr_mode) { 374 case USB_DR_MODE_OTG: 375 if (data->id_det_gpio) 376 return gpiod_get_value_cansleep(data->id_det_gpio); 377 else 378 return 1; /* Fallback to peripheral mode */ 379 case USB_DR_MODE_HOST: 380 return 0; 381 case USB_DR_MODE_PERIPHERAL: 382 default: 383 return 1; 384 } 385 } 386 387 static int sun4i_usb_phy0_get_vbus_det(struct sun4i_usb_phy_data *data) 388 { 389 if (data->vbus_det_gpio) 390 return gpiod_get_value_cansleep(data->vbus_det_gpio); 391 392 if (data->vbus_power_supply) { 393 union power_supply_propval val; 394 int r; 395 396 r = power_supply_get_property(data->vbus_power_supply, 397 POWER_SUPPLY_PROP_PRESENT, &val); 398 if (r == 0) 399 return val.intval; 400 } 401 402 /* Fallback: report vbus as high */ 403 return 1; 404 } 405 406 static bool sun4i_usb_phy0_have_vbus_det(struct sun4i_usb_phy_data *data) 407 { 408 return data->vbus_det_gpio || data->vbus_power_supply; 409 } 410 411 static bool sun4i_usb_phy0_poll(struct sun4i_usb_phy_data *data) 412 { 413 if ((data->id_det_gpio && data->id_det_irq <= 0) || 414 (data->vbus_det_gpio && data->vbus_det_irq <= 0)) 415 return true; 416 417 /* 418 * The A31/A23/A33 companion pmics (AXP221/AXP223) do not 419 * generate vbus change interrupts when the board is driving 420 * vbus using the N_VBUSEN pin on the pmic, so we must poll 421 * when using the pmic for vbus-det _and_ we're driving vbus. 422 */ 423 if ((data->cfg->type == sun6i_a31_phy || 424 data->cfg->type == sun8i_a33_phy) && 425 data->vbus_power_supply && data->phys[0].regulator_on) 426 return true; 427 428 return false; 429 } 430 431 static int sun4i_usb_phy_power_on(struct phy *_phy) 432 { 433 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); 434 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); 435 int ret; 436 437 if (!phy->vbus || phy->regulator_on) 438 return 0; 439 440 /* For phy0 only turn on Vbus if we don't have an ext. Vbus */ 441 if (phy->index == 0 && sun4i_usb_phy0_have_vbus_det(data) && 442 data->vbus_det) { 443 dev_warn(&_phy->dev, "External vbus detected, not enabling our own vbus\n"); 444 return 0; 445 } 446 447 ret = regulator_enable(phy->vbus); 448 if (ret) 449 return ret; 450 451 phy->regulator_on = true; 452 453 /* We must report Vbus high within OTG_TIME_A_WAIT_VRISE msec. */ 454 if (phy->index == 0 && sun4i_usb_phy0_poll(data)) 455 mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME); 456 457 return 0; 458 } 459 460 static int sun4i_usb_phy_power_off(struct phy *_phy) 461 { 462 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); 463 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); 464 465 if (!phy->vbus || !phy->regulator_on) 466 return 0; 467 468 regulator_disable(phy->vbus); 469 phy->regulator_on = false; 470 471 /* 472 * phy0 vbus typically slowly discharges, sometimes this causes the 473 * Vbus gpio to not trigger an edge irq on Vbus off, so force a rescan. 474 */ 475 if (phy->index == 0 && !sun4i_usb_phy0_poll(data)) 476 mod_delayed_work(system_wq, &data->detect, POLL_TIME); 477 478 return 0; 479 } 480 481 static int sun4i_usb_phy_set_mode(struct phy *_phy, 482 enum phy_mode mode, int submode) 483 { 484 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); 485 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); 486 int new_mode; 487 488 if (phy->index != 0) { 489 if (mode == PHY_MODE_USB_HOST) 490 return 0; 491 return -EINVAL; 492 } 493 494 switch (mode) { 495 case PHY_MODE_USB_HOST: 496 new_mode = USB_DR_MODE_HOST; 497 break; 498 case PHY_MODE_USB_DEVICE: 499 new_mode = USB_DR_MODE_PERIPHERAL; 500 break; 501 case PHY_MODE_USB_OTG: 502 new_mode = USB_DR_MODE_OTG; 503 break; 504 default: 505 return -EINVAL; 506 } 507 508 if (new_mode != data->dr_mode) { 509 dev_info(&_phy->dev, "Changing dr_mode to %d\n", new_mode); 510 data->dr_mode = new_mode; 511 } 512 513 data->id_det = -1; /* Force reprocessing of id */ 514 data->force_session_end = true; 515 queue_delayed_work(system_wq, &data->detect, 0); 516 517 return 0; 518 } 519 520 void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled) 521 { 522 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); 523 524 sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2); 525 } 526 EXPORT_SYMBOL_GPL(sun4i_usb_phy_set_squelch_detect); 527 528 static const struct phy_ops sun4i_usb_phy_ops = { 529 .init = sun4i_usb_phy_init, 530 .exit = sun4i_usb_phy_exit, 531 .power_on = sun4i_usb_phy_power_on, 532 .power_off = sun4i_usb_phy_power_off, 533 .set_mode = sun4i_usb_phy_set_mode, 534 .owner = THIS_MODULE, 535 }; 536 537 static void sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data *data, int id_det) 538 { 539 u32 regval; 540 541 regval = readl(data->base + REG_PHY_OTGCTL); 542 if (id_det == 0) { 543 /* Host mode. Route phy0 to EHCI/OHCI */ 544 regval &= ~OTGCTL_ROUTE_MUSB; 545 } else { 546 /* Peripheral mode. Route phy0 to MUSB */ 547 regval |= OTGCTL_ROUTE_MUSB; 548 } 549 writel(regval, data->base + REG_PHY_OTGCTL); 550 } 551 552 static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work) 553 { 554 struct sun4i_usb_phy_data *data = 555 container_of(work, struct sun4i_usb_phy_data, detect.work); 556 struct phy *phy0 = data->phys[0].phy; 557 struct sun4i_usb_phy *phy = phy_get_drvdata(phy0); 558 bool force_session_end, id_notify = false, vbus_notify = false; 559 int id_det, vbus_det; 560 561 if (phy0 == NULL) 562 return; 563 564 id_det = sun4i_usb_phy0_get_id_det(data); 565 vbus_det = sun4i_usb_phy0_get_vbus_det(data); 566 567 mutex_lock(&phy0->mutex); 568 569 if (!data->phy0_init) { 570 mutex_unlock(&phy0->mutex); 571 return; 572 } 573 574 force_session_end = data->force_session_end; 575 data->force_session_end = false; 576 577 if (id_det != data->id_det) { 578 /* id-change, force session end if we've no vbus detection */ 579 if (data->dr_mode == USB_DR_MODE_OTG && 580 !sun4i_usb_phy0_have_vbus_det(data)) 581 force_session_end = true; 582 583 /* When entering host mode (id = 0) force end the session now */ 584 if (force_session_end && id_det == 0) { 585 sun4i_usb_phy0_set_vbus_detect(phy0, 0); 586 msleep(200); 587 sun4i_usb_phy0_set_vbus_detect(phy0, 1); 588 } 589 sun4i_usb_phy0_set_id_detect(phy0, id_det); 590 data->id_det = id_det; 591 id_notify = true; 592 } 593 594 if (vbus_det != data->vbus_det) { 595 sun4i_usb_phy0_set_vbus_detect(phy0, vbus_det); 596 data->vbus_det = vbus_det; 597 vbus_notify = true; 598 } 599 600 mutex_unlock(&phy0->mutex); 601 602 if (id_notify) { 603 extcon_set_state_sync(data->extcon, EXTCON_USB_HOST, 604 !id_det); 605 /* When leaving host mode force end the session here */ 606 if (force_session_end && id_det == 1) { 607 mutex_lock(&phy0->mutex); 608 sun4i_usb_phy0_set_vbus_detect(phy0, 0); 609 msleep(1000); 610 sun4i_usb_phy0_set_vbus_detect(phy0, 1); 611 mutex_unlock(&phy0->mutex); 612 } 613 614 /* Enable PHY0 passby for host mode only. */ 615 sun4i_usb_phy_passby(phy, !id_det); 616 617 /* Re-route PHY0 if necessary */ 618 if (data->cfg->phy0_dual_route) 619 sun4i_usb_phy0_reroute(data, id_det); 620 } 621 622 if (vbus_notify) 623 extcon_set_state_sync(data->extcon, EXTCON_USB, vbus_det); 624 625 if (sun4i_usb_phy0_poll(data)) 626 queue_delayed_work(system_wq, &data->detect, POLL_TIME); 627 } 628 629 static irqreturn_t sun4i_usb_phy0_id_vbus_det_irq(int irq, void *dev_id) 630 { 631 struct sun4i_usb_phy_data *data = dev_id; 632 633 /* vbus or id changed, let the pins settle and then scan them */ 634 mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME); 635 636 return IRQ_HANDLED; 637 } 638 639 static int sun4i_usb_phy0_vbus_notify(struct notifier_block *nb, 640 unsigned long val, void *v) 641 { 642 struct sun4i_usb_phy_data *data = 643 container_of(nb, struct sun4i_usb_phy_data, vbus_power_nb); 644 struct power_supply *psy = v; 645 646 /* Properties on the vbus_power_supply changed, scan vbus_det */ 647 if (val == PSY_EVENT_PROP_CHANGED && psy == data->vbus_power_supply) 648 mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME); 649 650 return NOTIFY_OK; 651 } 652 653 static struct phy *sun4i_usb_phy_xlate(struct device *dev, 654 struct of_phandle_args *args) 655 { 656 struct sun4i_usb_phy_data *data = dev_get_drvdata(dev); 657 658 if (args->args[0] >= data->cfg->num_phys) 659 return ERR_PTR(-ENODEV); 660 661 if (data->cfg->missing_phys & BIT(args->args[0])) 662 return ERR_PTR(-ENODEV); 663 664 return data->phys[args->args[0]].phy; 665 } 666 667 static int sun4i_usb_phy_remove(struct platform_device *pdev) 668 { 669 struct device *dev = &pdev->dev; 670 struct sun4i_usb_phy_data *data = dev_get_drvdata(dev); 671 672 if (data->vbus_power_nb_registered) 673 power_supply_unreg_notifier(&data->vbus_power_nb); 674 if (data->id_det_irq > 0) 675 devm_free_irq(dev, data->id_det_irq, data); 676 if (data->vbus_det_irq > 0) 677 devm_free_irq(dev, data->vbus_det_irq, data); 678 679 cancel_delayed_work_sync(&data->detect); 680 681 return 0; 682 } 683 684 static const unsigned int sun4i_usb_phy0_cable[] = { 685 EXTCON_USB, 686 EXTCON_USB_HOST, 687 EXTCON_NONE, 688 }; 689 690 static int sun4i_usb_phy_probe(struct platform_device *pdev) 691 { 692 struct sun4i_usb_phy_data *data; 693 struct device *dev = &pdev->dev; 694 struct device_node *np = dev->of_node; 695 struct phy_provider *phy_provider; 696 struct resource *res; 697 int i, ret; 698 699 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); 700 if (!data) 701 return -ENOMEM; 702 703 spin_lock_init(&data->reg_lock); 704 INIT_DELAYED_WORK(&data->detect, sun4i_usb_phy0_id_vbus_det_scan); 705 dev_set_drvdata(dev, data); 706 data->cfg = of_device_get_match_data(dev); 707 if (!data->cfg) 708 return -EINVAL; 709 710 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_ctrl"); 711 data->base = devm_ioremap_resource(dev, res); 712 if (IS_ERR(data->base)) 713 return PTR_ERR(data->base); 714 715 data->id_det_gpio = devm_gpiod_get_optional(dev, "usb0_id_det", 716 GPIOD_IN); 717 if (IS_ERR(data->id_det_gpio)) { 718 dev_err(dev, "Couldn't request ID GPIO\n"); 719 return PTR_ERR(data->id_det_gpio); 720 } 721 722 data->vbus_det_gpio = devm_gpiod_get_optional(dev, "usb0_vbus_det", 723 GPIOD_IN); 724 if (IS_ERR(data->vbus_det_gpio)) { 725 dev_err(dev, "Couldn't request VBUS detect GPIO\n"); 726 return PTR_ERR(data->vbus_det_gpio); 727 } 728 729 if (of_find_property(np, "usb0_vbus_power-supply", NULL)) { 730 data->vbus_power_supply = devm_power_supply_get_by_phandle(dev, 731 "usb0_vbus_power-supply"); 732 if (IS_ERR(data->vbus_power_supply)) { 733 dev_err(dev, "Couldn't get the VBUS power supply\n"); 734 return PTR_ERR(data->vbus_power_supply); 735 } 736 737 if (!data->vbus_power_supply) 738 return -EPROBE_DEFER; 739 } 740 741 data->dr_mode = of_usb_get_dr_mode_by_phy(np, 0); 742 743 data->extcon = devm_extcon_dev_allocate(dev, sun4i_usb_phy0_cable); 744 if (IS_ERR(data->extcon)) { 745 dev_err(dev, "Couldn't allocate our extcon device\n"); 746 return PTR_ERR(data->extcon); 747 } 748 749 ret = devm_extcon_dev_register(dev, data->extcon); 750 if (ret) { 751 dev_err(dev, "failed to register extcon: %d\n", ret); 752 return ret; 753 } 754 755 for (i = 0; i < data->cfg->num_phys; i++) { 756 struct sun4i_usb_phy *phy = data->phys + i; 757 char name[16]; 758 759 if (data->cfg->missing_phys & BIT(i)) 760 continue; 761 762 snprintf(name, sizeof(name), "usb%d_vbus", i); 763 phy->vbus = devm_regulator_get_optional(dev, name); 764 if (IS_ERR(phy->vbus)) { 765 if (PTR_ERR(phy->vbus) == -EPROBE_DEFER) { 766 dev_err(dev, 767 "Couldn't get regulator %s... Deferring probe\n", 768 name); 769 return -EPROBE_DEFER; 770 } 771 772 phy->vbus = NULL; 773 } 774 775 if (data->cfg->dedicated_clocks) 776 snprintf(name, sizeof(name), "usb%d_phy", i); 777 else 778 strlcpy(name, "usb_phy", sizeof(name)); 779 780 phy->clk = devm_clk_get(dev, name); 781 if (IS_ERR(phy->clk)) { 782 dev_err(dev, "failed to get clock %s\n", name); 783 return PTR_ERR(phy->clk); 784 } 785 786 /* The first PHY is always tied to OTG, and never HSIC */ 787 if (data->cfg->hsic_index && i == data->cfg->hsic_index) { 788 /* HSIC needs secondary clock */ 789 snprintf(name, sizeof(name), "usb%d_hsic_12M", i); 790 phy->clk2 = devm_clk_get(dev, name); 791 if (IS_ERR(phy->clk2)) { 792 dev_err(dev, "failed to get clock %s\n", name); 793 return PTR_ERR(phy->clk2); 794 } 795 } 796 797 snprintf(name, sizeof(name), "usb%d_reset", i); 798 phy->reset = devm_reset_control_get(dev, name); 799 if (IS_ERR(phy->reset)) { 800 dev_err(dev, "failed to get reset %s\n", name); 801 return PTR_ERR(phy->reset); 802 } 803 804 if (i || data->cfg->phy0_dual_route) { /* No pmu for musb */ 805 snprintf(name, sizeof(name), "pmu%d", i); 806 res = platform_get_resource_byname(pdev, 807 IORESOURCE_MEM, name); 808 phy->pmu = devm_ioremap_resource(dev, res); 809 if (IS_ERR(phy->pmu)) 810 return PTR_ERR(phy->pmu); 811 } 812 813 phy->phy = devm_phy_create(dev, NULL, &sun4i_usb_phy_ops); 814 if (IS_ERR(phy->phy)) { 815 dev_err(dev, "failed to create PHY %d\n", i); 816 return PTR_ERR(phy->phy); 817 } 818 819 phy->index = i; 820 phy_set_drvdata(phy->phy, &data->phys[i]); 821 } 822 823 data->id_det_irq = gpiod_to_irq(data->id_det_gpio); 824 if (data->id_det_irq > 0) { 825 ret = devm_request_irq(dev, data->id_det_irq, 826 sun4i_usb_phy0_id_vbus_det_irq, 827 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 828 "usb0-id-det", data); 829 if (ret) { 830 dev_err(dev, "Err requesting id-det-irq: %d\n", ret); 831 return ret; 832 } 833 } 834 835 data->vbus_det_irq = gpiod_to_irq(data->vbus_det_gpio); 836 if (data->vbus_det_irq > 0) { 837 ret = devm_request_irq(dev, data->vbus_det_irq, 838 sun4i_usb_phy0_id_vbus_det_irq, 839 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 840 "usb0-vbus-det", data); 841 if (ret) { 842 dev_err(dev, "Err requesting vbus-det-irq: %d\n", ret); 843 data->vbus_det_irq = -1; 844 sun4i_usb_phy_remove(pdev); /* Stop detect work */ 845 return ret; 846 } 847 } 848 849 if (data->vbus_power_supply) { 850 data->vbus_power_nb.notifier_call = sun4i_usb_phy0_vbus_notify; 851 data->vbus_power_nb.priority = 0; 852 ret = power_supply_reg_notifier(&data->vbus_power_nb); 853 if (ret) { 854 sun4i_usb_phy_remove(pdev); /* Stop detect work */ 855 return ret; 856 } 857 data->vbus_power_nb_registered = true; 858 } 859 860 phy_provider = devm_of_phy_provider_register(dev, sun4i_usb_phy_xlate); 861 if (IS_ERR(phy_provider)) { 862 sun4i_usb_phy_remove(pdev); /* Stop detect work */ 863 return PTR_ERR(phy_provider); 864 } 865 866 dev_dbg(dev, "successfully loaded\n"); 867 868 return 0; 869 } 870 871 static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = { 872 .num_phys = 3, 873 .type = sun4i_a10_phy, 874 .disc_thresh = 3, 875 .phyctl_offset = REG_PHYCTL_A10, 876 .dedicated_clocks = false, 877 .enable_pmu_unk1 = false, 878 }; 879 880 static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = { 881 .num_phys = 2, 882 .type = sun4i_a10_phy, 883 .disc_thresh = 2, 884 .phyctl_offset = REG_PHYCTL_A10, 885 .dedicated_clocks = false, 886 .enable_pmu_unk1 = false, 887 }; 888 889 static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = { 890 .num_phys = 3, 891 .type = sun6i_a31_phy, 892 .disc_thresh = 3, 893 .phyctl_offset = REG_PHYCTL_A10, 894 .dedicated_clocks = true, 895 .enable_pmu_unk1 = false, 896 }; 897 898 static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = { 899 .num_phys = 3, 900 .type = sun4i_a10_phy, 901 .disc_thresh = 2, 902 .phyctl_offset = REG_PHYCTL_A10, 903 .dedicated_clocks = false, 904 .enable_pmu_unk1 = false, 905 }; 906 907 static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = { 908 .num_phys = 2, 909 .type = sun6i_a31_phy, 910 .disc_thresh = 3, 911 .phyctl_offset = REG_PHYCTL_A10, 912 .dedicated_clocks = true, 913 .enable_pmu_unk1 = false, 914 }; 915 916 static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = { 917 .num_phys = 2, 918 .type = sun8i_a33_phy, 919 .disc_thresh = 3, 920 .phyctl_offset = REG_PHYCTL_A33, 921 .dedicated_clocks = true, 922 .enable_pmu_unk1 = false, 923 }; 924 925 static const struct sun4i_usb_phy_cfg sun8i_a83t_cfg = { 926 .num_phys = 3, 927 .hsic_index = 2, 928 .type = sun8i_a83t_phy, 929 .phyctl_offset = REG_PHYCTL_A33, 930 .dedicated_clocks = true, 931 }; 932 933 static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = { 934 .num_phys = 4, 935 .type = sun8i_h3_phy, 936 .disc_thresh = 3, 937 .phyctl_offset = REG_PHYCTL_A33, 938 .dedicated_clocks = true, 939 .enable_pmu_unk1 = true, 940 .phy0_dual_route = true, 941 }; 942 943 static const struct sun4i_usb_phy_cfg sun8i_r40_cfg = { 944 .num_phys = 3, 945 .type = sun8i_r40_phy, 946 .disc_thresh = 3, 947 .phyctl_offset = REG_PHYCTL_A33, 948 .dedicated_clocks = true, 949 .enable_pmu_unk1 = true, 950 .phy0_dual_route = true, 951 }; 952 953 static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = { 954 .num_phys = 1, 955 .type = sun8i_v3s_phy, 956 .disc_thresh = 3, 957 .phyctl_offset = REG_PHYCTL_A33, 958 .dedicated_clocks = true, 959 .enable_pmu_unk1 = true, 960 .phy0_dual_route = true, 961 }; 962 963 static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = { 964 .num_phys = 2, 965 .type = sun50i_a64_phy, 966 .disc_thresh = 3, 967 .phyctl_offset = REG_PHYCTL_A33, 968 .dedicated_clocks = true, 969 .enable_pmu_unk1 = true, 970 .phy0_dual_route = true, 971 }; 972 973 static const struct sun4i_usb_phy_cfg sun50i_h6_cfg = { 974 .num_phys = 4, 975 .type = sun50i_h6_phy, 976 .disc_thresh = 3, 977 .phyctl_offset = REG_PHYCTL_A33, 978 .dedicated_clocks = true, 979 .enable_pmu_unk1 = true, 980 .phy0_dual_route = true, 981 .missing_phys = BIT(1) | BIT(2), 982 }; 983 984 static const struct of_device_id sun4i_usb_phy_of_match[] = { 985 { .compatible = "allwinner,sun4i-a10-usb-phy", .data = &sun4i_a10_cfg }, 986 { .compatible = "allwinner,sun5i-a13-usb-phy", .data = &sun5i_a13_cfg }, 987 { .compatible = "allwinner,sun6i-a31-usb-phy", .data = &sun6i_a31_cfg }, 988 { .compatible = "allwinner,sun7i-a20-usb-phy", .data = &sun7i_a20_cfg }, 989 { .compatible = "allwinner,sun8i-a23-usb-phy", .data = &sun8i_a23_cfg }, 990 { .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg }, 991 { .compatible = "allwinner,sun8i-a83t-usb-phy", .data = &sun8i_a83t_cfg }, 992 { .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg }, 993 { .compatible = "allwinner,sun8i-r40-usb-phy", .data = &sun8i_r40_cfg }, 994 { .compatible = "allwinner,sun8i-v3s-usb-phy", .data = &sun8i_v3s_cfg }, 995 { .compatible = "allwinner,sun50i-a64-usb-phy", 996 .data = &sun50i_a64_cfg}, 997 { .compatible = "allwinner,sun50i-h6-usb-phy", .data = &sun50i_h6_cfg }, 998 { }, 999 }; 1000 MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match); 1001 1002 static struct platform_driver sun4i_usb_phy_driver = { 1003 .probe = sun4i_usb_phy_probe, 1004 .remove = sun4i_usb_phy_remove, 1005 .driver = { 1006 .of_match_table = sun4i_usb_phy_of_match, 1007 .name = "sun4i-usb-phy", 1008 } 1009 }; 1010 module_platform_driver(sun4i_usb_phy_driver); 1011 1012 MODULE_DESCRIPTION("Allwinner sun4i USB phy driver"); 1013 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); 1014 MODULE_LICENSE("GPL v2"); 1015