1# SPDX-License-Identifier: GPL-2.0-only 2# 3# Performance Monitor Drivers 4# 5 6menu "Performance monitor support" 7 depends on PERF_EVENTS 8 9config ARM_CCI_PMU 10 tristate "ARM CCI PMU driver" 11 depends on (ARM && CPU_V7) || ARM64 12 select ARM_CCI 13 help 14 Support for PMU events monitoring on the ARM CCI (Cache Coherent 15 Interconnect) family of products. 16 17 If compiled as a module, it will be called arm-cci. 18 19config ARM_CCI400_PMU 20 bool "support CCI-400" 21 default y 22 depends on ARM_CCI_PMU 23 select ARM_CCI400_COMMON 24 help 25 CCI-400 provides 4 independent event counters counting events related 26 to the connected slave/master interfaces, plus a cycle counter. 27 28config ARM_CCI5xx_PMU 29 bool "support CCI-500/CCI-550" 30 default y 31 depends on ARM_CCI_PMU 32 help 33 CCI-500/CCI-550 both provide 8 independent event counters, which can 34 count events pertaining to the slave/master interfaces as well as the 35 internal events to the CCI. 36 37config ARM_CCN 38 tristate "ARM CCN driver support" 39 depends on ARM || ARM64 40 help 41 PMU (perf) driver supporting the ARM CCN (Cache Coherent Network) 42 interconnect. 43 44config ARM_CMN 45 tristate "Arm CMN-600 PMU support" 46 depends on ARM64 || (COMPILE_TEST && 64BIT) 47 help 48 Support for PMU events monitoring on the Arm CMN-600 Coherent Mesh 49 Network interconnect. 50 51config ARM_PMU 52 depends on ARM || ARM64 53 bool "ARM PMU framework" 54 default y 55 help 56 Say y if you want to use CPU performance monitors on ARM-based 57 systems. 58 59config ARM_PMU_ACPI 60 depends on ARM_PMU && ACPI 61 def_bool y 62 63config ARM_SMMU_V3_PMU 64 tristate "ARM SMMUv3 Performance Monitors Extension" 65 depends on ARM64 && ACPI 66 help 67 Provides support for the ARM SMMUv3 Performance Monitor Counter 68 Groups (PMCG), which provide monitoring of transactions passing 69 through the SMMU and allow the resulting information to be filtered 70 based on the Stream ID of the corresponding master. 71 72config ARM_DSU_PMU 73 tristate "ARM DynamIQ Shared Unit (DSU) PMU" 74 depends on ARM64 75 help 76 Provides support for performance monitor unit in ARM DynamIQ Shared 77 Unit (DSU). The DSU integrates one or more cores with an L3 memory 78 system, control logic. The PMU allows counting various events related 79 to DSU. 80 81config FSL_IMX8_DDR_PMU 82 tristate "Freescale i.MX8 DDR perf monitor" 83 depends on ARCH_MXC 84 help 85 Provides support for the DDR performance monitor in i.MX8, which 86 can give information about memory throughput and other related 87 events. 88 89config QCOM_L2_PMU 90 bool "Qualcomm Technologies L2-cache PMU" 91 depends on ARCH_QCOM && ARM64 && ACPI 92 select QCOM_KRYO_L2_ACCESSORS 93 help 94 Provides support for the L2 cache performance monitor unit (PMU) 95 in Qualcomm Technologies processors. 96 Adds the L2 cache PMU into the perf events subsystem for 97 monitoring L2 cache events. 98 99config QCOM_L3_PMU 100 bool "Qualcomm Technologies L3-cache PMU" 101 depends on ARCH_QCOM && ARM64 && ACPI 102 select QCOM_IRQ_COMBINER 103 help 104 Provides support for the L3 cache performance monitor unit (PMU) 105 in Qualcomm Technologies processors. 106 Adds the L3 cache PMU into the perf events subsystem for 107 monitoring L3 cache events. 108 109config THUNDERX2_PMU 110 tristate "Cavium ThunderX2 SoC PMU UNCORE" 111 depends on ARCH_THUNDER2 && ARM64 && ACPI && NUMA 112 default m 113 help 114 Provides support for ThunderX2 UNCORE events. 115 The SoC has PMU support in its L3 cache controller (L3C) and 116 in the DDR4 Memory Controller (DMC). 117 118config XGENE_PMU 119 depends on ARCH_XGENE 120 bool "APM X-Gene SoC PMU" 121 default n 122 help 123 Say y if you want to use APM X-Gene SoC performance monitors. 124 125config ARM_SPE_PMU 126 tristate "Enable support for the ARMv8.2 Statistical Profiling Extension" 127 depends on ARM64 128 help 129 Enable perf support for the ARMv8.2 Statistical Profiling 130 Extension, which provides periodic sampling of operations in 131 the CPU pipeline and reports this via the perf AUX interface. 132 133config ARM_DMC620_PMU 134 tristate "Enable PMU support for the ARM DMC-620 memory controller" 135 depends on (ARM64 && ACPI) || COMPILE_TEST 136 help 137 Support for PMU events monitoring on the ARM DMC-620 memory 138 controller. 139 140source "drivers/perf/hisilicon/Kconfig" 141 142endmenu 143