1fa8ad788SMark Rutland# 2fa8ad788SMark Rutland# Performance Monitor Drivers 3fa8ad788SMark Rutland# 4fa8ad788SMark Rutland 5fa8ad788SMark Rutlandmenu "Performance monitor support" 6fa8ad788SMark Rutland 7fa8ad788SMark Rutlandconfig ARM_PMU 86475b2d8SMark Rutland depends on PERF_EVENTS && (ARM || ARM64) 9fa8ad788SMark Rutland bool "ARM PMU framework" 10fa8ad788SMark Rutland default y 11fa8ad788SMark Rutland help 12fa8ad788SMark Rutland Say y if you want to use CPU performance monitors on ARM-based 13fa8ad788SMark Rutland systems. 14fa8ad788SMark Rutland 1521bdbb71SNeil Leederconfig QCOM_L2_PMU 1621bdbb71SNeil Leeder bool "Qualcomm Technologies L2-cache PMU" 1721bdbb71SNeil Leeder depends on ARCH_QCOM && ARM64 && PERF_EVENTS && ACPI 1821bdbb71SNeil Leeder help 1921bdbb71SNeil Leeder Provides support for the L2 cache performance monitor unit (PMU) 2021bdbb71SNeil Leeder in Qualcomm Technologies processors. 2121bdbb71SNeil Leeder Adds the L2 cache PMU into the perf events subsystem for 2221bdbb71SNeil Leeder monitoring L2 cache events. 2321bdbb71SNeil Leeder 243071f13dSAgustin Vega-Friasconfig QCOM_L3_PMU 253071f13dSAgustin Vega-Frias bool "Qualcomm Technologies L3-cache PMU" 263071f13dSAgustin Vega-Frias depends on ARCH_QCOM && ARM64 && PERF_EVENTS && ACPI 273071f13dSAgustin Vega-Frias select QCOM_IRQ_COMBINER 283071f13dSAgustin Vega-Frias help 293071f13dSAgustin Vega-Frias Provides support for the L3 cache performance monitor unit (PMU) 303071f13dSAgustin Vega-Frias in Qualcomm Technologies processors. 313071f13dSAgustin Vega-Frias Adds the L3 cache PMU into the perf events subsystem for 323071f13dSAgustin Vega-Frias monitoring L3 cache events. 333071f13dSAgustin Vega-Frias 34832c927dSTai Nguyenconfig XGENE_PMU 35832c927dSTai Nguyen depends on PERF_EVENTS && ARCH_XGENE 36832c927dSTai Nguyen bool "APM X-Gene SoC PMU" 37832c927dSTai Nguyen default n 38832c927dSTai Nguyen help 39832c927dSTai Nguyen Say y if you want to use APM X-Gene SoC performance monitors. 40832c927dSTai Nguyen 41fa8ad788SMark Rutlandendmenu 42