1 /* 2 * ti113x.h 1.16 1999/10/25 20:03:34 3 * 4 * The contents of this file are subject to the Mozilla Public License 5 * Version 1.1 (the "License"); you may not use this file except in 6 * compliance with the License. You may obtain a copy of the License 7 * at http://www.mozilla.org/MPL/ 8 * 9 * Software distributed under the License is distributed on an "AS IS" 10 * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See 11 * the License for the specific language governing rights and 12 * limitations under the License. 13 * 14 * The initial developer of the original code is David A. Hinds 15 * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds 16 * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. 17 * 18 * Alternatively, the contents of this file may be used under the 19 * terms of the GNU General Public License version 2 (the "GPL"), in which 20 * case the provisions of the GPL are applicable instead of the 21 * above. If you wish to allow the use of your version of this file 22 * only under the terms of the GPL and not to allow others to use 23 * your version of this file under the MPL, indicate your decision by 24 * deleting the provisions above and replace them with the notice and 25 * other provisions required by the GPL. If you do not delete the 26 * provisions above, a recipient may use your version of this file 27 * under either the MPL or the GPL. 28 */ 29 30 #ifndef _LINUX_TI113X_H 31 #define _LINUX_TI113X_H 32 33 #include <linux/config.h> 34 35 /* Register definitions for TI 113X PCI-to-CardBus bridges */ 36 37 /* System Control Register */ 38 #define TI113X_SYSTEM_CONTROL 0x0080 /* 32 bit */ 39 #define TI113X_SCR_SMIROUTE 0x04000000 40 #define TI113X_SCR_SMISTATUS 0x02000000 41 #define TI113X_SCR_SMIENB 0x01000000 42 #define TI113X_SCR_VCCPROT 0x00200000 43 #define TI113X_SCR_REDUCEZV 0x00100000 44 #define TI113X_SCR_CDREQEN 0x00080000 45 #define TI113X_SCR_CDMACHAN 0x00070000 46 #define TI113X_SCR_SOCACTIVE 0x00002000 47 #define TI113X_SCR_PWRSTREAM 0x00000800 48 #define TI113X_SCR_DELAYUP 0x00000400 49 #define TI113X_SCR_DELAYDOWN 0x00000200 50 #define TI113X_SCR_INTERROGATE 0x00000100 51 #define TI113X_SCR_CLKRUN_SEL 0x00000080 52 #define TI113X_SCR_PWRSAVINGS 0x00000040 53 #define TI113X_SCR_SUBSYSRW 0x00000020 54 #define TI113X_SCR_CB_DPAR 0x00000010 55 #define TI113X_SCR_CDMA_EN 0x00000008 56 #define TI113X_SCR_ASYNC_IRQ 0x00000004 57 #define TI113X_SCR_KEEPCLK 0x00000002 58 #define TI113X_SCR_CLKRUN_ENA 0x00000001 59 60 #define TI122X_SCR_SER_STEP 0xc0000000 61 #define TI122X_SCR_INTRTIE 0x20000000 62 #define TIXX21_SCR_TIEALL 0x10000000 63 #define TI122X_SCR_CBRSVD 0x00400000 64 #define TI122X_SCR_MRBURSTDN 0x00008000 65 #define TI122X_SCR_MRBURSTUP 0x00004000 66 #define TI122X_SCR_RIMUX 0x00000001 67 68 /* Multimedia Control Register */ 69 #define TI1250_MULTIMEDIA_CTL 0x0084 /* 8 bit */ 70 #define TI1250_MMC_ZVOUTEN 0x80 71 #define TI1250_MMC_PORTSEL 0x40 72 #define TI1250_MMC_ZVEN1 0x02 73 #define TI1250_MMC_ZVEN0 0x01 74 75 #define TI1250_GENERAL_STATUS 0x0085 /* 8 bit */ 76 #define TI1250_GPIO0_CONTROL 0x0088 /* 8 bit */ 77 #define TI1250_GPIO1_CONTROL 0x0089 /* 8 bit */ 78 #define TI1250_GPIO2_CONTROL 0x008a /* 8 bit */ 79 #define TI1250_GPIO3_CONTROL 0x008b /* 8 bit */ 80 #define TI1250_GPIO_MODE_MASK 0xc0 81 82 /* IRQMUX/MFUNC Register */ 83 #define TI122X_MFUNC 0x008c /* 32 bit */ 84 #define TI122X_MFUNC0_MASK 0x0000000f 85 #define TI122X_MFUNC1_MASK 0x000000f0 86 #define TI122X_MFUNC2_MASK 0x00000f00 87 #define TI122X_MFUNC3_MASK 0x0000f000 88 #define TI122X_MFUNC4_MASK 0x000f0000 89 #define TI122X_MFUNC5_MASK 0x00f00000 90 #define TI122X_MFUNC6_MASK 0x0f000000 91 92 #define TI122X_MFUNC0_INTA 0x00000002 93 #define TI125X_MFUNC0_INTB 0x00000001 94 #define TI122X_MFUNC1_INTB 0x00000020 95 #define TI122X_MFUNC3_IRQSER 0x00001000 96 97 98 /* Retry Status Register */ 99 #define TI113X_RETRY_STATUS 0x0090 /* 8 bit */ 100 #define TI113X_RSR_PCIRETRY 0x80 101 #define TI113X_RSR_CBRETRY 0x40 102 #define TI113X_RSR_TEXP_CBB 0x20 103 #define TI113X_RSR_MEXP_CBB 0x10 104 #define TI113X_RSR_TEXP_CBA 0x08 105 #define TI113X_RSR_MEXP_CBA 0x04 106 #define TI113X_RSR_TEXP_PCI 0x02 107 #define TI113X_RSR_MEXP_PCI 0x01 108 109 /* Card Control Register */ 110 #define TI113X_CARD_CONTROL 0x0091 /* 8 bit */ 111 #define TI113X_CCR_RIENB 0x80 112 #define TI113X_CCR_ZVENABLE 0x40 113 #define TI113X_CCR_PCI_IRQ_ENA 0x20 114 #define TI113X_CCR_PCI_IREQ 0x10 115 #define TI113X_CCR_PCI_CSC 0x08 116 #define TI113X_CCR_SPKROUTEN 0x02 117 #define TI113X_CCR_IFG 0x01 118 119 #define TI1220_CCR_PORT_SEL 0x20 120 #define TI122X_CCR_AUD2MUX 0x04 121 122 /* Device Control Register */ 123 #define TI113X_DEVICE_CONTROL 0x0092 /* 8 bit */ 124 #define TI113X_DCR_5V_FORCE 0x40 125 #define TI113X_DCR_3V_FORCE 0x20 126 #define TI113X_DCR_IMODE_MASK 0x06 127 #define TI113X_DCR_IMODE_ISA 0x02 128 #define TI113X_DCR_IMODE_SERIAL 0x04 129 130 #define TI12XX_DCR_IMODE_PCI_ONLY 0x00 131 #define TI12XX_DCR_IMODE_ALL_SERIAL 0x06 132 133 /* Buffer Control Register */ 134 #define TI113X_BUFFER_CONTROL 0x0093 /* 8 bit */ 135 #define TI113X_BCR_CB_READ_DEPTH 0x08 136 #define TI113X_BCR_CB_WRITE_DEPTH 0x04 137 #define TI113X_BCR_PCI_READ_DEPTH 0x02 138 #define TI113X_BCR_PCI_WRITE_DEPTH 0x01 139 140 /* Diagnostic Register */ 141 #define TI1250_DIAGNOSTIC 0x0093 /* 8 bit */ 142 #define TI1250_DIAG_TRUE_VALUE 0x80 143 #define TI1250_DIAG_PCI_IREQ 0x40 144 #define TI1250_DIAG_PCI_CSC 0x20 145 #define TI1250_DIAG_ASYNC_CSC 0x01 146 147 /* DMA Registers */ 148 #define TI113X_DMA_0 0x0094 /* 32 bit */ 149 #define TI113X_DMA_1 0x0098 /* 32 bit */ 150 151 /* ExCA IO offset registers */ 152 #define TI113X_IO_OFFSET(map) (0x36+((map)<<1)) 153 154 /* EnE test register */ 155 #define ENE_TEST_C9 0xc9 /* 8bit */ 156 #define ENE_TEST_C9_TLTENABLE 0x02 157 #define ENE_TEST_C9_PFENABLE_F0 0x04 158 #define ENE_TEST_C9_PFENABLE_F1 0x08 159 #define ENE_TEST_C9_PFENABLE (ENE_TEST_C9_PFENABLE_F0 | ENE_TEST_C9_PFENABLE_F0) 160 #define ENE_TEST_C9_WPDISALBLE_F0 0x40 161 #define ENE_TEST_C9_WPDISALBLE_F1 0x80 162 #define ENE_TEST_C9_WPDISALBLE (ENE_TEST_C9_WPDISALBLE_F0 | ENE_TEST_C9_WPDISALBLE_F1) 163 164 /* 165 * Texas Instruments CardBus controller overrides. 166 */ 167 #define ti_sysctl(socket) ((socket)->private[0]) 168 #define ti_cardctl(socket) ((socket)->private[1]) 169 #define ti_devctl(socket) ((socket)->private[2]) 170 #define ti_diag(socket) ((socket)->private[3]) 171 #define ti_mfunc(socket) ((socket)->private[4]) 172 #define ene_test_c9(socket) ((socket)->private[5]) 173 174 /* 175 * These are the TI specific power management handlers. 176 */ 177 static void ti_save_state(struct yenta_socket *socket) 178 { 179 ti_sysctl(socket) = config_readl(socket, TI113X_SYSTEM_CONTROL); 180 ti_mfunc(socket) = config_readl(socket, TI122X_MFUNC); 181 ti_cardctl(socket) = config_readb(socket, TI113X_CARD_CONTROL); 182 ti_devctl(socket) = config_readb(socket, TI113X_DEVICE_CONTROL); 183 ti_diag(socket) = config_readb(socket, TI1250_DIAGNOSTIC); 184 185 if (socket->dev->vendor == PCI_VENDOR_ID_ENE) 186 ene_test_c9(socket) = config_readb(socket, ENE_TEST_C9); 187 } 188 189 static void ti_restore_state(struct yenta_socket *socket) 190 { 191 config_writel(socket, TI113X_SYSTEM_CONTROL, ti_sysctl(socket)); 192 config_writel(socket, TI122X_MFUNC, ti_mfunc(socket)); 193 config_writeb(socket, TI113X_CARD_CONTROL, ti_cardctl(socket)); 194 config_writeb(socket, TI113X_DEVICE_CONTROL, ti_devctl(socket)); 195 config_writeb(socket, TI1250_DIAGNOSTIC, ti_diag(socket)); 196 197 if (socket->dev->vendor == PCI_VENDOR_ID_ENE) 198 config_writeb(socket, ENE_TEST_C9, ene_test_c9(socket)); 199 } 200 201 /* 202 * Zoom video control for TI122x/113x chips 203 */ 204 205 static void ti_zoom_video(struct pcmcia_socket *sock, int onoff) 206 { 207 u8 reg; 208 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 209 210 /* If we don't have a Zoom Video switch this is harmless, 211 we just tristate the unused (ZV) lines */ 212 reg = config_readb(socket, TI113X_CARD_CONTROL); 213 if (onoff) 214 /* Zoom zoom, we will all go together, zoom zoom, zoom zoom */ 215 reg |= TI113X_CCR_ZVENABLE; 216 else 217 reg &= ~TI113X_CCR_ZVENABLE; 218 config_writeb(socket, TI113X_CARD_CONTROL, reg); 219 } 220 221 /* 222 * The 145x series can also use this. They have an additional 223 * ZV autodetect mode we don't use but don't actually need. 224 * FIXME: manual says its in func0 and func1 but disagrees with 225 * itself about this - do we need to force func0, if so we need 226 * to know a lot more about socket pairings in pcmcia_socket than 227 * we do now.. uggh. 228 */ 229 230 static void ti1250_zoom_video(struct pcmcia_socket *sock, int onoff) 231 { 232 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 233 int shift = 0; 234 u8 reg; 235 236 ti_zoom_video(sock, onoff); 237 238 reg = config_readb(socket, TI1250_MULTIMEDIA_CTL); 239 reg |= TI1250_MMC_ZVOUTEN; /* ZV bus enable */ 240 241 if(PCI_FUNC(socket->dev->devfn)==1) 242 shift = 1; 243 244 if(onoff) 245 { 246 reg &= ~(1<<6); /* Clear select bit */ 247 reg |= shift<<6; /* Favour our socket */ 248 reg |= 1<<shift; /* Socket zoom video on */ 249 } 250 else 251 { 252 reg &= ~(1<<6); /* Clear select bit */ 253 reg |= (1^shift)<<6; /* Favour other socket */ 254 reg &= ~(1<<shift); /* Socket zoon video off */ 255 } 256 257 config_writeb(socket, TI1250_MULTIMEDIA_CTL, reg); 258 } 259 260 static void ti_set_zv(struct yenta_socket *socket) 261 { 262 if(socket->dev->vendor == PCI_VENDOR_ID_TI) 263 { 264 switch(socket->dev->device) 265 { 266 /* There may be more .. */ 267 case PCI_DEVICE_ID_TI_1220: 268 case PCI_DEVICE_ID_TI_1221: 269 case PCI_DEVICE_ID_TI_1225: 270 case PCI_DEVICE_ID_TI_4510: 271 socket->socket.zoom_video = ti_zoom_video; 272 break; 273 case PCI_DEVICE_ID_TI_1250: 274 case PCI_DEVICE_ID_TI_1251A: 275 case PCI_DEVICE_ID_TI_1251B: 276 case PCI_DEVICE_ID_TI_1450: 277 socket->socket.zoom_video = ti1250_zoom_video; 278 } 279 } 280 } 281 282 283 /* 284 * Generic TI init - TI has an extension for the 285 * INTCTL register that sets the PCI CSC interrupt. 286 * Make sure we set it correctly at open and init 287 * time 288 * - override: disable the PCI CSC interrupt. This makes 289 * it possible to use the CSC interrupt to probe the 290 * ISA interrupts. 291 * - init: set the interrupt to match our PCI state. 292 * This makes us correctly get PCI CSC interrupt 293 * events. 294 */ 295 static int ti_init(struct yenta_socket *socket) 296 { 297 u8 new, reg = exca_readb(socket, I365_INTCTL); 298 299 new = reg & ~I365_INTR_ENA; 300 if (socket->cb_irq) 301 new |= I365_INTR_ENA; 302 if (new != reg) 303 exca_writeb(socket, I365_INTCTL, new); 304 return 0; 305 } 306 307 static int ti_override(struct yenta_socket *socket) 308 { 309 u8 new, reg = exca_readb(socket, I365_INTCTL); 310 311 new = reg & ~I365_INTR_ENA; 312 if (new != reg) 313 exca_writeb(socket, I365_INTCTL, new); 314 315 ti_set_zv(socket); 316 317 return 0; 318 } 319 320 static int ti113x_override(struct yenta_socket *socket) 321 { 322 u8 cardctl; 323 324 cardctl = config_readb(socket, TI113X_CARD_CONTROL); 325 cardctl &= ~(TI113X_CCR_PCI_IRQ_ENA | TI113X_CCR_PCI_IREQ | TI113X_CCR_PCI_CSC); 326 if (socket->cb_irq) 327 cardctl |= TI113X_CCR_PCI_IRQ_ENA | TI113X_CCR_PCI_CSC | TI113X_CCR_PCI_IREQ; 328 config_writeb(socket, TI113X_CARD_CONTROL, cardctl); 329 330 return ti_override(socket); 331 } 332 333 334 /* irqrouting for func0, probes PCI interrupt and ISA interrupts */ 335 static void ti12xx_irqroute_func0(struct yenta_socket *socket) 336 { 337 u32 mfunc, mfunc_old, devctl; 338 u8 gpio3, gpio3_old; 339 int pci_irq_status; 340 341 mfunc = mfunc_old = config_readl(socket, TI122X_MFUNC); 342 devctl = config_readb(socket, TI113X_DEVICE_CONTROL); 343 printk(KERN_INFO "Yenta TI: socket %s, mfunc 0x%08x, devctl 0x%02x\n", 344 pci_name(socket->dev), mfunc, devctl); 345 346 /* make sure PCI interrupts are enabled before probing */ 347 ti_init(socket); 348 349 /* test PCI interrupts first. only try fixing if return value is 0! */ 350 pci_irq_status = yenta_probe_cb_irq(socket); 351 if (pci_irq_status) 352 goto out; 353 354 /* 355 * We're here which means PCI interrupts are _not_ delivered. try to 356 * find the right setting (all serial or parallel) 357 */ 358 printk(KERN_INFO "Yenta TI: socket %s probing PCI interrupt failed, trying to fix\n", 359 pci_name(socket->dev)); 360 361 /* for serial PCI make sure MFUNC3 is set to IRQSER */ 362 if ((devctl & TI113X_DCR_IMODE_MASK) == TI12XX_DCR_IMODE_ALL_SERIAL) { 363 switch (socket->dev->device) { 364 case PCI_DEVICE_ID_TI_1250: 365 case PCI_DEVICE_ID_TI_1251A: 366 case PCI_DEVICE_ID_TI_1251B: 367 case PCI_DEVICE_ID_TI_1450: 368 case PCI_DEVICE_ID_TI_1451A: 369 case PCI_DEVICE_ID_TI_4450: 370 case PCI_DEVICE_ID_TI_4451: 371 /* these chips have no IRQSER setting in MFUNC3 */ 372 break; 373 374 default: 375 mfunc = (mfunc & ~TI122X_MFUNC3_MASK) | TI122X_MFUNC3_IRQSER; 376 377 /* write down if changed, probe */ 378 if (mfunc != mfunc_old) { 379 config_writel(socket, TI122X_MFUNC, mfunc); 380 381 pci_irq_status = yenta_probe_cb_irq(socket); 382 if (pci_irq_status == 1) { 383 printk(KERN_INFO "Yenta TI: socket %s all-serial interrupts ok\n", 384 pci_name(socket->dev)); 385 mfunc_old = mfunc; 386 goto out; 387 } 388 389 /* not working, back to old value */ 390 mfunc = mfunc_old; 391 config_writel(socket, TI122X_MFUNC, mfunc); 392 393 if (pci_irq_status == -1) 394 goto out; 395 } 396 } 397 398 /* serial PCI interrupts not working fall back to parallel */ 399 printk(KERN_INFO "Yenta TI: socket %s falling back to parallel PCI interrupts\n", 400 pci_name(socket->dev)); 401 devctl &= ~TI113X_DCR_IMODE_MASK; 402 devctl |= TI113X_DCR_IMODE_SERIAL; /* serial ISA could be right */ 403 config_writeb(socket, TI113X_DEVICE_CONTROL, devctl); 404 } 405 406 /* parallel PCI interrupts: route INTA */ 407 switch (socket->dev->device) { 408 case PCI_DEVICE_ID_TI_1250: 409 case PCI_DEVICE_ID_TI_1251A: 410 case PCI_DEVICE_ID_TI_1251B: 411 case PCI_DEVICE_ID_TI_1450: 412 /* make sure GPIO3 is set to INTA */ 413 gpio3 = gpio3_old = config_readb(socket, TI1250_GPIO3_CONTROL); 414 gpio3 &= ~TI1250_GPIO_MODE_MASK; 415 if (gpio3 != gpio3_old) 416 config_writeb(socket, TI1250_GPIO3_CONTROL, gpio3); 417 break; 418 419 default: 420 gpio3 = gpio3_old = 0; 421 422 mfunc = (mfunc & ~TI122X_MFUNC0_MASK) | TI122X_MFUNC0_INTA; 423 if (mfunc != mfunc_old) 424 config_writel(socket, TI122X_MFUNC, mfunc); 425 } 426 427 /* time to probe again */ 428 pci_irq_status = yenta_probe_cb_irq(socket); 429 if (pci_irq_status == 1) { 430 mfunc_old = mfunc; 431 printk(KERN_INFO "Yenta TI: socket %s parallel PCI interrupts ok\n", 432 pci_name(socket->dev)); 433 } else { 434 /* not working, back to old value */ 435 mfunc = mfunc_old; 436 config_writel(socket, TI122X_MFUNC, mfunc); 437 if (gpio3 != gpio3_old) 438 config_writeb(socket, TI1250_GPIO3_CONTROL, gpio3_old); 439 } 440 441 out: 442 if (pci_irq_status < 1) { 443 socket->cb_irq = 0; 444 printk(KERN_INFO "Yenta TI: socket %s no PCI interrupts. Fish. Please report.\n", 445 pci_name(socket->dev)); 446 } 447 } 448 449 450 /* changes the irq of func1 to match that of func0 */ 451 static int ti12xx_align_irqs(struct yenta_socket *socket, int *old_irq) 452 { 453 struct pci_dev *func0; 454 455 /* find func0 device */ 456 func0 = pci_get_slot(socket->dev->bus, socket->dev->devfn & ~0x07); 457 if (!func0) 458 return 0; 459 460 if (old_irq) 461 *old_irq = socket->cb_irq; 462 socket->cb_irq = socket->dev->irq = func0->irq; 463 464 pci_dev_put(func0); 465 466 return 1; 467 } 468 469 /* 470 * ties INTA and INTB together. also changes the devices irq to that of 471 * the function 0 device. call from func1 only. 472 * returns 1 if INTRTIE changed, 0 otherwise. 473 */ 474 static int ti12xx_tie_interrupts(struct yenta_socket *socket, int *old_irq) 475 { 476 u32 sysctl; 477 int ret; 478 479 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 480 if (sysctl & TI122X_SCR_INTRTIE) 481 return 0; 482 483 /* align */ 484 ret = ti12xx_align_irqs(socket, old_irq); 485 if (!ret) 486 return 0; 487 488 /* tie */ 489 sysctl |= TI122X_SCR_INTRTIE; 490 config_writel(socket, TI113X_SYSTEM_CONTROL, sysctl); 491 492 return 1; 493 } 494 495 /* undo what ti12xx_tie_interrupts() did */ 496 static void ti12xx_untie_interrupts(struct yenta_socket *socket, int old_irq) 497 { 498 u32 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 499 sysctl &= ~TI122X_SCR_INTRTIE; 500 config_writel(socket, TI113X_SYSTEM_CONTROL, sysctl); 501 502 socket->cb_irq = socket->dev->irq = old_irq; 503 } 504 505 /* 506 * irqrouting for func1, plays with INTB routing 507 * only touches MFUNC for INTB routing. all other bits are taken 508 * care of in func0 already. 509 */ 510 static void ti12xx_irqroute_func1(struct yenta_socket *socket) 511 { 512 u32 mfunc, mfunc_old, devctl, sysctl; 513 int pci_irq_status; 514 515 mfunc = mfunc_old = config_readl(socket, TI122X_MFUNC); 516 devctl = config_readb(socket, TI113X_DEVICE_CONTROL); 517 printk(KERN_INFO "Yenta TI: socket %s, mfunc 0x%08x, devctl 0x%02x\n", 518 pci_name(socket->dev), mfunc, devctl); 519 520 /* if IRQs are configured as tied, align irq of func1 with func0 */ 521 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 522 if (sysctl & TI122X_SCR_INTRTIE) 523 ti12xx_align_irqs(socket, NULL); 524 525 /* make sure PCI interrupts are enabled before probing */ 526 ti_init(socket); 527 528 /* test PCI interrupts first. only try fixing if return value is 0! */ 529 pci_irq_status = yenta_probe_cb_irq(socket); 530 if (pci_irq_status) 531 goto out; 532 533 /* 534 * We're here which means PCI interrupts are _not_ delivered. try to 535 * find the right setting 536 */ 537 printk(KERN_INFO "Yenta TI: socket %s probing PCI interrupt failed, trying to fix\n", 538 pci_name(socket->dev)); 539 540 541 /* if all serial: set INTRTIE, probe again */ 542 if ((devctl & TI113X_DCR_IMODE_MASK) == TI12XX_DCR_IMODE_ALL_SERIAL) { 543 int old_irq; 544 545 if (ti12xx_tie_interrupts(socket, &old_irq)) { 546 pci_irq_status = yenta_probe_cb_irq(socket); 547 if (pci_irq_status == 1) { 548 printk(KERN_INFO "Yenta TI: socket %s all-serial interrupts, tied ok\n", 549 pci_name(socket->dev)); 550 goto out; 551 } 552 553 ti12xx_untie_interrupts(socket, old_irq); 554 } 555 } 556 /* parallel PCI: route INTB, probe again */ 557 else { 558 int old_irq; 559 560 switch (socket->dev->device) { 561 case PCI_DEVICE_ID_TI_1250: 562 /* the 1250 has one pin for IRQSER/INTB depending on devctl */ 563 break; 564 565 case PCI_DEVICE_ID_TI_1251A: 566 case PCI_DEVICE_ID_TI_1251B: 567 case PCI_DEVICE_ID_TI_1450: 568 /* 569 * those have a pin for IRQSER/INTB plus INTB in MFUNC0 570 * we alread probed the shared pin, now go for MFUNC0 571 */ 572 mfunc = (mfunc & ~TI122X_MFUNC0_MASK) | TI125X_MFUNC0_INTB; 573 break; 574 575 default: 576 mfunc = (mfunc & ~TI122X_MFUNC1_MASK) | TI122X_MFUNC1_INTB; 577 break; 578 } 579 580 /* write, probe */ 581 if (mfunc != mfunc_old) { 582 config_writel(socket, TI122X_MFUNC, mfunc); 583 584 pci_irq_status = yenta_probe_cb_irq(socket); 585 if (pci_irq_status == 1) { 586 printk(KERN_INFO "Yenta TI: socket %s parallel PCI interrupts ok\n", 587 pci_name(socket->dev)); 588 goto out; 589 } 590 591 mfunc = mfunc_old; 592 config_writel(socket, TI122X_MFUNC, mfunc); 593 594 if (pci_irq_status == -1) 595 goto out; 596 } 597 598 /* still nothing: set INTRTIE */ 599 if (ti12xx_tie_interrupts(socket, &old_irq)) { 600 pci_irq_status = yenta_probe_cb_irq(socket); 601 if (pci_irq_status == 1) { 602 printk(KERN_INFO "Yenta TI: socket %s parallel PCI interrupts, tied ok\n", 603 pci_name(socket->dev)); 604 goto out; 605 } 606 607 ti12xx_untie_interrupts(socket, old_irq); 608 } 609 } 610 611 out: 612 if (pci_irq_status < 1) { 613 socket->cb_irq = 0; 614 printk(KERN_INFO "Yenta TI: socket %s no PCI interrupts. Fish. Please report.\n", 615 pci_name(socket->dev)); 616 } 617 } 618 619 620 /* Returns true value if the second slot of a two-slot controller is empty */ 621 static int ti12xx_2nd_slot_empty(struct yenta_socket *socket) 622 { 623 struct pci_dev *func; 624 struct yenta_socket *slot2; 625 int devfn; 626 unsigned int state; 627 int ret = 1; 628 u32 sysctl; 629 630 /* catch the two-slot controllers */ 631 switch (socket->dev->device) { 632 case PCI_DEVICE_ID_TI_1220: 633 case PCI_DEVICE_ID_TI_1221: 634 case PCI_DEVICE_ID_TI_1225: 635 case PCI_DEVICE_ID_TI_1251A: 636 case PCI_DEVICE_ID_TI_1251B: 637 case PCI_DEVICE_ID_TI_1420: 638 case PCI_DEVICE_ID_TI_1450: 639 case PCI_DEVICE_ID_TI_1451A: 640 case PCI_DEVICE_ID_TI_1520: 641 case PCI_DEVICE_ID_TI_1620: 642 case PCI_DEVICE_ID_TI_4520: 643 case PCI_DEVICE_ID_TI_4450: 644 case PCI_DEVICE_ID_TI_4451: 645 /* 646 * there are way more, but they need to be added in yenta_socket.c 647 * and pci_ids.h first anyway. 648 */ 649 break; 650 651 case PCI_DEVICE_ID_TI_X515: 652 case PCI_DEVICE_ID_TI_X420: 653 case PCI_DEVICE_ID_TI_X620: 654 case PCI_DEVICE_ID_TI_XX21_XX11: 655 case PCI_DEVICE_ID_TI_7410: 656 case PCI_DEVICE_ID_TI_7610: 657 /* 658 * those are either single or dual slot CB with additional functions 659 * like 1394, smartcard reader, etc. check the TIEALL flag for them 660 * the TIEALL flag binds the IRQ of all functions toghether. 661 * we catch the single slot variants later. 662 */ 663 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 664 if (sysctl & TIXX21_SCR_TIEALL) 665 return 0; 666 667 break; 668 669 /* single-slot controllers have the 2nd slot empty always :) */ 670 default: 671 return 1; 672 } 673 674 /* get other slot */ 675 devfn = socket->dev->devfn & ~0x07; 676 func = pci_get_slot(socket->dev->bus, 677 (socket->dev->devfn & 0x07) ? devfn : devfn | 0x01); 678 if (!func) 679 return 1; 680 681 /* 682 * check that the device id of both slots match. this is needed for the 683 * XX21 and the XX11 controller that share the same device id for single 684 * and dual slot controllers. return '2nd slot empty'. we already checked 685 * if the interrupt is tied to another function. 686 */ 687 if (socket->dev->device != func->device) 688 goto out; 689 690 slot2 = pci_get_drvdata(func); 691 if (!slot2) 692 goto out; 693 694 /* check state */ 695 yenta_get_status(&socket->socket, &state); 696 if (state & SS_DETECT) { 697 ret = 0; 698 goto out; 699 } 700 701 out: 702 pci_dev_put(func); 703 return ret; 704 } 705 706 /* 707 * TI specifiy parts for the power hook. 708 * 709 * some TI's with some CB's produces interrupt storm on power on. it has been 710 * seen with atheros wlan cards on TI1225 and TI1410. solution is simply to 711 * disable any CB interrupts during this time. 712 */ 713 static int ti12xx_power_hook(struct pcmcia_socket *sock, int operation) 714 { 715 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 716 u32 mfunc, devctl, sysctl; 717 u8 gpio3; 718 719 /* only POWER_PRE and POWER_POST are interesting */ 720 if ((operation != HOOK_POWER_PRE) && (operation != HOOK_POWER_POST)) 721 return 0; 722 723 devctl = config_readb(socket, TI113X_DEVICE_CONTROL); 724 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 725 mfunc = config_readl(socket, TI122X_MFUNC); 726 727 /* 728 * all serial/tied: only disable when modparm set. always doing it 729 * would mean a regression for working setups 'cos it disables the 730 * interrupts for both both slots on 2-slot controllers 731 * (and users of single slot controllers where it's save have to 732 * live with setting the modparm, most don't have to anyway) 733 */ 734 if (((devctl & TI113X_DCR_IMODE_MASK) == TI12XX_DCR_IMODE_ALL_SERIAL) && 735 (pwr_irqs_off || ti12xx_2nd_slot_empty(socket))) { 736 switch (socket->dev->device) { 737 case PCI_DEVICE_ID_TI_1250: 738 case PCI_DEVICE_ID_TI_1251A: 739 case PCI_DEVICE_ID_TI_1251B: 740 case PCI_DEVICE_ID_TI_1450: 741 case PCI_DEVICE_ID_TI_1451A: 742 case PCI_DEVICE_ID_TI_4450: 743 case PCI_DEVICE_ID_TI_4451: 744 /* these chips have no IRQSER setting in MFUNC3 */ 745 break; 746 747 default: 748 if (operation == HOOK_POWER_PRE) 749 mfunc = (mfunc & ~TI122X_MFUNC3_MASK); 750 else 751 mfunc = (mfunc & ~TI122X_MFUNC3_MASK) | TI122X_MFUNC3_IRQSER; 752 } 753 754 return 0; 755 } 756 757 /* do the job differently for func0/1 */ 758 if ((PCI_FUNC(socket->dev->devfn) == 0) || 759 ((sysctl & TI122X_SCR_INTRTIE) && 760 (pwr_irqs_off || ti12xx_2nd_slot_empty(socket)))) { 761 /* some bridges are different */ 762 switch (socket->dev->device) { 763 case PCI_DEVICE_ID_TI_1250: 764 case PCI_DEVICE_ID_TI_1251A: 765 case PCI_DEVICE_ID_TI_1251B: 766 case PCI_DEVICE_ID_TI_1450: 767 /* those oldies use gpio3 for INTA */ 768 gpio3 = config_readb(socket, TI1250_GPIO3_CONTROL); 769 if (operation == HOOK_POWER_PRE) 770 gpio3 = (gpio3 & ~TI1250_GPIO_MODE_MASK) | 0x40; 771 else 772 gpio3 &= ~TI1250_GPIO_MODE_MASK; 773 config_writeb(socket, TI1250_GPIO3_CONTROL, gpio3); 774 break; 775 776 default: 777 /* all new bridges are the same */ 778 if (operation == HOOK_POWER_PRE) 779 mfunc &= ~TI122X_MFUNC0_MASK; 780 else 781 mfunc |= TI122X_MFUNC0_INTA; 782 config_writel(socket, TI122X_MFUNC, mfunc); 783 } 784 } else { 785 switch (socket->dev->device) { 786 case PCI_DEVICE_ID_TI_1251A: 787 case PCI_DEVICE_ID_TI_1251B: 788 case PCI_DEVICE_ID_TI_1450: 789 /* those have INTA elsewhere and INTB in MFUNC0 */ 790 if (operation == HOOK_POWER_PRE) 791 mfunc &= ~TI122X_MFUNC0_MASK; 792 else 793 mfunc |= TI125X_MFUNC0_INTB; 794 config_writel(socket, TI122X_MFUNC, mfunc); 795 796 break; 797 798 default: 799 /* all new bridges are the same */ 800 if (operation == HOOK_POWER_PRE) 801 mfunc &= ~TI122X_MFUNC1_MASK; 802 else 803 mfunc |= TI122X_MFUNC1_INTB; 804 config_writel(socket, TI122X_MFUNC, mfunc); 805 } 806 } 807 808 return 0; 809 } 810 811 static int ti12xx_override(struct yenta_socket *socket) 812 { 813 u32 val, val_orig; 814 815 /* make sure that memory burst is active */ 816 val_orig = val = config_readl(socket, TI113X_SYSTEM_CONTROL); 817 if (disable_clkrun && PCI_FUNC(socket->dev->devfn) == 0) { 818 printk(KERN_INFO "Yenta: Disabling CLKRUN feature\n"); 819 val |= TI113X_SCR_KEEPCLK; 820 } 821 if (!(val & TI122X_SCR_MRBURSTUP)) { 822 printk(KERN_INFO "Yenta: Enabling burst memory read transactions\n"); 823 val |= TI122X_SCR_MRBURSTUP; 824 } 825 if (val_orig != val) 826 config_writel(socket, TI113X_SYSTEM_CONTROL, val); 827 828 /* 829 * Yenta expects controllers to use CSCINT to route 830 * CSC interrupts to PCI rather than INTVAL. 831 */ 832 val = config_readb(socket, TI1250_DIAGNOSTIC); 833 printk(KERN_INFO "Yenta: Using %s to route CSC interrupts to PCI\n", 834 (val & TI1250_DIAG_PCI_CSC) ? "CSCINT" : "INTVAL"); 835 printk(KERN_INFO "Yenta: Routing CardBus interrupts to %s\n", 836 (val & TI1250_DIAG_PCI_IREQ) ? "PCI" : "ISA"); 837 838 /* do irqrouting, depending on function */ 839 if (PCI_FUNC(socket->dev->devfn) == 0) 840 ti12xx_irqroute_func0(socket); 841 else 842 ti12xx_irqroute_func1(socket); 843 844 /* install power hook */ 845 socket->socket.power_hook = ti12xx_power_hook; 846 847 return ti_override(socket); 848 } 849 850 851 static int ti1250_override(struct yenta_socket *socket) 852 { 853 u8 old, diag; 854 855 old = config_readb(socket, TI1250_DIAGNOSTIC); 856 diag = old & ~(TI1250_DIAG_PCI_CSC | TI1250_DIAG_PCI_IREQ); 857 if (socket->cb_irq) 858 diag |= TI1250_DIAG_PCI_CSC | TI1250_DIAG_PCI_IREQ; 859 860 if (diag != old) { 861 printk(KERN_INFO "Yenta: adjusting diagnostic: %02x -> %02x\n", 862 old, diag); 863 config_writeb(socket, TI1250_DIAGNOSTIC, diag); 864 } 865 866 return ti12xx_override(socket); 867 } 868 869 870 /** 871 * EnE specific part. EnE bridges are register compatible with TI bridges but 872 * have their own test registers and more important their own little problems. 873 * Some fixup code to make everybody happy (TM). 874 */ 875 876 #ifdef CONFIG_YENTA_ENE_TUNE 877 /** 878 * set/clear various test bits: 879 * Defaults to clear the bit. 880 * - mask (u8) defines what bits to change 881 * - bits (u8) is the values to change them to 882 * -> it's 883 * current = (current & ~mask) | bits 884 */ 885 /* pci ids of devices that wants to have the bit set */ 886 #define DEVID(_vend,_dev,_subvend,_subdev,mask,bits) { \ 887 .vendor = _vend, \ 888 .device = _dev, \ 889 .subvendor = _subvend, \ 890 .subdevice = _subdev, \ 891 .driver_data = ((mask) << 8 | (bits)), \ 892 } 893 static struct pci_device_id ene_tune_tbl[] = { 894 /* Echo Audio products based on motorola DSP56301 and DSP56361 */ 895 DEVID(PCI_VENDOR_ID_MOTOROLA, 0x1801, 0xECC0, PCI_ANY_ID, 896 ENE_TEST_C9_TLTENABLE | ENE_TEST_C9_PFENABLE, ENE_TEST_C9_TLTENABLE), 897 DEVID(PCI_VENDOR_ID_MOTOROLA, 0x3410, 0xECC0, PCI_ANY_ID, 898 ENE_TEST_C9_TLTENABLE | ENE_TEST_C9_PFENABLE, ENE_TEST_C9_TLTENABLE), 899 900 {} 901 }; 902 903 static void ene_tune_bridge(struct pcmcia_socket *sock, struct pci_bus *bus) 904 { 905 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 906 struct pci_dev *dev; 907 struct pci_device_id *id = NULL; 908 u8 test_c9, old_c9, mask, bits; 909 910 list_for_each_entry(dev, &bus->devices, bus_list) { 911 id = (struct pci_device_id *) pci_match_id(ene_tune_tbl, dev); 912 if (id) 913 break; 914 } 915 916 test_c9 = old_c9 = config_readb(socket, ENE_TEST_C9); 917 if (id) { 918 mask = (id->driver_data >> 8) & 0xFF; 919 bits = id->driver_data & 0xFF; 920 921 test_c9 = (test_c9 & ~mask) | bits; 922 } 923 else 924 /* default to clear TLTEnable bit, old behaviour */ 925 test_c9 &= ~ENE_TEST_C9_TLTENABLE; 926 927 printk(KERN_INFO "yenta EnE: chaning testregister 0xC9, %02x -> %02x\n", old_c9, test_c9); 928 config_writeb(socket, ENE_TEST_C9, test_c9); 929 } 930 931 static int ene_override(struct yenta_socket *socket) 932 { 933 /* install tune_bridge() function */ 934 socket->socket.tune_bridge = ene_tune_bridge; 935 936 return ti1250_override(socket); 937 } 938 #else 939 # define ene_override ti1250_override 940 #endif /* !CONFIG_YENTA_ENE_TUNE */ 941 942 #endif /* _LINUX_TI113X_H */ 943 944