1 /*====================================================================== 2 3 Device driver for the PCMCIA control functionality of PXA2xx 4 microprocessors. 5 6 The contents of this file may be used under the 7 terms of the GNU Public License version 2 (the "GPL") 8 9 (c) Ian Molton (spyro@f2s.com) 2003 10 (c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4 11 12 derived from sa11xx_base.c 13 14 Portions created by John G. Dorsey are 15 Copyright (C) 1999 John G. Dorsey. 16 17 ======================================================================*/ 18 19 #include <linux/module.h> 20 #include <linux/init.h> 21 #include <linux/cpufreq.h> 22 #include <linux/ioport.h> 23 #include <linux/kernel.h> 24 #include <linux/spinlock.h> 25 #include <linux/platform_device.h> 26 27 #include <mach/hardware.h> 28 #include <asm/io.h> 29 #include <asm/irq.h> 30 #include <asm/system.h> 31 #include <mach/pxa2xx-regs.h> 32 #include <asm/mach-types.h> 33 34 #include <pcmcia/cs_types.h> 35 #include <pcmcia/ss.h> 36 #include <pcmcia/cistpl.h> 37 38 #include "soc_common.h" 39 #include "pxa2xx_base.h" 40 41 42 #define MCXX_SETUP_MASK (0x7f) 43 #define MCXX_ASST_MASK (0x1f) 44 #define MCXX_HOLD_MASK (0x3f) 45 #define MCXX_SETUP_SHIFT (0) 46 #define MCXX_ASST_SHIFT (7) 47 #define MCXX_HOLD_SHIFT (14) 48 49 static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns, 50 u_int mem_clk_10khz) 51 { 52 u_int code = pcmcia_cycle_ns * mem_clk_10khz; 53 return (code / 300000) + ((code % 300000) ? 1 : 0) - 1; 54 } 55 56 static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns, 57 u_int mem_clk_10khz) 58 { 59 u_int code = pcmcia_cycle_ns * mem_clk_10khz; 60 return (code / 300000) + ((code % 300000) ? 1 : 0) + 1; 61 } 62 63 static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns, 64 u_int mem_clk_10khz) 65 { 66 u_int code = pcmcia_cycle_ns * mem_clk_10khz; 67 return (code / 100000) + ((code % 100000) ? 1 : 0) - 1; 68 } 69 70 /* This function returns the (approximate) command assertion period, in 71 * nanoseconds, for a given CPU clock frequency and MCXX_ASST value: 72 */ 73 static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz, 74 u_int pcmcia_mcxx_asst) 75 { 76 return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz); 77 } 78 79 static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock ) 80 { 81 MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock) 82 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) 83 | ((pxa2xx_mcxx_asst(speed, clock) 84 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) 85 | ((pxa2xx_mcxx_hold(speed, clock) 86 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); 87 88 return 0; 89 } 90 91 static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock ) 92 { 93 MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock) 94 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) 95 | ((pxa2xx_mcxx_asst(speed, clock) 96 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) 97 | ((pxa2xx_mcxx_hold(speed, clock) 98 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); 99 100 return 0; 101 } 102 103 static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock ) 104 { 105 MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock) 106 & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) 107 | ((pxa2xx_mcxx_asst(speed, clock) 108 & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) 109 | ((pxa2xx_mcxx_hold(speed, clock) 110 & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); 111 112 return 0; 113 } 114 115 static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk) 116 { 117 struct soc_pcmcia_timing timing; 118 int sock = skt->nr; 119 120 soc_common_pcmcia_get_timing(skt, &timing); 121 122 pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk); 123 pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk); 124 pxa2xx_pcmcia_set_mcio(sock, timing.io, clk); 125 126 return 0; 127 } 128 129 static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt) 130 { 131 unsigned int clk = get_memclk_frequency_10khz(); 132 return pxa2xx_pcmcia_set_mcxx(skt, clk); 133 } 134 135 #ifdef CONFIG_CPU_FREQ 136 137 static int 138 pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt, 139 unsigned long val, 140 struct cpufreq_freqs *freqs) 141 { 142 #warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock" 143 switch (val) { 144 case CPUFREQ_PRECHANGE: 145 if (freqs->new > freqs->old) { 146 debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, " 147 "pre-updating\n", 148 freqs->new / 1000, (freqs->new / 100) % 10, 149 freqs->old / 1000, (freqs->old / 100) % 10); 150 pxa2xx_pcmcia_set_mcxx(skt, freqs->new); 151 } 152 break; 153 154 case CPUFREQ_POSTCHANGE: 155 if (freqs->new < freqs->old) { 156 debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, " 157 "post-updating\n", 158 freqs->new / 1000, (freqs->new / 100) % 10, 159 freqs->old / 1000, (freqs->old / 100) % 10); 160 pxa2xx_pcmcia_set_mcxx(skt, freqs->new); 161 } 162 break; 163 } 164 return 0; 165 } 166 #endif 167 168 static void pxa2xx_configure_sockets(struct device *dev) 169 { 170 struct pcmcia_low_level *ops = dev->platform_data; 171 172 /* 173 * We have at least one socket, so set MECR:CIT 174 * (Card Is There) 175 */ 176 MECR |= MECR_CIT; 177 178 /* Set MECR:NOS (Number Of Sockets) */ 179 if (ops->nr > 1 || machine_is_viper()) 180 MECR |= MECR_NOS; 181 else 182 MECR &= ~MECR_NOS; 183 } 184 185 int __pxa2xx_drv_pcmcia_probe(struct device *dev) 186 { 187 int ret; 188 struct pcmcia_low_level *ops; 189 190 if (!dev || !dev->platform_data) 191 return -ENODEV; 192 193 ops = (struct pcmcia_low_level *)dev->platform_data; 194 195 /* Provide our PXA2xx specific timing routines. */ 196 ops->set_timing = pxa2xx_pcmcia_set_timing; 197 #ifdef CONFIG_CPU_FREQ 198 ops->frequency_change = pxa2xx_pcmcia_frequency_change; 199 #endif 200 201 ret = soc_common_drv_pcmcia_probe(dev, ops, ops->first, ops->nr); 202 203 if (!ret) 204 pxa2xx_configure_sockets(dev); 205 206 return ret; 207 } 208 EXPORT_SYMBOL(__pxa2xx_drv_pcmcia_probe); 209 210 211 static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev) 212 { 213 return __pxa2xx_drv_pcmcia_probe(&dev->dev); 214 } 215 216 static int pxa2xx_drv_pcmcia_remove(struct platform_device *dev) 217 { 218 return soc_common_drv_pcmcia_remove(&dev->dev); 219 } 220 221 static int pxa2xx_drv_pcmcia_suspend(struct platform_device *dev, pm_message_t state) 222 { 223 return pcmcia_socket_dev_suspend(&dev->dev, state); 224 } 225 226 static int pxa2xx_drv_pcmcia_resume(struct platform_device *dev) 227 { 228 pxa2xx_configure_sockets(&dev->dev); 229 return pcmcia_socket_dev_resume(&dev->dev); 230 } 231 232 static struct platform_driver pxa2xx_pcmcia_driver = { 233 .probe = pxa2xx_drv_pcmcia_probe, 234 .remove = pxa2xx_drv_pcmcia_remove, 235 .suspend = pxa2xx_drv_pcmcia_suspend, 236 .resume = pxa2xx_drv_pcmcia_resume, 237 .driver = { 238 .name = "pxa2xx-pcmcia", 239 .owner = THIS_MODULE, 240 }, 241 }; 242 243 static int __init pxa2xx_pcmcia_init(void) 244 { 245 return platform_driver_register(&pxa2xx_pcmcia_driver); 246 } 247 248 static void __exit pxa2xx_pcmcia_exit(void) 249 { 250 platform_driver_unregister(&pxa2xx_pcmcia_driver); 251 } 252 253 fs_initcall(pxa2xx_pcmcia_init); 254 module_exit(pxa2xx_pcmcia_exit); 255 256 MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>"); 257 MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver"); 258 MODULE_LICENSE("GPL"); 259 MODULE_ALIAS("platform:pxa2xx-pcmcia"); 260