11da177e4SLinus Torvalds /* 21da177e4SLinus Torvalds * i82365.h 1.15 1999/10/25 20:03:34 31da177e4SLinus Torvalds * 41da177e4SLinus Torvalds * The contents of this file are subject to the Mozilla Public License 51da177e4SLinus Torvalds * Version 1.1 (the "License"); you may not use this file except in 61da177e4SLinus Torvalds * compliance with the License. You may obtain a copy of the License 71da177e4SLinus Torvalds * at http://www.mozilla.org/MPL/ 81da177e4SLinus Torvalds * 91da177e4SLinus Torvalds * Software distributed under the License is distributed on an "AS IS" 101da177e4SLinus Torvalds * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See 111da177e4SLinus Torvalds * the License for the specific language governing rights and 121da177e4SLinus Torvalds * limitations under the License. 131da177e4SLinus Torvalds * 141da177e4SLinus Torvalds * The initial developer of the original code is David A. Hinds 151da177e4SLinus Torvalds * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds 161da177e4SLinus Torvalds * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. 171da177e4SLinus Torvalds * 181da177e4SLinus Torvalds * Alternatively, the contents of this file may be used under the 191da177e4SLinus Torvalds * terms of the GNU General Public License version 2 (the "GPL"), in which 201da177e4SLinus Torvalds * case the provisions of the GPL are applicable instead of the 211da177e4SLinus Torvalds * above. If you wish to allow the use of your version of this file 221da177e4SLinus Torvalds * only under the terms of the GPL and not to allow others to use 231da177e4SLinus Torvalds * your version of this file under the MPL, indicate your decision by 241da177e4SLinus Torvalds * deleting the provisions above and replace them with the notice and 251da177e4SLinus Torvalds * other provisions required by the GPL. If you do not delete the 261da177e4SLinus Torvalds * provisions above, a recipient may use your version of this file 271da177e4SLinus Torvalds * under either the MPL or the GPL. 281da177e4SLinus Torvalds */ 291da177e4SLinus Torvalds 301da177e4SLinus Torvalds #ifndef _LINUX_I82365_H 311da177e4SLinus Torvalds #define _LINUX_I82365_H 321da177e4SLinus Torvalds 331da177e4SLinus Torvalds /* register definitions for the Intel 82365SL PCMCIA controller */ 341da177e4SLinus Torvalds 351da177e4SLinus Torvalds /* Offsets for PCIC registers */ 361da177e4SLinus Torvalds #define I365_IDENT 0x00 /* Identification and revision */ 371da177e4SLinus Torvalds #define I365_STATUS 0x01 /* Interface status */ 381da177e4SLinus Torvalds #define I365_POWER 0x02 /* Power and RESETDRV control */ 391da177e4SLinus Torvalds #define I365_INTCTL 0x03 /* Interrupt and general control */ 401da177e4SLinus Torvalds #define I365_CSC 0x04 /* Card status change */ 411da177e4SLinus Torvalds #define I365_CSCINT 0x05 /* Card status change interrupt control */ 421da177e4SLinus Torvalds #define I365_ADDRWIN 0x06 /* Address window enable */ 431da177e4SLinus Torvalds #define I365_IOCTL 0x07 /* I/O control */ 441da177e4SLinus Torvalds #define I365_GENCTL 0x16 /* Card detect and general control */ 451da177e4SLinus Torvalds #define I365_GBLCTL 0x1E /* Global control register */ 461da177e4SLinus Torvalds 471da177e4SLinus Torvalds /* Offsets for I/O and memory window registers */ 481da177e4SLinus Torvalds #define I365_IO(map) (0x08+((map)<<2)) 491da177e4SLinus Torvalds #define I365_MEM(map) (0x10+((map)<<3)) 501da177e4SLinus Torvalds #define I365_W_START 0 511da177e4SLinus Torvalds #define I365_W_STOP 2 521da177e4SLinus Torvalds #define I365_W_OFF 4 531da177e4SLinus Torvalds 541da177e4SLinus Torvalds /* Flags for I365_STATUS */ 551da177e4SLinus Torvalds #define I365_CS_BVD1 0x01 561da177e4SLinus Torvalds #define I365_CS_STSCHG 0x01 571da177e4SLinus Torvalds #define I365_CS_BVD2 0x02 581da177e4SLinus Torvalds #define I365_CS_SPKR 0x02 591da177e4SLinus Torvalds #define I365_CS_DETECT 0x0C 601da177e4SLinus Torvalds #define I365_CS_WRPROT 0x10 611da177e4SLinus Torvalds #define I365_CS_READY 0x20 /* Inverted */ 621da177e4SLinus Torvalds #define I365_CS_POWERON 0x40 631da177e4SLinus Torvalds #define I365_CS_GPI 0x80 641da177e4SLinus Torvalds 651da177e4SLinus Torvalds /* Flags for I365_POWER */ 661da177e4SLinus Torvalds #define I365_PWR_OFF 0x00 /* Turn off the socket */ 671da177e4SLinus Torvalds #define I365_PWR_OUT 0x80 /* Output enable */ 681da177e4SLinus Torvalds #define I365_PWR_NORESET 0x40 /* Disable RESETDRV on resume */ 691da177e4SLinus Torvalds #define I365_PWR_AUTO 0x20 /* Auto pwr switch enable */ 701da177e4SLinus Torvalds #define I365_VCC_MASK 0x18 /* Mask for turning off Vcc */ 711da177e4SLinus Torvalds /* There are different layouts for B-step and DF-step chips: the B 721da177e4SLinus Torvalds step has independent Vpp1/Vpp2 control, and the DF step has only 731da177e4SLinus Torvalds Vpp1 control, plus 3V control */ 741da177e4SLinus Torvalds #define I365_VCC_5V 0x10 /* Vcc = 5.0v */ 751da177e4SLinus Torvalds #define I365_VCC_3V 0x18 /* Vcc = 3.3v */ 761da177e4SLinus Torvalds #define I365_VPP2_MASK 0x0c /* Mask for turning off Vpp2 */ 771da177e4SLinus Torvalds #define I365_VPP2_5V 0x04 /* Vpp2 = 5.0v */ 781da177e4SLinus Torvalds #define I365_VPP2_12V 0x08 /* Vpp2 = 12.0v */ 791da177e4SLinus Torvalds #define I365_VPP1_MASK 0x03 /* Mask for turning off Vpp1 */ 80c6958fdbSWolfram Sang #define I365_VPP1_5V 0x01 /* Vpp1 = 5.0v */ 81c6958fdbSWolfram Sang #define I365_VPP1_12V 0x02 /* Vpp1 = 12.0v */ 821da177e4SLinus Torvalds 831da177e4SLinus Torvalds /* Flags for I365_INTCTL */ 841da177e4SLinus Torvalds #define I365_RING_ENA 0x80 851da177e4SLinus Torvalds #define I365_PC_RESET 0x40 861da177e4SLinus Torvalds #define I365_PC_IOCARD 0x20 871da177e4SLinus Torvalds #define I365_INTR_ENA 0x10 881da177e4SLinus Torvalds #define I365_IRQ_MASK 0x0F 891da177e4SLinus Torvalds 901da177e4SLinus Torvalds /* Flags for I365_CSC and I365_CSCINT*/ 911da177e4SLinus Torvalds #define I365_CSC_BVD1 0x01 921da177e4SLinus Torvalds #define I365_CSC_STSCHG 0x01 931da177e4SLinus Torvalds #define I365_CSC_BVD2 0x02 941da177e4SLinus Torvalds #define I365_CSC_READY 0x04 951da177e4SLinus Torvalds #define I365_CSC_DETECT 0x08 961da177e4SLinus Torvalds #define I365_CSC_ANY 0x0F 971da177e4SLinus Torvalds #define I365_CSC_GPI 0x10 9828ca8dd7SJens Künzer #define I365_CSC_IRQ_MASK 0xF0 991da177e4SLinus Torvalds 1001da177e4SLinus Torvalds /* Flags for I365_ADDRWIN */ 1011da177e4SLinus Torvalds #define I365_ENA_IO(map) (0x40 << (map)) 1021da177e4SLinus Torvalds #define I365_ENA_MEM(map) (0x01 << (map)) 1031da177e4SLinus Torvalds 1041da177e4SLinus Torvalds /* Flags for I365_IOCTL */ 1051da177e4SLinus Torvalds #define I365_IOCTL_MASK(map) (0x0F << (map<<2)) 1061da177e4SLinus Torvalds #define I365_IOCTL_WAIT(map) (0x08 << (map<<2)) 1071da177e4SLinus Torvalds #define I365_IOCTL_0WS(map) (0x04 << (map<<2)) 1081da177e4SLinus Torvalds #define I365_IOCTL_IOCS16(map) (0x02 << (map<<2)) 1091da177e4SLinus Torvalds #define I365_IOCTL_16BIT(map) (0x01 << (map<<2)) 1101da177e4SLinus Torvalds 1111da177e4SLinus Torvalds /* Flags for I365_GENCTL */ 1121da177e4SLinus Torvalds #define I365_CTL_16DELAY 0x01 1131da177e4SLinus Torvalds #define I365_CTL_RESET 0x02 1141da177e4SLinus Torvalds #define I365_CTL_GPI_ENA 0x04 1151da177e4SLinus Torvalds #define I365_CTL_GPI_CTL 0x08 1161da177e4SLinus Torvalds #define I365_CTL_RESUME 0x10 1171da177e4SLinus Torvalds #define I365_CTL_SW_IRQ 0x20 1181da177e4SLinus Torvalds 1191da177e4SLinus Torvalds /* Flags for I365_GBLCTL */ 1201da177e4SLinus Torvalds #define I365_GBL_PWRDOWN 0x01 1211da177e4SLinus Torvalds #define I365_GBL_CSC_LEV 0x02 1221da177e4SLinus Torvalds #define I365_GBL_WRBACK 0x04 1231da177e4SLinus Torvalds #define I365_GBL_IRQ_0_LEV 0x08 1241da177e4SLinus Torvalds #define I365_GBL_IRQ_1_LEV 0x10 1251da177e4SLinus Torvalds 1261da177e4SLinus Torvalds /* Flags for memory window registers */ 1271da177e4SLinus Torvalds #define I365_MEM_16BIT 0x8000 /* In memory start high byte */ 1281da177e4SLinus Torvalds #define I365_MEM_0WS 0x4000 1291da177e4SLinus Torvalds #define I365_MEM_WS1 0x8000 /* In memory stop high byte */ 1301da177e4SLinus Torvalds #define I365_MEM_WS0 0x4000 1311da177e4SLinus Torvalds #define I365_MEM_WRPROT 0x8000 /* In offset high byte */ 1321da177e4SLinus Torvalds #define I365_MEM_REG 0x4000 1331da177e4SLinus Torvalds 1341da177e4SLinus Torvalds #define I365_REG(slot, reg) (((slot) << 6) + reg) 1351da177e4SLinus Torvalds 1361da177e4SLinus Torvalds #endif /* _LINUX_I82365_H */ 137