1 /* 2 * Driver for Intel I82092AA PCI-PCMCIA bridge. 3 * 4 * (C) 2001 Red Hat, Inc. 5 * 6 * Author: Arjan Van De Ven <arjanv@redhat.com> 7 * Loosly based on i82365.c from the pcmcia-cs package 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/pci.h> 13 #include <linux/init.h> 14 #include <linux/workqueue.h> 15 #include <linux/interrupt.h> 16 #include <linux/device.h> 17 18 #include <pcmcia/ss.h> 19 20 #include <asm/io.h> 21 22 #include "i82092aa.h" 23 #include "i82365.h" 24 25 MODULE_LICENSE("GPL"); 26 27 /* PCI core routines */ 28 static DEFINE_PCI_DEVICE_TABLE(i82092aa_pci_ids) = { 29 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82092AA_0) }, 30 { } 31 }; 32 MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids); 33 34 static struct pci_driver i82092aa_pci_driver = { 35 .name = "i82092aa", 36 .id_table = i82092aa_pci_ids, 37 .probe = i82092aa_pci_probe, 38 .remove = i82092aa_pci_remove, 39 }; 40 41 42 /* the pccard structure and its functions */ 43 static struct pccard_operations i82092aa_operations = { 44 .init = i82092aa_init, 45 .get_status = i82092aa_get_status, 46 .set_socket = i82092aa_set_socket, 47 .set_io_map = i82092aa_set_io_map, 48 .set_mem_map = i82092aa_set_mem_map, 49 }; 50 51 /* The card can do up to 4 sockets, allocate a structure for each of them */ 52 53 struct socket_info { 54 int number; 55 int card_state; /* 0 = no socket, 56 1 = empty socket, 57 2 = card but not initialized, 58 3 = operational card */ 59 unsigned int io_base; /* base io address of the socket */ 60 61 struct pcmcia_socket socket; 62 struct pci_dev *dev; /* The PCI device for the socket */ 63 }; 64 65 #define MAX_SOCKETS 4 66 static struct socket_info sockets[MAX_SOCKETS]; 67 static int socket_count; /* shortcut */ 68 69 70 static int i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 71 { 72 unsigned char configbyte; 73 int i, ret; 74 75 enter("i82092aa_pci_probe"); 76 77 if ((ret = pci_enable_device(dev))) 78 return ret; 79 80 pci_read_config_byte(dev, 0x40, &configbyte); /* PCI Configuration Control */ 81 switch(configbyte&6) { 82 case 0: 83 socket_count = 2; 84 break; 85 case 2: 86 socket_count = 1; 87 break; 88 case 4: 89 case 6: 90 socket_count = 4; 91 break; 92 93 default: 94 printk(KERN_ERR "i82092aa: Oops, you did something we didn't think of.\n"); 95 ret = -EIO; 96 goto err_out_disable; 97 } 98 printk(KERN_INFO "i82092aa: configured as a %d socket device.\n", socket_count); 99 100 if (!request_region(pci_resource_start(dev, 0), 2, "i82092aa")) { 101 ret = -EBUSY; 102 goto err_out_disable; 103 } 104 105 for (i = 0;i<socket_count;i++) { 106 sockets[i].card_state = 1; /* 1 = present but empty */ 107 sockets[i].io_base = pci_resource_start(dev, 0); 108 sockets[i].socket.features |= SS_CAP_PCCARD; 109 sockets[i].socket.map_size = 0x1000; 110 sockets[i].socket.irq_mask = 0; 111 sockets[i].socket.pci_irq = dev->irq; 112 sockets[i].socket.cb_dev = dev; 113 sockets[i].socket.owner = THIS_MODULE; 114 115 sockets[i].number = i; 116 117 if (card_present(i)) { 118 sockets[i].card_state = 3; 119 dprintk(KERN_DEBUG "i82092aa: slot %i is occupied\n",i); 120 } else { 121 dprintk(KERN_DEBUG "i82092aa: slot %i is vacant\n",i); 122 } 123 } 124 125 /* Now, specifiy that all interrupts are to be done as PCI interrupts */ 126 configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */ 127 pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */ 128 129 /* Register the interrupt handler */ 130 dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq); 131 if ((ret = request_irq(dev->irq, i82092aa_interrupt, IRQF_SHARED, "i82092aa", i82092aa_interrupt))) { 132 printk(KERN_ERR "i82092aa: Failed to register IRQ %d, aborting\n", dev->irq); 133 goto err_out_free_res; 134 } 135 136 pci_set_drvdata(dev, &sockets[i].socket); 137 138 for (i = 0; i<socket_count; i++) { 139 sockets[i].socket.dev.parent = &dev->dev; 140 sockets[i].socket.ops = &i82092aa_operations; 141 sockets[i].socket.resource_ops = &pccard_nonstatic_ops; 142 ret = pcmcia_register_socket(&sockets[i].socket); 143 if (ret) { 144 goto err_out_free_sockets; 145 } 146 } 147 148 leave("i82092aa_pci_probe"); 149 return 0; 150 151 err_out_free_sockets: 152 if (i) { 153 for (i--;i>=0;i--) { 154 pcmcia_unregister_socket(&sockets[i].socket); 155 } 156 } 157 free_irq(dev->irq, i82092aa_interrupt); 158 err_out_free_res: 159 release_region(pci_resource_start(dev, 0), 2); 160 err_out_disable: 161 pci_disable_device(dev); 162 return ret; 163 } 164 165 static void i82092aa_pci_remove(struct pci_dev *dev) 166 { 167 struct pcmcia_socket *socket = pci_get_drvdata(dev); 168 169 enter("i82092aa_pci_remove"); 170 171 free_irq(dev->irq, i82092aa_interrupt); 172 173 if (socket) 174 pcmcia_unregister_socket(socket); 175 176 leave("i82092aa_pci_remove"); 177 } 178 179 static DEFINE_SPINLOCK(port_lock); 180 181 /* basic value read/write functions */ 182 183 static unsigned char indirect_read(int socket, unsigned short reg) 184 { 185 unsigned short int port; 186 unsigned char val; 187 unsigned long flags; 188 spin_lock_irqsave(&port_lock,flags); 189 reg += socket * 0x40; 190 port = sockets[socket].io_base; 191 outb(reg,port); 192 val = inb(port+1); 193 spin_unlock_irqrestore(&port_lock,flags); 194 return val; 195 } 196 197 #if 0 198 static unsigned short indirect_read16(int socket, unsigned short reg) 199 { 200 unsigned short int port; 201 unsigned short tmp; 202 unsigned long flags; 203 spin_lock_irqsave(&port_lock,flags); 204 reg = reg + socket * 0x40; 205 port = sockets[socket].io_base; 206 outb(reg,port); 207 tmp = inb(port+1); 208 reg++; 209 outb(reg,port); 210 tmp = tmp | (inb(port+1)<<8); 211 spin_unlock_irqrestore(&port_lock,flags); 212 return tmp; 213 } 214 #endif 215 216 static void indirect_write(int socket, unsigned short reg, unsigned char value) 217 { 218 unsigned short int port; 219 unsigned long flags; 220 spin_lock_irqsave(&port_lock,flags); 221 reg = reg + socket * 0x40; 222 port = sockets[socket].io_base; 223 outb(reg,port); 224 outb(value,port+1); 225 spin_unlock_irqrestore(&port_lock,flags); 226 } 227 228 static void indirect_setbit(int socket, unsigned short reg, unsigned char mask) 229 { 230 unsigned short int port; 231 unsigned char val; 232 unsigned long flags; 233 spin_lock_irqsave(&port_lock,flags); 234 reg = reg + socket * 0x40; 235 port = sockets[socket].io_base; 236 outb(reg,port); 237 val = inb(port+1); 238 val |= mask; 239 outb(reg,port); 240 outb(val,port+1); 241 spin_unlock_irqrestore(&port_lock,flags); 242 } 243 244 245 static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask) 246 { 247 unsigned short int port; 248 unsigned char val; 249 unsigned long flags; 250 spin_lock_irqsave(&port_lock,flags); 251 reg = reg + socket * 0x40; 252 port = sockets[socket].io_base; 253 outb(reg,port); 254 val = inb(port+1); 255 val &= ~mask; 256 outb(reg,port); 257 outb(val,port+1); 258 spin_unlock_irqrestore(&port_lock,flags); 259 } 260 261 static void indirect_write16(int socket, unsigned short reg, unsigned short value) 262 { 263 unsigned short int port; 264 unsigned char val; 265 unsigned long flags; 266 spin_lock_irqsave(&port_lock,flags); 267 reg = reg + socket * 0x40; 268 port = sockets[socket].io_base; 269 270 outb(reg,port); 271 val = value & 255; 272 outb(val,port+1); 273 274 reg++; 275 276 outb(reg,port); 277 val = value>>8; 278 outb(val,port+1); 279 spin_unlock_irqrestore(&port_lock,flags); 280 } 281 282 /* simple helper functions */ 283 /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */ 284 static int cycle_time = 120; 285 286 static int to_cycles(int ns) 287 { 288 if (cycle_time!=0) 289 return ns/cycle_time; 290 else 291 return 0; 292 } 293 294 295 /* Interrupt handler functionality */ 296 297 static irqreturn_t i82092aa_interrupt(int irq, void *dev) 298 { 299 int i; 300 int loopcount = 0; 301 int handled = 0; 302 303 unsigned int events, active=0; 304 305 /* enter("i82092aa_interrupt");*/ 306 307 while (1) { 308 loopcount++; 309 if (loopcount>20) { 310 printk(KERN_ERR "i82092aa: infinite eventloop in interrupt \n"); 311 break; 312 } 313 314 active = 0; 315 316 for (i=0;i<socket_count;i++) { 317 int csc; 318 if (sockets[i].card_state==0) /* Inactive socket, should not happen */ 319 continue; 320 321 csc = indirect_read(i,I365_CSC); /* card status change register */ 322 323 if (csc==0) /* no events on this socket */ 324 continue; 325 handled = 1; 326 events = 0; 327 328 if (csc & I365_CSC_DETECT) { 329 events |= SS_DETECT; 330 printk("Card detected in socket %i!\n",i); 331 } 332 333 if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) { 334 /* For IO/CARDS, bit 0 means "read the card" */ 335 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; 336 } else { 337 /* Check for battery/ready events */ 338 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; 339 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; 340 events |= (csc & I365_CSC_READY) ? SS_READY : 0; 341 } 342 343 if (events) { 344 pcmcia_parse_events(&sockets[i].socket, events); 345 } 346 active |= events; 347 } 348 349 if (active==0) /* no more events to handle */ 350 break; 351 352 } 353 return IRQ_RETVAL(handled); 354 /* leave("i82092aa_interrupt");*/ 355 } 356 357 358 359 /* socket functions */ 360 361 static int card_present(int socketno) 362 { 363 unsigned int val; 364 enter("card_present"); 365 366 if ((socketno<0) || (socketno >= MAX_SOCKETS)) 367 return 0; 368 if (sockets[socketno].io_base == 0) 369 return 0; 370 371 372 val = indirect_read(socketno, 1); /* Interface status register */ 373 if ((val&12)==12) { 374 leave("card_present 1"); 375 return 1; 376 } 377 378 leave("card_present 0"); 379 return 0; 380 } 381 382 static void set_bridge_state(int sock) 383 { 384 enter("set_bridge_state"); 385 indirect_write(sock, I365_GBLCTL,0x00); 386 indirect_write(sock, I365_GENCTL,0x00); 387 388 indirect_setbit(sock, I365_INTCTL,0x08); 389 leave("set_bridge_state"); 390 } 391 392 393 394 395 396 397 static int i82092aa_init(struct pcmcia_socket *sock) 398 { 399 int i; 400 struct resource res = { .start = 0, .end = 0x0fff }; 401 pccard_io_map io = { 0, 0, 0, 0, 1 }; 402 pccard_mem_map mem = { .res = &res, }; 403 404 enter("i82092aa_init"); 405 406 for (i = 0; i < 2; i++) { 407 io.map = i; 408 i82092aa_set_io_map(sock, &io); 409 } 410 for (i = 0; i < 5; i++) { 411 mem.map = i; 412 i82092aa_set_mem_map(sock, &mem); 413 } 414 415 leave("i82092aa_init"); 416 return 0; 417 } 418 419 static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value) 420 { 421 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 422 unsigned int status; 423 424 enter("i82092aa_get_status"); 425 426 status = indirect_read(sock,I365_STATUS); /* Interface Status Register */ 427 *value = 0; 428 429 if ((status & I365_CS_DETECT) == I365_CS_DETECT) { 430 *value |= SS_DETECT; 431 } 432 433 /* IO cards have a different meaning of bits 0,1 */ 434 /* Also notice the inverse-logic on the bits */ 435 if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) { 436 /* IO card */ 437 if (!(status & I365_CS_STSCHG)) 438 *value |= SS_STSCHG; 439 } else { /* non I/O card */ 440 if (!(status & I365_CS_BVD1)) 441 *value |= SS_BATDEAD; 442 if (!(status & I365_CS_BVD2)) 443 *value |= SS_BATWARN; 444 445 } 446 447 if (status & I365_CS_WRPROT) 448 (*value) |= SS_WRPROT; /* card is write protected */ 449 450 if (status & I365_CS_READY) 451 (*value) |= SS_READY; /* card is not busy */ 452 453 if (status & I365_CS_POWERON) 454 (*value) |= SS_POWERON; /* power is applied to the card */ 455 456 457 leave("i82092aa_get_status"); 458 return 0; 459 } 460 461 462 static int i82092aa_set_socket(struct pcmcia_socket *socket, socket_state_t *state) 463 { 464 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 465 unsigned char reg; 466 467 enter("i82092aa_set_socket"); 468 469 /* First, set the global controller options */ 470 471 set_bridge_state(sock); 472 473 /* Values for the IGENC register */ 474 475 reg = 0; 476 if (!(state->flags & SS_RESET)) /* The reset bit has "inverse" logic */ 477 reg = reg | I365_PC_RESET; 478 if (state->flags & SS_IOCARD) 479 reg = reg | I365_PC_IOCARD; 480 481 indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */ 482 483 /* Power registers */ 484 485 reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */ 486 487 if (state->flags & SS_PWR_AUTO) { 488 printk("Auto power\n"); 489 reg |= I365_PWR_AUTO; /* automatic power mngmnt */ 490 } 491 if (state->flags & SS_OUTPUT_ENA) { 492 printk("Power Enabled \n"); 493 reg |= I365_PWR_OUT; /* enable power */ 494 } 495 496 switch (state->Vcc) { 497 case 0: 498 break; 499 case 50: 500 printk("setting voltage to Vcc to 5V on socket %i\n",sock); 501 reg |= I365_VCC_5V; 502 break; 503 default: 504 printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc); 505 leave("i82092aa_set_socket"); 506 return -EINVAL; 507 } 508 509 510 switch (state->Vpp) { 511 case 0: 512 printk("not setting Vpp on socket %i\n",sock); 513 break; 514 case 50: 515 printk("setting Vpp to 5.0 for socket %i\n",sock); 516 reg |= I365_VPP1_5V | I365_VPP2_5V; 517 break; 518 case 120: 519 printk("setting Vpp to 12.0\n"); 520 reg |= I365_VPP1_12V | I365_VPP2_12V; 521 break; 522 default: 523 printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc); 524 leave("i82092aa_set_socket"); 525 return -EINVAL; 526 } 527 528 if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */ 529 indirect_write(sock,I365_POWER,reg); 530 531 /* Enable specific interrupt events */ 532 533 reg = 0x00; 534 if (state->csc_mask & SS_DETECT) { 535 reg |= I365_CSC_DETECT; 536 } 537 if (state->flags & SS_IOCARD) { 538 if (state->csc_mask & SS_STSCHG) 539 reg |= I365_CSC_STSCHG; 540 } else { 541 if (state->csc_mask & SS_BATDEAD) 542 reg |= I365_CSC_BVD1; 543 if (state->csc_mask & SS_BATWARN) 544 reg |= I365_CSC_BVD2; 545 if (state->csc_mask & SS_READY) 546 reg |= I365_CSC_READY; 547 548 } 549 550 /* now write the value and clear the (probably bogus) pending stuff by doing a dummy read*/ 551 552 indirect_write(sock,I365_CSCINT,reg); 553 (void)indirect_read(sock,I365_CSC); 554 555 leave("i82092aa_set_socket"); 556 return 0; 557 } 558 559 static int i82092aa_set_io_map(struct pcmcia_socket *socket, struct pccard_io_map *io) 560 { 561 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 562 unsigned char map, ioctl; 563 564 enter("i82092aa_set_io_map"); 565 566 map = io->map; 567 568 /* Check error conditions */ 569 if (map > 1) { 570 leave("i82092aa_set_io_map with invalid map"); 571 return -EINVAL; 572 } 573 if ((io->start > 0xffff) || (io->stop > 0xffff) || (io->stop < io->start)){ 574 leave("i82092aa_set_io_map with invalid io"); 575 return -EINVAL; 576 } 577 578 /* Turn off the window before changing anything */ 579 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map)) 580 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map)); 581 582 /* printk("set_io_map: Setting range to %x - %x \n",io->start,io->stop); */ 583 584 /* write the new values */ 585 indirect_write16(sock,I365_IO(map)+I365_W_START,io->start); 586 indirect_write16(sock,I365_IO(map)+I365_W_STOP,io->stop); 587 588 ioctl = indirect_read(sock,I365_IOCTL) & ~I365_IOCTL_MASK(map); 589 590 if (io->flags & (MAP_16BIT|MAP_AUTOSZ)) 591 ioctl |= I365_IOCTL_16BIT(map); 592 593 indirect_write(sock,I365_IOCTL,ioctl); 594 595 /* Turn the window back on if needed */ 596 if (io->flags & MAP_ACTIVE) 597 indirect_setbit(sock,I365_ADDRWIN,I365_ENA_IO(map)); 598 599 leave("i82092aa_set_io_map"); 600 return 0; 601 } 602 603 static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_map *mem) 604 { 605 struct socket_info *sock_info = container_of(socket, struct socket_info, socket); 606 unsigned int sock = sock_info->number; 607 struct pci_bus_region region; 608 unsigned short base, i; 609 unsigned char map; 610 611 enter("i82092aa_set_mem_map"); 612 613 pcibios_resource_to_bus(sock_info->dev, ®ion, mem->res); 614 615 map = mem->map; 616 if (map > 4) { 617 leave("i82092aa_set_mem_map: invalid map"); 618 return -EINVAL; 619 } 620 621 622 if ( (mem->card_start > 0x3ffffff) || (region.start > region.end) || 623 (mem->speed > 1000) ) { 624 leave("i82092aa_set_mem_map: invalid address / speed"); 625 printk("invalid mem map for socket %i: %llx to %llx with a " 626 "start of %x\n", 627 sock, 628 (unsigned long long)region.start, 629 (unsigned long long)region.end, 630 mem->card_start); 631 return -EINVAL; 632 } 633 634 /* Turn off the window before changing anything */ 635 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map)) 636 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 637 638 639 /* printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, region.start,region.end,sock,mem->speed,mem->flags & MAP_ACTIVE); */ 640 641 /* write the start address */ 642 base = I365_MEM(map); 643 i = (region.start >> 12) & 0x0fff; 644 if (mem->flags & MAP_16BIT) 645 i |= I365_MEM_16BIT; 646 if (mem->flags & MAP_0WS) 647 i |= I365_MEM_0WS; 648 indirect_write16(sock,base+I365_W_START,i); 649 650 /* write the stop address */ 651 652 i= (region.end >> 12) & 0x0fff; 653 switch (to_cycles(mem->speed)) { 654 case 0: 655 break; 656 case 1: 657 i |= I365_MEM_WS0; 658 break; 659 case 2: 660 i |= I365_MEM_WS1; 661 break; 662 default: 663 i |= I365_MEM_WS1 | I365_MEM_WS0; 664 break; 665 } 666 667 indirect_write16(sock,base+I365_W_STOP,i); 668 669 /* card start */ 670 671 i = ((mem->card_start - region.start) >> 12) & 0x3fff; 672 if (mem->flags & MAP_WRPROT) 673 i |= I365_MEM_WRPROT; 674 if (mem->flags & MAP_ATTRIB) { 675 /* printk("requesting attribute memory for socket %i\n",sock);*/ 676 i |= I365_MEM_REG; 677 } else { 678 /* printk("requesting normal memory for socket %i\n",sock);*/ 679 } 680 indirect_write16(sock,base+I365_W_OFF,i); 681 682 /* Enable the window if necessary */ 683 if (mem->flags & MAP_ACTIVE) 684 indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 685 686 leave("i82092aa_set_mem_map"); 687 return 0; 688 } 689 690 static int i82092aa_module_init(void) 691 { 692 return pci_register_driver(&i82092aa_pci_driver); 693 } 694 695 static void i82092aa_module_exit(void) 696 { 697 enter("i82092aa_module_exit"); 698 pci_unregister_driver(&i82092aa_pci_driver); 699 if (sockets[0].io_base>0) 700 release_region(sockets[0].io_base, 2); 701 leave("i82092aa_module_exit"); 702 } 703 704 module_init(i82092aa_module_init); 705 module_exit(i82092aa_module_exit); 706 707