1 /* 2 * Driver for Intel I82092AA PCI-PCMCIA bridge. 3 * 4 * (C) 2001 Red Hat, Inc. 5 * 6 * Author: Arjan Van De Ven <arjanv@redhat.com> 7 * Loosly based on i82365.c from the pcmcia-cs package 8 * 9 * $Id: i82092aa.c,v 1.2 2001/10/23 14:43:34 arjanv Exp $ 10 */ 11 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/pci.h> 15 #include <linux/init.h> 16 #include <linux/workqueue.h> 17 #include <linux/interrupt.h> 18 #include <linux/device.h> 19 20 #include <pcmcia/cs_types.h> 21 #include <pcmcia/ss.h> 22 #include <pcmcia/cs.h> 23 24 #include <asm/system.h> 25 #include <asm/io.h> 26 27 #include "i82092aa.h" 28 #include "i82365.h" 29 30 MODULE_LICENSE("GPL"); 31 32 /* PCI core routines */ 33 static struct pci_device_id i82092aa_pci_ids[] = { 34 { 35 .vendor = PCI_VENDOR_ID_INTEL, 36 .device = PCI_DEVICE_ID_INTEL_82092AA_0, 37 .subvendor = PCI_ANY_ID, 38 .subdevice = PCI_ANY_ID, 39 }, 40 {} 41 }; 42 MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids); 43 44 #ifdef CONFIG_PM 45 static int i82092aa_socket_suspend (struct pci_dev *dev, pm_message_t state) 46 { 47 return pcmcia_socket_dev_suspend(&dev->dev, state); 48 } 49 50 static int i82092aa_socket_resume (struct pci_dev *dev) 51 { 52 return pcmcia_socket_dev_resume(&dev->dev); 53 } 54 #endif 55 56 static struct pci_driver i82092aa_pci_drv = { 57 .name = "i82092aa", 58 .id_table = i82092aa_pci_ids, 59 .probe = i82092aa_pci_probe, 60 .remove = __devexit_p(i82092aa_pci_remove), 61 #ifdef CONFIG_PM 62 .suspend = i82092aa_socket_suspend, 63 .resume = i82092aa_socket_resume, 64 #endif 65 }; 66 67 68 /* the pccard structure and its functions */ 69 static struct pccard_operations i82092aa_operations = { 70 .init = i82092aa_init, 71 .get_status = i82092aa_get_status, 72 .set_socket = i82092aa_set_socket, 73 .set_io_map = i82092aa_set_io_map, 74 .set_mem_map = i82092aa_set_mem_map, 75 }; 76 77 /* The card can do upto 4 sockets, allocate a structure for each of them */ 78 79 struct socket_info { 80 int number; 81 int card_state; /* 0 = no socket, 82 1 = empty socket, 83 2 = card but not initialized, 84 3 = operational card */ 85 unsigned int io_base; /* base io address of the socket */ 86 87 struct pcmcia_socket socket; 88 struct pci_dev *dev; /* The PCI device for the socket */ 89 }; 90 91 #define MAX_SOCKETS 4 92 static struct socket_info sockets[MAX_SOCKETS]; 93 static int socket_count; /* shortcut */ 94 95 96 static int __devinit i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 97 { 98 unsigned char configbyte; 99 int i, ret; 100 101 enter("i82092aa_pci_probe"); 102 103 if ((ret = pci_enable_device(dev))) 104 return ret; 105 106 pci_read_config_byte(dev, 0x40, &configbyte); /* PCI Configuration Control */ 107 switch(configbyte&6) { 108 case 0: 109 socket_count = 2; 110 break; 111 case 2: 112 socket_count = 1; 113 break; 114 case 4: 115 case 6: 116 socket_count = 4; 117 break; 118 119 default: 120 printk(KERN_ERR "i82092aa: Oops, you did something we didn't think of.\n"); 121 ret = -EIO; 122 goto err_out_disable; 123 } 124 printk(KERN_INFO "i82092aa: configured as a %d socket device.\n", socket_count); 125 126 if (!request_region(pci_resource_start(dev, 0), 2, "i82092aa")) { 127 ret = -EBUSY; 128 goto err_out_disable; 129 } 130 131 for (i = 0;i<socket_count;i++) { 132 sockets[i].card_state = 1; /* 1 = present but empty */ 133 sockets[i].io_base = pci_resource_start(dev, 0); 134 sockets[i].socket.features |= SS_CAP_PCCARD; 135 sockets[i].socket.map_size = 0x1000; 136 sockets[i].socket.irq_mask = 0; 137 sockets[i].socket.pci_irq = dev->irq; 138 sockets[i].socket.owner = THIS_MODULE; 139 140 sockets[i].number = i; 141 142 if (card_present(i)) { 143 sockets[i].card_state = 3; 144 dprintk(KERN_DEBUG "i82092aa: slot %i is occupied\n",i); 145 } else { 146 dprintk(KERN_DEBUG "i82092aa: slot %i is vacant\n",i); 147 } 148 } 149 150 /* Now, specifiy that all interrupts are to be done as PCI interrupts */ 151 configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */ 152 pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */ 153 154 /* Register the interrupt handler */ 155 dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq); 156 if ((ret = request_irq(dev->irq, i82092aa_interrupt, IRQF_SHARED, "i82092aa", i82092aa_interrupt))) { 157 printk(KERN_ERR "i82092aa: Failed to register IRQ %d, aborting\n", dev->irq); 158 goto err_out_free_res; 159 } 160 161 pci_set_drvdata(dev, &sockets[i].socket); 162 163 for (i = 0; i<socket_count; i++) { 164 sockets[i].socket.dev.parent = &dev->dev; 165 sockets[i].socket.ops = &i82092aa_operations; 166 sockets[i].socket.resource_ops = &pccard_nonstatic_ops; 167 ret = pcmcia_register_socket(&sockets[i].socket); 168 if (ret) { 169 goto err_out_free_sockets; 170 } 171 } 172 173 leave("i82092aa_pci_probe"); 174 return 0; 175 176 err_out_free_sockets: 177 if (i) { 178 for (i--;i>=0;i--) { 179 pcmcia_unregister_socket(&sockets[i].socket); 180 } 181 } 182 free_irq(dev->irq, i82092aa_interrupt); 183 err_out_free_res: 184 release_region(pci_resource_start(dev, 0), 2); 185 err_out_disable: 186 pci_disable_device(dev); 187 return ret; 188 } 189 190 static void __devexit i82092aa_pci_remove(struct pci_dev *dev) 191 { 192 struct pcmcia_socket *socket = pci_get_drvdata(dev); 193 194 enter("i82092aa_pci_remove"); 195 196 free_irq(dev->irq, i82092aa_interrupt); 197 198 if (socket) 199 pcmcia_unregister_socket(socket); 200 201 leave("i82092aa_pci_remove"); 202 } 203 204 static DEFINE_SPINLOCK(port_lock); 205 206 /* basic value read/write functions */ 207 208 static unsigned char indirect_read(int socket, unsigned short reg) 209 { 210 unsigned short int port; 211 unsigned char val; 212 unsigned long flags; 213 spin_lock_irqsave(&port_lock,flags); 214 reg += socket * 0x40; 215 port = sockets[socket].io_base; 216 outb(reg,port); 217 val = inb(port+1); 218 spin_unlock_irqrestore(&port_lock,flags); 219 return val; 220 } 221 222 #if 0 223 static unsigned short indirect_read16(int socket, unsigned short reg) 224 { 225 unsigned short int port; 226 unsigned short tmp; 227 unsigned long flags; 228 spin_lock_irqsave(&port_lock,flags); 229 reg = reg + socket * 0x40; 230 port = sockets[socket].io_base; 231 outb(reg,port); 232 tmp = inb(port+1); 233 reg++; 234 outb(reg,port); 235 tmp = tmp | (inb(port+1)<<8); 236 spin_unlock_irqrestore(&port_lock,flags); 237 return tmp; 238 } 239 #endif 240 241 static void indirect_write(int socket, unsigned short reg, unsigned char value) 242 { 243 unsigned short int port; 244 unsigned long flags; 245 spin_lock_irqsave(&port_lock,flags); 246 reg = reg + socket * 0x40; 247 port = sockets[socket].io_base; 248 outb(reg,port); 249 outb(value,port+1); 250 spin_unlock_irqrestore(&port_lock,flags); 251 } 252 253 static void indirect_setbit(int socket, unsigned short reg, unsigned char mask) 254 { 255 unsigned short int port; 256 unsigned char val; 257 unsigned long flags; 258 spin_lock_irqsave(&port_lock,flags); 259 reg = reg + socket * 0x40; 260 port = sockets[socket].io_base; 261 outb(reg,port); 262 val = inb(port+1); 263 val |= mask; 264 outb(reg,port); 265 outb(val,port+1); 266 spin_unlock_irqrestore(&port_lock,flags); 267 } 268 269 270 static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask) 271 { 272 unsigned short int port; 273 unsigned char val; 274 unsigned long flags; 275 spin_lock_irqsave(&port_lock,flags); 276 reg = reg + socket * 0x40; 277 port = sockets[socket].io_base; 278 outb(reg,port); 279 val = inb(port+1); 280 val &= ~mask; 281 outb(reg,port); 282 outb(val,port+1); 283 spin_unlock_irqrestore(&port_lock,flags); 284 } 285 286 static void indirect_write16(int socket, unsigned short reg, unsigned short value) 287 { 288 unsigned short int port; 289 unsigned char val; 290 unsigned long flags; 291 spin_lock_irqsave(&port_lock,flags); 292 reg = reg + socket * 0x40; 293 port = sockets[socket].io_base; 294 295 outb(reg,port); 296 val = value & 255; 297 outb(val,port+1); 298 299 reg++; 300 301 outb(reg,port); 302 val = value>>8; 303 outb(val,port+1); 304 spin_unlock_irqrestore(&port_lock,flags); 305 } 306 307 /* simple helper functions */ 308 /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */ 309 static int cycle_time = 120; 310 311 static int to_cycles(int ns) 312 { 313 if (cycle_time!=0) 314 return ns/cycle_time; 315 else 316 return 0; 317 } 318 319 320 /* Interrupt handler functionality */ 321 322 static irqreturn_t i82092aa_interrupt(int irq, void *dev) 323 { 324 int i; 325 int loopcount = 0; 326 int handled = 0; 327 328 unsigned int events, active=0; 329 330 /* enter("i82092aa_interrupt");*/ 331 332 while (1) { 333 loopcount++; 334 if (loopcount>20) { 335 printk(KERN_ERR "i82092aa: infinite eventloop in interrupt \n"); 336 break; 337 } 338 339 active = 0; 340 341 for (i=0;i<socket_count;i++) { 342 int csc; 343 if (sockets[i].card_state==0) /* Inactive socket, should not happen */ 344 continue; 345 346 csc = indirect_read(i,I365_CSC); /* card status change register */ 347 348 if (csc==0) /* no events on this socket */ 349 continue; 350 handled = 1; 351 events = 0; 352 353 if (csc & I365_CSC_DETECT) { 354 events |= SS_DETECT; 355 printk("Card detected in socket %i!\n",i); 356 } 357 358 if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) { 359 /* For IO/CARDS, bit 0 means "read the card" */ 360 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; 361 } else { 362 /* Check for battery/ready events */ 363 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; 364 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; 365 events |= (csc & I365_CSC_READY) ? SS_READY : 0; 366 } 367 368 if (events) { 369 pcmcia_parse_events(&sockets[i].socket, events); 370 } 371 active |= events; 372 } 373 374 if (active==0) /* no more events to handle */ 375 break; 376 377 } 378 return IRQ_RETVAL(handled); 379 /* leave("i82092aa_interrupt");*/ 380 } 381 382 383 384 /* socket functions */ 385 386 static int card_present(int socketno) 387 { 388 unsigned int val; 389 enter("card_present"); 390 391 if ((socketno<0) || (socketno >= MAX_SOCKETS)) 392 return 0; 393 if (sockets[socketno].io_base == 0) 394 return 0; 395 396 397 val = indirect_read(socketno, 1); /* Interface status register */ 398 if ((val&12)==12) { 399 leave("card_present 1"); 400 return 1; 401 } 402 403 leave("card_present 0"); 404 return 0; 405 } 406 407 static void set_bridge_state(int sock) 408 { 409 enter("set_bridge_state"); 410 indirect_write(sock, I365_GBLCTL,0x00); 411 indirect_write(sock, I365_GENCTL,0x00); 412 413 indirect_setbit(sock, I365_INTCTL,0x08); 414 leave("set_bridge_state"); 415 } 416 417 418 419 420 421 422 static int i82092aa_init(struct pcmcia_socket *sock) 423 { 424 int i; 425 struct resource res = { .start = 0, .end = 0x0fff }; 426 pccard_io_map io = { 0, 0, 0, 0, 1 }; 427 pccard_mem_map mem = { .res = &res, }; 428 429 enter("i82092aa_init"); 430 431 for (i = 0; i < 2; i++) { 432 io.map = i; 433 i82092aa_set_io_map(sock, &io); 434 } 435 for (i = 0; i < 5; i++) { 436 mem.map = i; 437 i82092aa_set_mem_map(sock, &mem); 438 } 439 440 leave("i82092aa_init"); 441 return 0; 442 } 443 444 static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value) 445 { 446 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 447 unsigned int status; 448 449 enter("i82092aa_get_status"); 450 451 status = indirect_read(sock,I365_STATUS); /* Interface Status Register */ 452 *value = 0; 453 454 if ((status & I365_CS_DETECT) == I365_CS_DETECT) { 455 *value |= SS_DETECT; 456 } 457 458 /* IO cards have a different meaning of bits 0,1 */ 459 /* Also notice the inverse-logic on the bits */ 460 if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) { 461 /* IO card */ 462 if (!(status & I365_CS_STSCHG)) 463 *value |= SS_STSCHG; 464 } else { /* non I/O card */ 465 if (!(status & I365_CS_BVD1)) 466 *value |= SS_BATDEAD; 467 if (!(status & I365_CS_BVD2)) 468 *value |= SS_BATWARN; 469 470 } 471 472 if (status & I365_CS_WRPROT) 473 (*value) |= SS_WRPROT; /* card is write protected */ 474 475 if (status & I365_CS_READY) 476 (*value) |= SS_READY; /* card is not busy */ 477 478 if (status & I365_CS_POWERON) 479 (*value) |= SS_POWERON; /* power is applied to the card */ 480 481 482 leave("i82092aa_get_status"); 483 return 0; 484 } 485 486 487 static int i82092aa_set_socket(struct pcmcia_socket *socket, socket_state_t *state) 488 { 489 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 490 unsigned char reg; 491 492 enter("i82092aa_set_socket"); 493 494 /* First, set the global controller options */ 495 496 set_bridge_state(sock); 497 498 /* Values for the IGENC register */ 499 500 reg = 0; 501 if (!(state->flags & SS_RESET)) /* The reset bit has "inverse" logic */ 502 reg = reg | I365_PC_RESET; 503 if (state->flags & SS_IOCARD) 504 reg = reg | I365_PC_IOCARD; 505 506 indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */ 507 508 /* Power registers */ 509 510 reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */ 511 512 if (state->flags & SS_PWR_AUTO) { 513 printk("Auto power\n"); 514 reg |= I365_PWR_AUTO; /* automatic power mngmnt */ 515 } 516 if (state->flags & SS_OUTPUT_ENA) { 517 printk("Power Enabled \n"); 518 reg |= I365_PWR_OUT; /* enable power */ 519 } 520 521 switch (state->Vcc) { 522 case 0: 523 break; 524 case 50: 525 printk("setting voltage to Vcc to 5V on socket %i\n",sock); 526 reg |= I365_VCC_5V; 527 break; 528 default: 529 printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc); 530 leave("i82092aa_set_socket"); 531 return -EINVAL; 532 } 533 534 535 switch (state->Vpp) { 536 case 0: 537 printk("not setting Vpp on socket %i\n",sock); 538 break; 539 case 50: 540 printk("setting Vpp to 5.0 for socket %i\n",sock); 541 reg |= I365_VPP1_5V | I365_VPP2_5V; 542 break; 543 case 120: 544 printk("setting Vpp to 12.0\n"); 545 reg |= I365_VPP1_12V | I365_VPP2_12V; 546 break; 547 default: 548 printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc); 549 leave("i82092aa_set_socket"); 550 return -EINVAL; 551 } 552 553 if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */ 554 indirect_write(sock,I365_POWER,reg); 555 556 /* Enable specific interrupt events */ 557 558 reg = 0x00; 559 if (state->csc_mask & SS_DETECT) { 560 reg |= I365_CSC_DETECT; 561 } 562 if (state->flags & SS_IOCARD) { 563 if (state->csc_mask & SS_STSCHG) 564 reg |= I365_CSC_STSCHG; 565 } else { 566 if (state->csc_mask & SS_BATDEAD) 567 reg |= I365_CSC_BVD1; 568 if (state->csc_mask & SS_BATWARN) 569 reg |= I365_CSC_BVD2; 570 if (state->csc_mask & SS_READY) 571 reg |= I365_CSC_READY; 572 573 } 574 575 /* now write the value and clear the (probably bogus) pending stuff by doing a dummy read*/ 576 577 indirect_write(sock,I365_CSCINT,reg); 578 (void)indirect_read(sock,I365_CSC); 579 580 leave("i82092aa_set_socket"); 581 return 0; 582 } 583 584 static int i82092aa_set_io_map(struct pcmcia_socket *socket, struct pccard_io_map *io) 585 { 586 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 587 unsigned char map, ioctl; 588 589 enter("i82092aa_set_io_map"); 590 591 map = io->map; 592 593 /* Check error conditions */ 594 if (map > 1) { 595 leave("i82092aa_set_io_map with invalid map"); 596 return -EINVAL; 597 } 598 if ((io->start > 0xffff) || (io->stop > 0xffff) || (io->stop < io->start)){ 599 leave("i82092aa_set_io_map with invalid io"); 600 return -EINVAL; 601 } 602 603 /* Turn off the window before changing anything */ 604 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map)) 605 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map)); 606 607 /* printk("set_io_map: Setting range to %x - %x \n",io->start,io->stop); */ 608 609 /* write the new values */ 610 indirect_write16(sock,I365_IO(map)+I365_W_START,io->start); 611 indirect_write16(sock,I365_IO(map)+I365_W_STOP,io->stop); 612 613 ioctl = indirect_read(sock,I365_IOCTL) & ~I365_IOCTL_MASK(map); 614 615 if (io->flags & (MAP_16BIT|MAP_AUTOSZ)) 616 ioctl |= I365_IOCTL_16BIT(map); 617 618 indirect_write(sock,I365_IOCTL,ioctl); 619 620 /* Turn the window back on if needed */ 621 if (io->flags & MAP_ACTIVE) 622 indirect_setbit(sock,I365_ADDRWIN,I365_ENA_IO(map)); 623 624 leave("i82092aa_set_io_map"); 625 return 0; 626 } 627 628 static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_map *mem) 629 { 630 struct socket_info *sock_info = container_of(socket, struct socket_info, socket); 631 unsigned int sock = sock_info->number; 632 struct pci_bus_region region; 633 unsigned short base, i; 634 unsigned char map; 635 636 enter("i82092aa_set_mem_map"); 637 638 pcibios_resource_to_bus(sock_info->dev, ®ion, mem->res); 639 640 map = mem->map; 641 if (map > 4) { 642 leave("i82092aa_set_mem_map: invalid map"); 643 return -EINVAL; 644 } 645 646 647 if ( (mem->card_start > 0x3ffffff) || (region.start > region.end) || 648 (mem->speed > 1000) ) { 649 leave("i82092aa_set_mem_map: invalid address / speed"); 650 printk("invalid mem map for socket %i: %llx to %llx with a " 651 "start of %x\n", 652 sock, 653 (unsigned long long)region.start, 654 (unsigned long long)region.end, 655 mem->card_start); 656 return -EINVAL; 657 } 658 659 /* Turn off the window before changing anything */ 660 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map)) 661 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 662 663 664 /* printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, region.start,region.end,sock,mem->speed,mem->flags & MAP_ACTIVE); */ 665 666 /* write the start address */ 667 base = I365_MEM(map); 668 i = (region.start >> 12) & 0x0fff; 669 if (mem->flags & MAP_16BIT) 670 i |= I365_MEM_16BIT; 671 if (mem->flags & MAP_0WS) 672 i |= I365_MEM_0WS; 673 indirect_write16(sock,base+I365_W_START,i); 674 675 /* write the stop address */ 676 677 i= (region.end >> 12) & 0x0fff; 678 switch (to_cycles(mem->speed)) { 679 case 0: 680 break; 681 case 1: 682 i |= I365_MEM_WS0; 683 break; 684 case 2: 685 i |= I365_MEM_WS1; 686 break; 687 default: 688 i |= I365_MEM_WS1 | I365_MEM_WS0; 689 break; 690 } 691 692 indirect_write16(sock,base+I365_W_STOP,i); 693 694 /* card start */ 695 696 i = ((mem->card_start - region.start) >> 12) & 0x3fff; 697 if (mem->flags & MAP_WRPROT) 698 i |= I365_MEM_WRPROT; 699 if (mem->flags & MAP_ATTRIB) { 700 /* printk("requesting attribute memory for socket %i\n",sock);*/ 701 i |= I365_MEM_REG; 702 } else { 703 /* printk("requesting normal memory for socket %i\n",sock);*/ 704 } 705 indirect_write16(sock,base+I365_W_OFF,i); 706 707 /* Enable the window if necessary */ 708 if (mem->flags & MAP_ACTIVE) 709 indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 710 711 leave("i82092aa_set_mem_map"); 712 return 0; 713 } 714 715 static int i82092aa_module_init(void) 716 { 717 return pci_register_driver(&i82092aa_pci_drv); 718 } 719 720 static void i82092aa_module_exit(void) 721 { 722 enter("i82092aa_module_exit"); 723 pci_unregister_driver(&i82092aa_pci_drv); 724 if (sockets[0].io_base>0) 725 release_region(sockets[0].io_base, 2); 726 leave("i82092aa_module_exit"); 727 } 728 729 module_init(i82092aa_module_init); 730 module_exit(i82092aa_module_exit); 731 732