1 /* 2 * Driver for Intel I82092AA PCI-PCMCIA bridge. 3 * 4 * (C) 2001 Red Hat, Inc. 5 * 6 * Author: Arjan Van De Ven <arjanv@redhat.com> 7 * Loosly based on i82365.c from the pcmcia-cs package 8 * 9 * $Id: i82092aa.c,v 1.2 2001/10/23 14:43:34 arjanv Exp $ 10 */ 11 12 #include <linux/kernel.h> 13 #include <linux/config.h> 14 #include <linux/module.h> 15 #include <linux/pci.h> 16 #include <linux/init.h> 17 #include <linux/workqueue.h> 18 #include <linux/interrupt.h> 19 #include <linux/device.h> 20 21 #include <pcmcia/cs_types.h> 22 #include <pcmcia/ss.h> 23 #include <pcmcia/cs.h> 24 25 #include <asm/system.h> 26 #include <asm/io.h> 27 28 #include "i82092aa.h" 29 #include "i82365.h" 30 31 MODULE_LICENSE("GPL"); 32 33 /* PCI core routines */ 34 static struct pci_device_id i82092aa_pci_ids[] = { 35 { 36 .vendor = PCI_VENDOR_ID_INTEL, 37 .device = PCI_DEVICE_ID_INTEL_82092AA_0, 38 .subvendor = PCI_ANY_ID, 39 .subdevice = PCI_ANY_ID, 40 }, 41 {} 42 }; 43 MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids); 44 45 static int i82092aa_socket_suspend (struct pci_dev *dev, pm_message_t state) 46 { 47 return pcmcia_socket_dev_suspend(&dev->dev, state); 48 } 49 50 static int i82092aa_socket_resume (struct pci_dev *dev) 51 { 52 return pcmcia_socket_dev_resume(&dev->dev); 53 } 54 55 static struct pci_driver i82092aa_pci_drv = { 56 .name = "i82092aa", 57 .id_table = i82092aa_pci_ids, 58 .probe = i82092aa_pci_probe, 59 .remove = __devexit_p(i82092aa_pci_remove), 60 .suspend = i82092aa_socket_suspend, 61 .resume = i82092aa_socket_resume, 62 }; 63 64 65 /* the pccard structure and its functions */ 66 static struct pccard_operations i82092aa_operations = { 67 .init = i82092aa_init, 68 .get_status = i82092aa_get_status, 69 .set_socket = i82092aa_set_socket, 70 .set_io_map = i82092aa_set_io_map, 71 .set_mem_map = i82092aa_set_mem_map, 72 }; 73 74 /* The card can do upto 4 sockets, allocate a structure for each of them */ 75 76 struct socket_info { 77 int number; 78 int card_state; /* 0 = no socket, 79 1 = empty socket, 80 2 = card but not initialized, 81 3 = operational card */ 82 kio_addr_t io_base; /* base io address of the socket */ 83 84 struct pcmcia_socket socket; 85 struct pci_dev *dev; /* The PCI device for the socket */ 86 }; 87 88 #define MAX_SOCKETS 4 89 static struct socket_info sockets[MAX_SOCKETS]; 90 static int socket_count; /* shortcut */ 91 92 93 static int __devinit i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 94 { 95 unsigned char configbyte; 96 int i, ret; 97 98 enter("i82092aa_pci_probe"); 99 100 if ((ret = pci_enable_device(dev))) 101 return ret; 102 103 pci_read_config_byte(dev, 0x40, &configbyte); /* PCI Configuration Control */ 104 switch(configbyte&6) { 105 case 0: 106 socket_count = 2; 107 break; 108 case 2: 109 socket_count = 1; 110 break; 111 case 4: 112 case 6: 113 socket_count = 4; 114 break; 115 116 default: 117 printk(KERN_ERR "i82092aa: Oops, you did something we didn't think of.\n"); 118 ret = -EIO; 119 goto err_out_disable; 120 } 121 printk(KERN_INFO "i82092aa: configured as a %d socket device.\n", socket_count); 122 123 if (!request_region(pci_resource_start(dev, 0), 2, "i82092aa")) { 124 ret = -EBUSY; 125 goto err_out_disable; 126 } 127 128 for (i = 0;i<socket_count;i++) { 129 sockets[i].card_state = 1; /* 1 = present but empty */ 130 sockets[i].io_base = pci_resource_start(dev, 0); 131 sockets[i].socket.features |= SS_CAP_PCCARD; 132 sockets[i].socket.map_size = 0x1000; 133 sockets[i].socket.irq_mask = 0; 134 sockets[i].socket.pci_irq = dev->irq; 135 sockets[i].socket.owner = THIS_MODULE; 136 137 sockets[i].number = i; 138 139 if (card_present(i)) { 140 sockets[i].card_state = 3; 141 dprintk(KERN_DEBUG "i82092aa: slot %i is occupied\n",i); 142 } else { 143 dprintk(KERN_DEBUG "i82092aa: slot %i is vacant\n",i); 144 } 145 } 146 147 /* Now, specifiy that all interrupts are to be done as PCI interrupts */ 148 configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */ 149 pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */ 150 151 /* Register the interrupt handler */ 152 dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq); 153 if ((ret = request_irq(dev->irq, i82092aa_interrupt, SA_SHIRQ, "i82092aa", i82092aa_interrupt))) { 154 printk(KERN_ERR "i82092aa: Failed to register IRQ %d, aborting\n", dev->irq); 155 goto err_out_free_res; 156 } 157 158 pci_set_drvdata(dev, &sockets[i].socket); 159 160 for (i = 0; i<socket_count; i++) { 161 sockets[i].socket.dev.dev = &dev->dev; 162 sockets[i].socket.ops = &i82092aa_operations; 163 sockets[i].socket.resource_ops = &pccard_nonstatic_ops; 164 ret = pcmcia_register_socket(&sockets[i].socket); 165 if (ret) { 166 goto err_out_free_sockets; 167 } 168 } 169 170 leave("i82092aa_pci_probe"); 171 return 0; 172 173 err_out_free_sockets: 174 if (i) { 175 for (i--;i>=0;i--) { 176 pcmcia_unregister_socket(&sockets[i].socket); 177 } 178 } 179 free_irq(dev->irq, i82092aa_interrupt); 180 err_out_free_res: 181 release_region(pci_resource_start(dev, 0), 2); 182 err_out_disable: 183 pci_disable_device(dev); 184 return ret; 185 } 186 187 static void __devexit i82092aa_pci_remove(struct pci_dev *dev) 188 { 189 struct pcmcia_socket *socket = pci_get_drvdata(dev); 190 191 enter("i82092aa_pci_remove"); 192 193 free_irq(dev->irq, i82092aa_interrupt); 194 195 if (socket) 196 pcmcia_unregister_socket(socket); 197 198 leave("i82092aa_pci_remove"); 199 } 200 201 static DEFINE_SPINLOCK(port_lock); 202 203 /* basic value read/write functions */ 204 205 static unsigned char indirect_read(int socket, unsigned short reg) 206 { 207 unsigned short int port; 208 unsigned char val; 209 unsigned long flags; 210 spin_lock_irqsave(&port_lock,flags); 211 reg += socket * 0x40; 212 port = sockets[socket].io_base; 213 outb(reg,port); 214 val = inb(port+1); 215 spin_unlock_irqrestore(&port_lock,flags); 216 return val; 217 } 218 219 #if 0 220 static unsigned short indirect_read16(int socket, unsigned short reg) 221 { 222 unsigned short int port; 223 unsigned short tmp; 224 unsigned long flags; 225 spin_lock_irqsave(&port_lock,flags); 226 reg = reg + socket * 0x40; 227 port = sockets[socket].io_base; 228 outb(reg,port); 229 tmp = inb(port+1); 230 reg++; 231 outb(reg,port); 232 tmp = tmp | (inb(port+1)<<8); 233 spin_unlock_irqrestore(&port_lock,flags); 234 return tmp; 235 } 236 #endif 237 238 static void indirect_write(int socket, unsigned short reg, unsigned char value) 239 { 240 unsigned short int port; 241 unsigned long flags; 242 spin_lock_irqsave(&port_lock,flags); 243 reg = reg + socket * 0x40; 244 port = sockets[socket].io_base; 245 outb(reg,port); 246 outb(value,port+1); 247 spin_unlock_irqrestore(&port_lock,flags); 248 } 249 250 static void indirect_setbit(int socket, unsigned short reg, unsigned char mask) 251 { 252 unsigned short int port; 253 unsigned char val; 254 unsigned long flags; 255 spin_lock_irqsave(&port_lock,flags); 256 reg = reg + socket * 0x40; 257 port = sockets[socket].io_base; 258 outb(reg,port); 259 val = inb(port+1); 260 val |= mask; 261 outb(reg,port); 262 outb(val,port+1); 263 spin_unlock_irqrestore(&port_lock,flags); 264 } 265 266 267 static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask) 268 { 269 unsigned short int port; 270 unsigned char val; 271 unsigned long flags; 272 spin_lock_irqsave(&port_lock,flags); 273 reg = reg + socket * 0x40; 274 port = sockets[socket].io_base; 275 outb(reg,port); 276 val = inb(port+1); 277 val &= ~mask; 278 outb(reg,port); 279 outb(val,port+1); 280 spin_unlock_irqrestore(&port_lock,flags); 281 } 282 283 static void indirect_write16(int socket, unsigned short reg, unsigned short value) 284 { 285 unsigned short int port; 286 unsigned char val; 287 unsigned long flags; 288 spin_lock_irqsave(&port_lock,flags); 289 reg = reg + socket * 0x40; 290 port = sockets[socket].io_base; 291 292 outb(reg,port); 293 val = value & 255; 294 outb(val,port+1); 295 296 reg++; 297 298 outb(reg,port); 299 val = value>>8; 300 outb(val,port+1); 301 spin_unlock_irqrestore(&port_lock,flags); 302 } 303 304 /* simple helper functions */ 305 /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */ 306 static int cycle_time = 120; 307 308 static int to_cycles(int ns) 309 { 310 if (cycle_time!=0) 311 return ns/cycle_time; 312 else 313 return 0; 314 } 315 316 317 /* Interrupt handler functionality */ 318 319 static irqreturn_t i82092aa_interrupt(int irq, void *dev, struct pt_regs *regs) 320 { 321 int i; 322 int loopcount = 0; 323 int handled = 0; 324 325 unsigned int events, active=0; 326 327 /* enter("i82092aa_interrupt");*/ 328 329 while (1) { 330 loopcount++; 331 if (loopcount>20) { 332 printk(KERN_ERR "i82092aa: infinite eventloop in interrupt \n"); 333 break; 334 } 335 336 active = 0; 337 338 for (i=0;i<socket_count;i++) { 339 int csc; 340 if (sockets[i].card_state==0) /* Inactive socket, should not happen */ 341 continue; 342 343 csc = indirect_read(i,I365_CSC); /* card status change register */ 344 345 if (csc==0) /* no events on this socket */ 346 continue; 347 handled = 1; 348 events = 0; 349 350 if (csc & I365_CSC_DETECT) { 351 events |= SS_DETECT; 352 printk("Card detected in socket %i!\n",i); 353 } 354 355 if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) { 356 /* For IO/CARDS, bit 0 means "read the card" */ 357 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; 358 } else { 359 /* Check for battery/ready events */ 360 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; 361 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; 362 events |= (csc & I365_CSC_READY) ? SS_READY : 0; 363 } 364 365 if (events) { 366 pcmcia_parse_events(&sockets[i].socket, events); 367 } 368 active |= events; 369 } 370 371 if (active==0) /* no more events to handle */ 372 break; 373 374 } 375 return IRQ_RETVAL(handled); 376 /* leave("i82092aa_interrupt");*/ 377 } 378 379 380 381 /* socket functions */ 382 383 static int card_present(int socketno) 384 { 385 unsigned int val; 386 enter("card_present"); 387 388 if ((socketno<0) || (socketno >= MAX_SOCKETS)) 389 return 0; 390 if (sockets[socketno].io_base == 0) 391 return 0; 392 393 394 val = indirect_read(socketno, 1); /* Interface status register */ 395 if ((val&12)==12) { 396 leave("card_present 1"); 397 return 1; 398 } 399 400 leave("card_present 0"); 401 return 0; 402 } 403 404 static void set_bridge_state(int sock) 405 { 406 enter("set_bridge_state"); 407 indirect_write(sock, I365_GBLCTL,0x00); 408 indirect_write(sock, I365_GENCTL,0x00); 409 410 indirect_setbit(sock, I365_INTCTL,0x08); 411 leave("set_bridge_state"); 412 } 413 414 415 416 417 418 419 static int i82092aa_init(struct pcmcia_socket *sock) 420 { 421 int i; 422 struct resource res = { .start = 0, .end = 0x0fff }; 423 pccard_io_map io = { 0, 0, 0, 0, 1 }; 424 pccard_mem_map mem = { .res = &res, }; 425 426 enter("i82092aa_init"); 427 428 for (i = 0; i < 2; i++) { 429 io.map = i; 430 i82092aa_set_io_map(sock, &io); 431 } 432 for (i = 0; i < 5; i++) { 433 mem.map = i; 434 i82092aa_set_mem_map(sock, &mem); 435 } 436 437 leave("i82092aa_init"); 438 return 0; 439 } 440 441 static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value) 442 { 443 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 444 unsigned int status; 445 446 enter("i82092aa_get_status"); 447 448 status = indirect_read(sock,I365_STATUS); /* Interface Status Register */ 449 *value = 0; 450 451 if ((status & I365_CS_DETECT) == I365_CS_DETECT) { 452 *value |= SS_DETECT; 453 } 454 455 /* IO cards have a different meaning of bits 0,1 */ 456 /* Also notice the inverse-logic on the bits */ 457 if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) { 458 /* IO card */ 459 if (!(status & I365_CS_STSCHG)) 460 *value |= SS_STSCHG; 461 } else { /* non I/O card */ 462 if (!(status & I365_CS_BVD1)) 463 *value |= SS_BATDEAD; 464 if (!(status & I365_CS_BVD2)) 465 *value |= SS_BATWARN; 466 467 } 468 469 if (status & I365_CS_WRPROT) 470 (*value) |= SS_WRPROT; /* card is write protected */ 471 472 if (status & I365_CS_READY) 473 (*value) |= SS_READY; /* card is not busy */ 474 475 if (status & I365_CS_POWERON) 476 (*value) |= SS_POWERON; /* power is applied to the card */ 477 478 479 leave("i82092aa_get_status"); 480 return 0; 481 } 482 483 484 static int i82092aa_set_socket(struct pcmcia_socket *socket, socket_state_t *state) 485 { 486 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 487 unsigned char reg; 488 489 enter("i82092aa_set_socket"); 490 491 /* First, set the global controller options */ 492 493 set_bridge_state(sock); 494 495 /* Values for the IGENC register */ 496 497 reg = 0; 498 if (!(state->flags & SS_RESET)) /* The reset bit has "inverse" logic */ 499 reg = reg | I365_PC_RESET; 500 if (state->flags & SS_IOCARD) 501 reg = reg | I365_PC_IOCARD; 502 503 indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */ 504 505 /* Power registers */ 506 507 reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */ 508 509 if (state->flags & SS_PWR_AUTO) { 510 printk("Auto power\n"); 511 reg |= I365_PWR_AUTO; /* automatic power mngmnt */ 512 } 513 if (state->flags & SS_OUTPUT_ENA) { 514 printk("Power Enabled \n"); 515 reg |= I365_PWR_OUT; /* enable power */ 516 } 517 518 switch (state->Vcc) { 519 case 0: 520 break; 521 case 50: 522 printk("setting voltage to Vcc to 5V on socket %i\n",sock); 523 reg |= I365_VCC_5V; 524 break; 525 default: 526 printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc); 527 leave("i82092aa_set_socket"); 528 return -EINVAL; 529 } 530 531 532 switch (state->Vpp) { 533 case 0: 534 printk("not setting Vpp on socket %i\n",sock); 535 break; 536 case 50: 537 printk("setting Vpp to 5.0 for socket %i\n",sock); 538 reg |= I365_VPP1_5V | I365_VPP2_5V; 539 break; 540 case 120: 541 printk("setting Vpp to 12.0\n"); 542 reg |= I365_VPP1_12V | I365_VPP2_12V; 543 break; 544 default: 545 printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc); 546 leave("i82092aa_set_socket"); 547 return -EINVAL; 548 } 549 550 if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */ 551 indirect_write(sock,I365_POWER,reg); 552 553 /* Enable specific interrupt events */ 554 555 reg = 0x00; 556 if (state->csc_mask & SS_DETECT) { 557 reg |= I365_CSC_DETECT; 558 } 559 if (state->flags & SS_IOCARD) { 560 if (state->csc_mask & SS_STSCHG) 561 reg |= I365_CSC_STSCHG; 562 } else { 563 if (state->csc_mask & SS_BATDEAD) 564 reg |= I365_CSC_BVD1; 565 if (state->csc_mask & SS_BATWARN) 566 reg |= I365_CSC_BVD2; 567 if (state->csc_mask & SS_READY) 568 reg |= I365_CSC_READY; 569 570 } 571 572 /* now write the value and clear the (probably bogus) pending stuff by doing a dummy read*/ 573 574 indirect_write(sock,I365_CSCINT,reg); 575 (void)indirect_read(sock,I365_CSC); 576 577 leave("i82092aa_set_socket"); 578 return 0; 579 } 580 581 static int i82092aa_set_io_map(struct pcmcia_socket *socket, struct pccard_io_map *io) 582 { 583 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 584 unsigned char map, ioctl; 585 586 enter("i82092aa_set_io_map"); 587 588 map = io->map; 589 590 /* Check error conditions */ 591 if (map > 1) { 592 leave("i82092aa_set_io_map with invalid map"); 593 return -EINVAL; 594 } 595 if ((io->start > 0xffff) || (io->stop > 0xffff) || (io->stop < io->start)){ 596 leave("i82092aa_set_io_map with invalid io"); 597 return -EINVAL; 598 } 599 600 /* Turn off the window before changing anything */ 601 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map)) 602 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map)); 603 604 /* printk("set_io_map: Setting range to %x - %x \n",io->start,io->stop); */ 605 606 /* write the new values */ 607 indirect_write16(sock,I365_IO(map)+I365_W_START,io->start); 608 indirect_write16(sock,I365_IO(map)+I365_W_STOP,io->stop); 609 610 ioctl = indirect_read(sock,I365_IOCTL) & ~I365_IOCTL_MASK(map); 611 612 if (io->flags & (MAP_16BIT|MAP_AUTOSZ)) 613 ioctl |= I365_IOCTL_16BIT(map); 614 615 indirect_write(sock,I365_IOCTL,ioctl); 616 617 /* Turn the window back on if needed */ 618 if (io->flags & MAP_ACTIVE) 619 indirect_setbit(sock,I365_ADDRWIN,I365_ENA_IO(map)); 620 621 leave("i82092aa_set_io_map"); 622 return 0; 623 } 624 625 static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_map *mem) 626 { 627 struct socket_info *sock_info = container_of(socket, struct socket_info, socket); 628 unsigned int sock = sock_info->number; 629 struct pci_bus_region region; 630 unsigned short base, i; 631 unsigned char map; 632 633 enter("i82092aa_set_mem_map"); 634 635 pcibios_resource_to_bus(sock_info->dev, ®ion, mem->res); 636 637 map = mem->map; 638 if (map > 4) { 639 leave("i82092aa_set_mem_map: invalid map"); 640 return -EINVAL; 641 } 642 643 644 if ( (mem->card_start > 0x3ffffff) || (region.start > region.end) || 645 (mem->speed > 1000) ) { 646 leave("i82092aa_set_mem_map: invalid address / speed"); 647 printk("invalid mem map for socket %i : %lx to %lx with a start of %x \n",sock,region.start, region.end, mem->card_start); 648 return -EINVAL; 649 } 650 651 /* Turn off the window before changing anything */ 652 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map)) 653 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 654 655 656 /* printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, region.start,region.end,sock,mem->speed,mem->flags & MAP_ACTIVE); */ 657 658 /* write the start address */ 659 base = I365_MEM(map); 660 i = (region.start >> 12) & 0x0fff; 661 if (mem->flags & MAP_16BIT) 662 i |= I365_MEM_16BIT; 663 if (mem->flags & MAP_0WS) 664 i |= I365_MEM_0WS; 665 indirect_write16(sock,base+I365_W_START,i); 666 667 /* write the stop address */ 668 669 i= (region.end >> 12) & 0x0fff; 670 switch (to_cycles(mem->speed)) { 671 case 0: 672 break; 673 case 1: 674 i |= I365_MEM_WS0; 675 break; 676 case 2: 677 i |= I365_MEM_WS1; 678 break; 679 default: 680 i |= I365_MEM_WS1 | I365_MEM_WS0; 681 break; 682 } 683 684 indirect_write16(sock,base+I365_W_STOP,i); 685 686 /* card start */ 687 688 i = ((mem->card_start - region.start) >> 12) & 0x3fff; 689 if (mem->flags & MAP_WRPROT) 690 i |= I365_MEM_WRPROT; 691 if (mem->flags & MAP_ATTRIB) { 692 /* printk("requesting attribute memory for socket %i\n",sock);*/ 693 i |= I365_MEM_REG; 694 } else { 695 /* printk("requesting normal memory for socket %i\n",sock);*/ 696 } 697 indirect_write16(sock,base+I365_W_OFF,i); 698 699 /* Enable the window if necessary */ 700 if (mem->flags & MAP_ACTIVE) 701 indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 702 703 leave("i82092aa_set_mem_map"); 704 return 0; 705 } 706 707 static int i82092aa_module_init(void) 708 { 709 enter("i82092aa_module_init"); 710 pci_register_driver(&i82092aa_pci_drv); 711 leave("i82092aa_module_init"); 712 return 0; 713 } 714 715 static void i82092aa_module_exit(void) 716 { 717 enter("i82092aa_module_exit"); 718 pci_unregister_driver(&i82092aa_pci_drv); 719 if (sockets[0].io_base>0) 720 release_region(sockets[0].io_base, 2); 721 leave("i82092aa_module_exit"); 722 } 723 724 module_init(i82092aa_module_init); 725 module_exit(i82092aa_module_exit); 726 727