1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * PCI VPD support 4 * 5 * Copyright (C) 2010 Broadcom Corporation. 6 */ 7 8 #include <linux/pci.h> 9 #include <linux/delay.h> 10 #include <linux/export.h> 11 #include <linux/sched/signal.h> 12 #include <asm/unaligned.h> 13 #include "pci.h" 14 15 #define PCI_VPD_LRDT_TAG_SIZE 3 16 #define PCI_VPD_SRDT_LEN_MASK 0x07 17 #define PCI_VPD_SRDT_TAG_SIZE 1 18 #define PCI_VPD_STIN_END 0x0f 19 #define PCI_VPD_INFO_FLD_HDR_SIZE 3 20 21 static u16 pci_vpd_lrdt_size(const u8 *lrdt) 22 { 23 return get_unaligned_le16(lrdt + 1); 24 } 25 26 static u8 pci_vpd_srdt_tag(const u8 *srdt) 27 { 28 return *srdt >> 3; 29 } 30 31 static u8 pci_vpd_srdt_size(const u8 *srdt) 32 { 33 return *srdt & PCI_VPD_SRDT_LEN_MASK; 34 } 35 36 static u8 pci_vpd_info_field_size(const u8 *info_field) 37 { 38 return info_field[2]; 39 } 40 41 /* VPD access through PCI 2.2+ VPD capability */ 42 43 static struct pci_dev *pci_get_func0_dev(struct pci_dev *dev) 44 { 45 return pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0)); 46 } 47 48 #define PCI_VPD_MAX_SIZE (PCI_VPD_ADDR_MASK + 1) 49 #define PCI_VPD_SZ_INVALID UINT_MAX 50 51 /** 52 * pci_vpd_size - determine actual size of Vital Product Data 53 * @dev: pci device struct 54 */ 55 static size_t pci_vpd_size(struct pci_dev *dev) 56 { 57 size_t off = 0, size; 58 unsigned char tag, header[1+2]; /* 1 byte tag, 2 bytes length */ 59 60 /* Otherwise the following reads would fail. */ 61 dev->vpd.len = PCI_VPD_MAX_SIZE; 62 63 while (pci_read_vpd(dev, off, 1, header) == 1) { 64 size = 0; 65 66 if (off == 0 && (header[0] == 0x00 || header[0] == 0xff)) 67 goto error; 68 69 if (header[0] & PCI_VPD_LRDT) { 70 /* Large Resource Data Type Tag */ 71 if (pci_read_vpd(dev, off + 1, 2, &header[1]) != 2) { 72 pci_warn(dev, "failed VPD read at offset %zu\n", 73 off + 1); 74 return off ?: PCI_VPD_SZ_INVALID; 75 } 76 size = pci_vpd_lrdt_size(header); 77 if (off + size > PCI_VPD_MAX_SIZE) 78 goto error; 79 80 off += PCI_VPD_LRDT_TAG_SIZE + size; 81 } else { 82 /* Short Resource Data Type Tag */ 83 tag = pci_vpd_srdt_tag(header); 84 size = pci_vpd_srdt_size(header); 85 if (off + size > PCI_VPD_MAX_SIZE) 86 goto error; 87 88 off += PCI_VPD_SRDT_TAG_SIZE + size; 89 if (tag == PCI_VPD_STIN_END) /* End tag descriptor */ 90 return off; 91 } 92 } 93 return off; 94 95 error: 96 pci_info(dev, "invalid VPD tag %#04x (size %zu) at offset %zu%s\n", 97 header[0], size, off, off == 0 ? 98 "; assume missing optional EEPROM" : ""); 99 return off ?: PCI_VPD_SZ_INVALID; 100 } 101 102 /* 103 * Wait for last operation to complete. 104 * This code has to spin since there is no other notification from the PCI 105 * hardware. Since the VPD is often implemented by serial attachment to an 106 * EEPROM, it may take many milliseconds to complete. 107 * @set: if true wait for flag to be set, else wait for it to be cleared 108 * 109 * Returns 0 on success, negative values indicate error. 110 */ 111 static int pci_vpd_wait(struct pci_dev *dev, bool set) 112 { 113 struct pci_vpd *vpd = &dev->vpd; 114 unsigned long timeout = jiffies + msecs_to_jiffies(125); 115 unsigned long max_sleep = 16; 116 u16 status; 117 int ret; 118 119 do { 120 ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR, 121 &status); 122 if (ret < 0) 123 return ret; 124 125 if (!!(status & PCI_VPD_ADDR_F) == set) 126 return 0; 127 128 if (time_after(jiffies, timeout)) 129 break; 130 131 usleep_range(10, max_sleep); 132 if (max_sleep < 1024) 133 max_sleep *= 2; 134 } while (true); 135 136 pci_warn(dev, "VPD access failed. This is likely a firmware bug on this device. Contact the card vendor for a firmware update\n"); 137 return -ETIMEDOUT; 138 } 139 140 static ssize_t pci_vpd_read(struct pci_dev *dev, loff_t pos, size_t count, 141 void *arg) 142 { 143 struct pci_vpd *vpd = &dev->vpd; 144 int ret = 0; 145 loff_t end = pos + count; 146 u8 *buf = arg; 147 148 if (!vpd->cap) 149 return -ENODEV; 150 151 if (pos < 0) 152 return -EINVAL; 153 154 if (pos > vpd->len) 155 return 0; 156 157 if (end > vpd->len) { 158 end = vpd->len; 159 count = end - pos; 160 } 161 162 if (mutex_lock_killable(&vpd->lock)) 163 return -EINTR; 164 165 while (pos < end) { 166 u32 val; 167 unsigned int i, skip; 168 169 if (fatal_signal_pending(current)) { 170 ret = -EINTR; 171 break; 172 } 173 174 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR, 175 pos & ~3); 176 if (ret < 0) 177 break; 178 ret = pci_vpd_wait(dev, true); 179 if (ret < 0) 180 break; 181 182 ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA, &val); 183 if (ret < 0) 184 break; 185 186 skip = pos & 3; 187 for (i = 0; i < sizeof(u32); i++) { 188 if (i >= skip) { 189 *buf++ = val; 190 if (++pos == end) 191 break; 192 } 193 val >>= 8; 194 } 195 } 196 197 mutex_unlock(&vpd->lock); 198 return ret ? ret : count; 199 } 200 201 static ssize_t pci_vpd_write(struct pci_dev *dev, loff_t pos, size_t count, 202 const void *arg) 203 { 204 struct pci_vpd *vpd = &dev->vpd; 205 const u8 *buf = arg; 206 loff_t end = pos + count; 207 int ret = 0; 208 209 if (!vpd->cap) 210 return -ENODEV; 211 212 if (pos < 0 || (pos & 3) || (count & 3)) 213 return -EINVAL; 214 215 if (end > vpd->len) 216 return -EINVAL; 217 218 if (mutex_lock_killable(&vpd->lock)) 219 return -EINTR; 220 221 while (pos < end) { 222 ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA, 223 get_unaligned_le32(buf)); 224 if (ret < 0) 225 break; 226 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR, 227 pos | PCI_VPD_ADDR_F); 228 if (ret < 0) 229 break; 230 231 ret = pci_vpd_wait(dev, false); 232 if (ret < 0) 233 break; 234 235 buf += sizeof(u32); 236 pos += sizeof(u32); 237 } 238 239 mutex_unlock(&vpd->lock); 240 return ret ? ret : count; 241 } 242 243 void pci_vpd_init(struct pci_dev *dev) 244 { 245 dev->vpd.cap = pci_find_capability(dev, PCI_CAP_ID_VPD); 246 mutex_init(&dev->vpd.lock); 247 248 if (!dev->vpd.len) 249 dev->vpd.len = pci_vpd_size(dev); 250 251 if (dev->vpd.len == PCI_VPD_SZ_INVALID) 252 dev->vpd.cap = 0; 253 } 254 255 static ssize_t vpd_read(struct file *filp, struct kobject *kobj, 256 struct bin_attribute *bin_attr, char *buf, loff_t off, 257 size_t count) 258 { 259 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 260 261 return pci_read_vpd(dev, off, count, buf); 262 } 263 264 static ssize_t vpd_write(struct file *filp, struct kobject *kobj, 265 struct bin_attribute *bin_attr, char *buf, loff_t off, 266 size_t count) 267 { 268 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 269 270 return pci_write_vpd(dev, off, count, buf); 271 } 272 static BIN_ATTR(vpd, 0600, vpd_read, vpd_write, 0); 273 274 static struct bin_attribute *vpd_attrs[] = { 275 &bin_attr_vpd, 276 NULL, 277 }; 278 279 static umode_t vpd_attr_is_visible(struct kobject *kobj, 280 struct bin_attribute *a, int n) 281 { 282 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 283 284 if (!pdev->vpd.cap) 285 return 0; 286 287 return a->attr.mode; 288 } 289 290 const struct attribute_group pci_dev_vpd_attr_group = { 291 .bin_attrs = vpd_attrs, 292 .is_bin_visible = vpd_attr_is_visible, 293 }; 294 295 void *pci_vpd_alloc(struct pci_dev *dev, unsigned int *size) 296 { 297 unsigned int len = dev->vpd.len; 298 void *buf; 299 int cnt; 300 301 if (!dev->vpd.cap) 302 return ERR_PTR(-ENODEV); 303 304 buf = kmalloc(len, GFP_KERNEL); 305 if (!buf) 306 return ERR_PTR(-ENOMEM); 307 308 cnt = pci_read_vpd(dev, 0, len, buf); 309 if (cnt != len) { 310 kfree(buf); 311 return ERR_PTR(-EIO); 312 } 313 314 if (size) 315 *size = len; 316 317 return buf; 318 } 319 EXPORT_SYMBOL_GPL(pci_vpd_alloc); 320 321 static int pci_vpd_find_tag(const u8 *buf, unsigned int len, u8 rdt, unsigned int *size) 322 { 323 int i = 0; 324 325 /* look for LRDT tags only, end tag is the only SRDT tag */ 326 while (i + PCI_VPD_LRDT_TAG_SIZE <= len && buf[i] & PCI_VPD_LRDT) { 327 unsigned int lrdt_len = pci_vpd_lrdt_size(buf + i); 328 u8 tag = buf[i]; 329 330 i += PCI_VPD_LRDT_TAG_SIZE; 331 if (tag == rdt) { 332 if (i + lrdt_len > len) 333 lrdt_len = len - i; 334 if (size) 335 *size = lrdt_len; 336 return i; 337 } 338 339 i += lrdt_len; 340 } 341 342 return -ENOENT; 343 } 344 345 int pci_vpd_find_id_string(const u8 *buf, unsigned int len, unsigned int *size) 346 { 347 return pci_vpd_find_tag(buf, len, PCI_VPD_LRDT_ID_STRING, size); 348 } 349 EXPORT_SYMBOL_GPL(pci_vpd_find_id_string); 350 351 static int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off, 352 unsigned int len, const char *kw) 353 { 354 int i; 355 356 for (i = off; i + PCI_VPD_INFO_FLD_HDR_SIZE <= off + len;) { 357 if (buf[i + 0] == kw[0] && 358 buf[i + 1] == kw[1]) 359 return i; 360 361 i += PCI_VPD_INFO_FLD_HDR_SIZE + 362 pci_vpd_info_field_size(&buf[i]); 363 } 364 365 return -ENOENT; 366 } 367 368 /** 369 * pci_read_vpd - Read one entry from Vital Product Data 370 * @dev: PCI device struct 371 * @pos: offset in VPD space 372 * @count: number of bytes to read 373 * @buf: pointer to where to store result 374 */ 375 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf) 376 { 377 ssize_t ret; 378 379 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) { 380 dev = pci_get_func0_dev(dev); 381 if (!dev) 382 return -ENODEV; 383 384 ret = pci_vpd_read(dev, pos, count, buf); 385 pci_dev_put(dev); 386 return ret; 387 } 388 389 return pci_vpd_read(dev, pos, count, buf); 390 } 391 EXPORT_SYMBOL(pci_read_vpd); 392 393 /** 394 * pci_write_vpd - Write entry to Vital Product Data 395 * @dev: PCI device struct 396 * @pos: offset in VPD space 397 * @count: number of bytes to write 398 * @buf: buffer containing write data 399 */ 400 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf) 401 { 402 ssize_t ret; 403 404 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) { 405 dev = pci_get_func0_dev(dev); 406 if (!dev) 407 return -ENODEV; 408 409 ret = pci_vpd_write(dev, pos, count, buf); 410 pci_dev_put(dev); 411 return ret; 412 } 413 414 return pci_vpd_write(dev, pos, count, buf); 415 } 416 EXPORT_SYMBOL(pci_write_vpd); 417 418 int pci_vpd_find_ro_info_keyword(const void *buf, unsigned int len, 419 const char *kw, unsigned int *size) 420 { 421 int ro_start, infokw_start; 422 unsigned int ro_len, infokw_size; 423 424 ro_start = pci_vpd_find_tag(buf, len, PCI_VPD_LRDT_RO_DATA, &ro_len); 425 if (ro_start < 0) 426 return ro_start; 427 428 infokw_start = pci_vpd_find_info_keyword(buf, ro_start, ro_len, kw); 429 if (infokw_start < 0) 430 return infokw_start; 431 432 infokw_size = pci_vpd_info_field_size(buf + infokw_start); 433 infokw_start += PCI_VPD_INFO_FLD_HDR_SIZE; 434 435 if (infokw_start + infokw_size > len) 436 return -EINVAL; 437 438 if (size) 439 *size = infokw_size; 440 441 return infokw_start; 442 } 443 EXPORT_SYMBOL_GPL(pci_vpd_find_ro_info_keyword); 444 445 int pci_vpd_check_csum(const void *buf, unsigned int len) 446 { 447 const u8 *vpd = buf; 448 unsigned int size; 449 u8 csum = 0; 450 int rv_start; 451 452 rv_start = pci_vpd_find_ro_info_keyword(buf, len, PCI_VPD_RO_KEYWORD_CHKSUM, &size); 453 if (rv_start == -ENOENT) /* no checksum in VPD */ 454 return 1; 455 else if (rv_start < 0) 456 return rv_start; 457 458 if (!size) 459 return -EINVAL; 460 461 while (rv_start >= 0) 462 csum += vpd[rv_start--]; 463 464 return csum ? -EILSEQ : 0; 465 } 466 EXPORT_SYMBOL_GPL(pci_vpd_check_csum); 467 468 #ifdef CONFIG_PCI_QUIRKS 469 /* 470 * Quirk non-zero PCI functions to route VPD access through function 0 for 471 * devices that share VPD resources between functions. The functions are 472 * expected to be identical devices. 473 */ 474 static void quirk_f0_vpd_link(struct pci_dev *dev) 475 { 476 struct pci_dev *f0; 477 478 if (!PCI_FUNC(dev->devfn)) 479 return; 480 481 f0 = pci_get_func0_dev(dev); 482 if (!f0) 483 return; 484 485 if (f0->vpd.cap && dev->class == f0->class && 486 dev->vendor == f0->vendor && dev->device == f0->device) 487 dev->dev_flags |= PCI_DEV_FLAGS_VPD_REF_F0; 488 489 pci_dev_put(f0); 490 } 491 DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, 492 PCI_CLASS_NETWORK_ETHERNET, 8, quirk_f0_vpd_link); 493 494 /* 495 * If a device follows the VPD format spec, the PCI core will not read or 496 * write past the VPD End Tag. But some vendors do not follow the VPD 497 * format spec, so we can't tell how much data is safe to access. Devices 498 * may behave unpredictably if we access too much. Blacklist these devices 499 * so we don't touch VPD at all. 500 */ 501 static void quirk_blacklist_vpd(struct pci_dev *dev) 502 { 503 dev->vpd.len = PCI_VPD_SZ_INVALID; 504 pci_warn(dev, FW_BUG "disabling VPD access (can't determine size of non-standard VPD format)\n"); 505 } 506 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0060, quirk_blacklist_vpd); 507 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x007c, quirk_blacklist_vpd); 508 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0413, quirk_blacklist_vpd); 509 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0078, quirk_blacklist_vpd); 510 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0079, quirk_blacklist_vpd); 511 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0073, quirk_blacklist_vpd); 512 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0071, quirk_blacklist_vpd); 513 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005b, quirk_blacklist_vpd); 514 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x002f, quirk_blacklist_vpd); 515 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005d, quirk_blacklist_vpd); 516 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005f, quirk_blacklist_vpd); 517 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATTANSIC, PCI_ANY_ID, quirk_blacklist_vpd); 518 /* 519 * The Amazon Annapurna Labs 0x0031 device id is reused for other non Root Port 520 * device types, so the quirk is registered for the PCI_CLASS_BRIDGE_PCI class. 521 */ 522 DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031, 523 PCI_CLASS_BRIDGE_PCI, 8, quirk_blacklist_vpd); 524 525 static void quirk_chelsio_extend_vpd(struct pci_dev *dev) 526 { 527 int chip = (dev->device & 0xf000) >> 12; 528 int func = (dev->device & 0x0f00) >> 8; 529 int prod = (dev->device & 0x00ff) >> 0; 530 531 /* 532 * If this is a T3-based adapter, there's a 1KB VPD area at offset 533 * 0xc00 which contains the preferred VPD values. If this is a T4 or 534 * later based adapter, the special VPD is at offset 0x400 for the 535 * Physical Functions (the SR-IOV Virtual Functions have no VPD 536 * Capabilities). The PCI VPD Access core routines will normally 537 * compute the size of the VPD by parsing the VPD Data Structure at 538 * offset 0x000. This will result in silent failures when attempting 539 * to accesses these other VPD areas which are beyond those computed 540 * limits. 541 */ 542 if (chip == 0x0 && prod >= 0x20) 543 dev->vpd.len = 8192; 544 else if (chip >= 0x4 && func < 0x8) 545 dev->vpd.len = 2048; 546 } 547 548 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID, 549 quirk_chelsio_extend_vpd); 550 551 #endif 552